diff options
| author | sakimisu <[email protected]> | 2023-03-15 21:47:28 +0800 |
|---|---|---|
| committer | sakimisu <[email protected]> | 2023-03-15 21:47:28 +0800 |
| commit | 419622f4e49b9875273806ba7da799304c15f8cc (patch) | |
| tree | 5f9c0bf04519a822f8dc3ae47aefbfacbaa2b1eb | |
| parent | 19d509052a01f52a76653fcbccba37dc61743b7c (diff) | |
fix vbusen in gd32
| -rw-r--r-- | port/dwc2/usb_dc_dwc2.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/port/dwc2/usb_dc_dwc2.c b/port/dwc2/usb_dc_dwc2.c index b06e9e6f..892cbb7d 100644 --- a/port/dwc2/usb_dc_dwc2.c +++ b/port/dwc2/usb_dc_dwc2.c @@ -553,7 +553,7 @@ int usb_dc_init(void) USB_OTG_GLB->DIEPTXF[i] = 0U; } -#if defined(STM32F7) || defined(STM32H7) ||defined(STM32L4) +#if defined(STM32F7) || defined(STM32H7) || defined(STM32L4) #ifdef CONFIG_DWC2_VBUS_SENSING_ENABLE /* Enable HW VBUS sensing */ USB_OTG_GLB->GCCFG |= USB_OTG_GCCFG_VBDEN; @@ -571,6 +571,9 @@ int usb_dc_init(void) USB_OTG_GLB->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS; USB_OTG_GLB->GCCFG |= USB_OTG_GCCFG_VBUSBSEN; #else +#ifdef CONFIG_DWC2_GD32 + USB_OTG_GLB->GCCFG |= USB_OTG_GCCFG_VBUSBSEN | USB_OTG_GCCFG_VBUSASEN; +#else /* * Disable HW VBUS sensing. VBUS is internally considered to be always * at VBUS-Valid level (5V). @@ -580,6 +583,7 @@ int usb_dc_init(void) USB_OTG_GLB->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; #endif #endif +#endif /* Restart the Phy Clock */ USB_OTG_PCGCCTL = 0U; @@ -751,7 +755,7 @@ int usbd_ep_close(const uint8_t ep) if (USB_EP_DIR_IS_OUT(ep)) { USB_OTG_OUTEP(ep_idx)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; -// USB_OTG_OUTEP(ep_idx)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + // USB_OTG_OUTEP(ep_idx)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; USB_OTG_DEV->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep_idx & 0x07)) << 16)); USB_OTG_DEV->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep_idx & 0x07)) << 16)); @@ -761,13 +765,13 @@ int usbd_ep_close(const uint8_t ep) USB_OTG_DOEPCTL_EPTYP); } else { USB_OTG_INEP(ep_idx)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; -// USB_OTG_INEP(ep_idx)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + // USB_OTG_INEP(ep_idx)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; USB_OTG_DEV->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep_idx & 0x07))); USB_OTG_DEV->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep_idx & 0x07))); USB_OTG_INEP(ep_idx)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP | USB_OTG_DIEPCTL_MPSIZ | -// USB_OTG_DIEPCTL_TXFNUM | + // USB_OTG_DIEPCTL_TXFNUM | USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_EPTYP); } |