diff options
| author | sakumisu <[email protected]> | 2025-03-28 13:13:24 +0800 |
|---|---|---|
| committer | sakumisu <[email protected]> | 2025-03-28 13:29:04 +0800 |
| commit | 5666fcb540fbb6133cb278278b041317b8840232 (patch) | |
| tree | 7321650169ec8ceea561535031eda2d56341f754 | |
| parent | e9257baa5d42a9ab40faaab57df56c021646dde4 (diff) | |
update(port/ohci): add pad for ed&td cachemaintain, add CONFIG_USB_OHCI_DESC_DCACHE_ENABLE for ed&td
Signed-off-by: sakumisu <[email protected]>
| -rw-r--r-- | cherryusb_config_template.h | 4 | ||||
| -rw-r--r-- | port/ohci/usb_hc_ohci.h | 17 |
2 files changed, 20 insertions, 1 deletions
diff --git a/cherryusb_config_template.h b/cherryusb_config_template.h index 41cc246e..6e8576b3 100644 --- a/cherryusb_config_template.h +++ b/cherryusb_config_template.h @@ -271,9 +271,13 @@ // #define CONFIG_USB_EHCI_CONFIGFLAG // #define CONFIG_USB_EHCI_ISO // #define CONFIG_USB_EHCI_WITH_OHCI +// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE /* ---------------- OHCI Configuration ---------------- */ #define CONFIG_USB_OHCI_HCOR_OFFSET (0x0) +#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM +#define CONFIG_USB_OHCI_TD_NUM 3 +// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE /* ---------------- XHCI Configuration ---------------- */ #define CONFIG_USB_XHCI_HCCR_OFFSET (0x0) diff --git a/port/ohci/usb_hc_ohci.h b/port/ohci/usb_hc_ohci.h index 1b322007..3daed971 100644 --- a/port/ohci/usb_hc_ohci.h +++ b/port/ohci/usb_hc_ohci.h @@ -22,13 +22,23 @@ #ifndef CONFIG_USB_OHCI_TD_NUM #define CONFIG_USB_OHCI_TD_NUM 3 #endif -#ifndef CONFIG_USB_OHCI_ALIGN_SIZE + +#if CONFIG_USB_ALIGN_SIZE <= 32 +#define CONFIG_USB_OHCI_ALIGN_SIZE 32 +#elif CONFIG_USB_ALIGN_SIZE <= 64 #define CONFIG_USB_OHCI_ALIGN_SIZE 64 +#else +#error "CONFIG_USB_ALIGN_SIZE must be 32 or 64" #endif struct ohci_ed_hw; struct ohci_td_hw { struct ohci_gtd hw; +#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32) + uint8_t pad[16]; +#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64) + uint8_t pad[48]; +#endif struct usbh_urb *urb; bool dir_in; uint32_t buf_start; @@ -37,6 +47,11 @@ struct ohci_td_hw { struct ohci_ed_hw { struct ohci_ed hw; +#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32) + uint8_t pad[16]; +#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64) + uint8_t pad[48]; +#endif struct ohci_td_hw td_pool[CONFIG_USB_OHCI_TD_NUM]; uint32_t td_count; uint8_t ed_type; |