summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorsakumisu <[email protected]>2022-06-15 20:50:59 +0800
committersakumisu <[email protected]>2022-06-15 20:51:18 +0800
commit8e7c7d76e1d478aa84f539ace02f90b09fcd83ca (patch)
tree045e012b97cfa0d114e169a6ac964ceb7c6b60ba
parent994ee2fb6f5255b7199593817c133bb4ea451911 (diff)
remove usb_ prefix
-rw-r--r--port/dwc2/usb_dc_dwc2.c130
-rw-r--r--port/dwc2/usb_dwc2_reg.h6
-rw-r--r--port/dwc2/usb_hc_dwc2.c348
-rw-r--r--port/fsdev/usb_dc_fsdev.c16
-rw-r--r--port/musb/usb_dc_musb.c93
5 files changed, 279 insertions, 314 deletions
diff --git a/port/dwc2/usb_dc_dwc2.c b/port/dwc2/usb_dc_dwc2.c
index 733b5391..8898e685 100644
--- a/port/dwc2/usb_dc_dwc2.c
+++ b/port/dwc2/usb_dc_dwc2.c
@@ -126,7 +126,7 @@ struct dwc2_udc {
struct dwc2_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */
} g_dwc2_udc;
-static int usb_dwc2_reset(void)
+static inline int dwc2_reset(void)
{
uint32_t count = 0U;
@@ -150,7 +150,7 @@ static int usb_dwc2_reset(void)
return 0;
}
-static inline int usb_dwc2_core_init(void)
+static inline int dwc2_core_init(void)
{
int ret;
#if defined(CONFIG_USB_HS)
@@ -160,7 +160,7 @@ static inline int usb_dwc2_core_init(void)
USB_OTG_GLB->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
#endif
/* Reset after a PHY select */
- ret = usb_dwc2_reset();
+ ret = dwc2_reset();
/* Activate the USB Transceiver */
USB_OTG_GLB->GCCFG |= USB_OTG_GCCFG_PWRDWN;
@@ -168,7 +168,7 @@ static inline int usb_dwc2_core_init(void)
return ret;
}
-static void usb_dwc2_set_mode(uint8_t mode)
+static inline void dwc2_set_mode(uint8_t mode)
{
USB_OTG_GLB->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
@@ -179,7 +179,37 @@ static void usb_dwc2_set_mode(uint8_t mode)
}
}
-static void usb_dwc2_set_turnaroundtime(uint32_t hclk, uint8_t speed)
+static inline int dwc2_flush_rxfifo(void)
+{
+ uint32_t count = 0;
+
+ USB_OTG_GLB->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
+
+ do {
+ if (++count > 200000U) {
+ return -1;
+ }
+ } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
+
+ return 0;
+}
+
+static inline int dwc2_flush_txfifo(uint32_t num)
+{
+ uint32_t count = 0U;
+
+ USB_OTG_GLB->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
+
+ do {
+ if (++count > 200000U) {
+ return -1;
+ }
+ } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
+
+ return 0;
+}
+
+static void dwc2_set_turnaroundtime(uint32_t hclk, uint8_t speed)
{
uint32_t UsbTrd;
@@ -230,37 +260,7 @@ static void usb_dwc2_set_turnaroundtime(uint32_t hclk, uint8_t speed)
USB_OTG_GLB->GUSBCFG |= (uint32_t)((UsbTrd << 10) & USB_OTG_GUSBCFG_TRDT);
}
-static int usb_dwc2_flush_rxfifo(void)
-{
- uint32_t count = 0;
-
- USB_OTG_GLB->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
-
- do {
- if (++count > 200000U) {
- return -1;
- }
- } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
-
- return 0;
-}
-
-static int usb_dwc2_flush_txfifo(uint32_t num)
-{
- uint32_t count = 0U;
-
- USB_OTG_GLB->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
-
- do {
- if (++count > 200000U) {
- return -1;
- }
- } while ((USB_OTG_GLB->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
-
- return 0;
-}
-
-static void usb_set_txfifo(uint8_t fifo, uint16_t size)
+static void dwc2_set_txfifo(uint8_t fifo, uint16_t size)
{
uint8_t i;
uint32_t Tx_Offset;
@@ -290,7 +290,7 @@ static void usb_set_txfifo(uint8_t fifo, uint16_t size)
}
}
-static uint8_t usb_dwc2_get_devspeed(void)
+static uint8_t dwc2_get_devspeed(void)
{
uint8_t speed;
uint32_t DevEnumSpeed = USB_OTG_DEV->DSTS & USB_OTG_DSTS_ENUMSPD;
@@ -308,10 +308,10 @@ static uint8_t usb_dwc2_get_devspeed(void)
}
/**
- * @brief USB_ReadInterrupts: return the global USB interrupt status
+ * @brief dwc2_get_glb_intstatus: return the global USB interrupt status
* @retval status
*/
-static inline uint32_t usb_dwc2_get_glb_intstatus(void)
+static inline uint32_t dwc2_get_glb_intstatus(void)
{
uint32_t tmpreg;
@@ -322,10 +322,10 @@ static inline uint32_t usb_dwc2_get_glb_intstatus(void)
}
/**
- * @brief usb_dwc2_get_outeps_intstatus: return the USB device OUT endpoints interrupt status
+ * @brief dwc2_get_outeps_intstatus: return the USB device OUT endpoints interrupt status
* @retval status
*/
-static inline uint32_t usb_dwc2_get_outeps_intstatus(void)
+static inline uint32_t dwc2_get_outeps_intstatus(void)
{
uint32_t tmpreg;
@@ -336,10 +336,10 @@ static inline uint32_t usb_dwc2_get_outeps_intstatus(void)
}
/**
- * @brief usb_dwc2_get_ineps_intstatus: return the USB device IN endpoints interrupt status
+ * @brief dwc2_get_ineps_intstatus: return the USB device IN endpoints interrupt status
* @retval status
*/
-static inline uint32_t usb_dwc2_get_ineps_intstatus(void)
+static inline uint32_t dwc2_get_ineps_intstatus(void)
{
uint32_t tmpreg;
@@ -355,7 +355,7 @@ static inline uint32_t usb_dwc2_get_ineps_intstatus(void)
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
-static inline uint32_t usb_dwc2_get_outep_intstatus(uint8_t epnum)
+static inline uint32_t dwc2_get_outep_intstatus(uint8_t epnum)
{
uint32_t tmpreg;
@@ -371,7 +371,7 @@ static inline uint32_t usb_dwc2_get_outep_intstatus(uint8_t epnum)
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
-static inline uint32_t usb_dwc2_get_inep_intstatus(uint8_t epnum)
+static inline uint32_t dwc2_get_inep_intstatus(uint8_t epnum)
{
uint32_t tmpreg, msk, emp;
@@ -409,10 +409,10 @@ int usb_dc_init(void)
// USB_OTG_GLB->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
}
- ret = usb_dwc2_core_init();
+ ret = dwc2_core_init();
/* Force Device Mode*/
- usb_dwc2_set_mode(USB_OTG_MODE_DEVICE);
+ dwc2_set_mode(USB_OTG_MODE_DEVICE);
for (uint8_t i = 0U; i < 15U; i++) {
USB_OTG_GLB->DIEPTXF[i] = 0U;
@@ -461,8 +461,8 @@ int usb_dc_init(void)
USB_OTG_DEV->DCFG |= USB_OTG_SPEED_FULL;
#endif
- ret = usb_dwc2_flush_txfifo(0x10U);
- ret = usb_dwc2_flush_rxfifo();
+ ret = dwc2_flush_txfifo(0x10U);
+ ret = dwc2_flush_rxfifo();
for (uint8_t i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) {
if ((USB_OTG_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) {
@@ -519,15 +519,15 @@ int usb_dc_init(void)
USB_OTG_GLB->GRXFSIZ = (CONFIG_USB_DWC2_RX_FIFO_SIZE / 4);
- usb_set_txfifo(0, CONFIG_USB_DWC2_TX0_FIFO_SIZE / 4);
- usb_set_txfifo(1, CONFIG_USB_DWC2_TX1_FIFO_SIZE / 4);
- usb_set_txfifo(2, CONFIG_USB_DWC2_TX2_FIFO_SIZE / 4);
- usb_set_txfifo(3, CONFIG_USB_DWC2_TX3_FIFO_SIZE / 4);
+ dwc2_set_txfifo(0, CONFIG_USB_DWC2_TX0_FIFO_SIZE / 4);
+ dwc2_set_txfifo(1, CONFIG_USB_DWC2_TX1_FIFO_SIZE / 4);
+ dwc2_set_txfifo(2, CONFIG_USB_DWC2_TX2_FIFO_SIZE / 4);
+ dwc2_set_txfifo(3, CONFIG_USB_DWC2_TX3_FIFO_SIZE / 4);
#if USB_NUM_BIDIR_ENDPOINTS > 4
- usb_set_txfifo(4, CONFIG_USB_DWC2_TX4_FIFO_SIZE / 4);
+ dwc2_set_txfifo(4, CONFIG_USB_DWC2_TX4_FIFO_SIZE / 4);
#endif
#if USB_NUM_BIDIR_ENDPOINTS > 5
- usb_set_txfifo(5, CONFIG_USB_DWC2_TX5_FIFO_SIZE / 4);
+ dwc2_set_txfifo(5, CONFIG_USB_DWC2_TX5_FIFO_SIZE / 4);
#endif
USB_OTG_GLB->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
USB_OTG_DEV->DCTL &= ~USB_OTG_DCTL_SDIS;
@@ -550,8 +550,8 @@ int usb_dc_deinit(void)
USB_OTG_DEV->DAINTMSK = 0U;
/* Flush the FIFO */
- usb_dwc2_flush_txfifo(0x10U);
- usb_dwc2_flush_rxfifo();
+ dwc2_flush_txfifo(0x10U);
+ dwc2_flush_rxfifo();
USB_OTG_DEV->DCTL |= USB_OTG_DCTL_SDIS;
@@ -794,7 +794,7 @@ int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_
void USBD_IRQHandler(void)
{
uint32_t gint_status, temp, epnum, ep_intr, epint;
- gint_status = usb_dwc2_get_glb_intstatus();
+ gint_status = dwc2_get_glb_intstatus();
if ((USB_OTG_GLB->GINTSTS & 0x1U) == USB_OTG_MODE_DEVICE) {
/* Avoid spurious interrupt */
@@ -828,10 +828,10 @@ void USBD_IRQHandler(void)
if (gint_status & USB_OTG_GINTSTS_OEPINT) {
epnum = 0;
- ep_intr = usb_dwc2_get_outeps_intstatus();
+ ep_intr = dwc2_get_outeps_intstatus();
while (ep_intr != 0U) {
if ((ep_intr & 0x1U) != 0U) {
- epint = usb_dwc2_get_outep_intstatus(epnum);
+ epint = dwc2_get_outep_intstatus(epnum);
USB_OTG_OUTEP(epnum)->DOEPINT = epint;
if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) {
@@ -853,10 +853,10 @@ void USBD_IRQHandler(void)
}
if (gint_status & USB_OTG_GINTSTS_IEPINT) {
epnum = 0U;
- ep_intr = usb_dwc2_get_ineps_intstatus();
+ ep_intr = dwc2_get_ineps_intstatus();
while (ep_intr != 0U) {
if ((ep_intr & 0x1U) != 0U) {
- epint = usb_dwc2_get_inep_intstatus(epnum);
+ epint = dwc2_get_inep_intstatus(epnum);
USB_OTG_INEP(epnum)->DIEPINT = epint;
if ((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) {
@@ -875,8 +875,8 @@ void USBD_IRQHandler(void)
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_USBRST;
USB_OTG_DEV->DCTL &= ~USB_OTG_DCTL_RWUSIG;
- usb_dwc2_flush_txfifo(0x10U);
- usb_dwc2_flush_rxfifo();
+ dwc2_flush_txfifo(0x10U);
+ dwc2_flush_rxfifo();
for (uint8_t i = 0U; i < USB_NUM_BIDIR_ENDPOINTS; i++) {
USB_OTG_INEP(i)->DIEPINT = 0xFB7FU;
USB_OTG_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
@@ -897,7 +897,7 @@ void USBD_IRQHandler(void)
}
if (gint_status & USB_OTG_GINTSTS_ENUMDNE) {
USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_ENUMDNE;
- usb_dwc2_set_turnaroundtime(SystemCoreClock, usb_dwc2_get_devspeed());
+ dwc2_set_turnaroundtime(SystemCoreClock, dwc2_get_devspeed());
USB_OTG_DEV->DCTL |= USB_OTG_DCTL_CGINAK;
}
if (gint_status & USB_OTG_GINTSTS_SOF) {
diff --git a/port/dwc2/usb_dwc2_reg.h b/port/dwc2/usb_dwc2_reg.h
index ec137b20..aeb0a55f 100644
--- a/port/dwc2/usb_dwc2_reg.h
+++ b/port/dwc2/usb_dwc2_reg.h
@@ -1696,9 +1696,9 @@ typedef struct
#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
-#define USB_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM)
-#define USB_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
-#define CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__))
+#define USB_MASK_HALT_HC_INT(chnum) (USB_OTG_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM)
+#define USB_UNMASK_HALT_HC_INT(chnum) (USB_OTG_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
+#define CLEAR_HC_INT(chnum, __INTERRUPT__) (USB_OTG_HC(chnum)->HCINT = (__INTERRUPT__))
#endif
diff --git a/port/dwc2/usb_hc_dwc2.c b/port/dwc2/usb_hc_dwc2.c
index d8bf8a7d..30a85572 100644
--- a/port/dwc2/usb_hc_dwc2.c
+++ b/port/dwc2/usb_hc_dwc2.c
@@ -9,15 +9,15 @@
#define USB_BASE (0x40040000UL)
#endif
-#ifndef CONFIG_USB_DWC2_CHANNELS
-#define CONFIG_USB_DWC2_CHANNELS 12 /* Number of host channels */
+#ifndef CONFIG_USB_DWC2_PIPE_NUM
+#define CONFIG_USB_DWC2_PIPE_NUM 12 /* Number of host channels */
#endif
#define USB_OTG_GLB ((USB_OTG_GlobalTypeDef *)(USB_BASE))
#define USB_OTG_PCGCCTL *(__IO uint32_t *)((uint32_t)USB_BASE + USB_OTG_PCGCCTL_BASE)
-#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USB_BASE + USB_OTG_HOST_PORT_BASE)
-#define USBx_HOST ((USB_OTG_HostTypeDef *)(USB_BASE + USB_OTG_HOST_BASE))
-#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USB_BASE + USB_OTG_HOST_CHANNEL_BASE + ((i)*USB_OTG_HOST_CHANNEL_SIZE)))
+#define USB_OTG_HPRT *(__IO uint32_t *)((uint32_t)USB_BASE + USB_OTG_HOST_PORT_BASE)
+#define USB_OTG_HOST ((USB_OTG_HostTypeDef *)(USB_BASE + USB_OTG_HOST_BASE))
+#define USB_OTG_HC(i) ((USB_OTG_HostChannelTypeDef *)(USB_BASE + USB_OTG_HOST_CHANNEL_BASE + ((i)*USB_OTG_HOST_CHANNEL_SIZE)))
#define USB_OTG_FIFO(i) *(__IO uint32_t *)(USB_BASE + USB_OTG_FIFO_BASE + ((i)*USB_OTG_FIFO_SIZE))
/* This structure retains the state of one host channel. NOTE: Since there
@@ -33,10 +33,10 @@ struct dwc2_pipe {
uint8_t speed;
uint8_t dev_addr;
uint8_t data_pid;
- bool inuse; /* True: This channel is "in use" */
- uint8_t interval; /* Interrupt/isochronous EP polling interval */
- uint32_t xferlen; /* for HCTSIZx*/
- uint8_t num_packets; /* for HCTSIZx*/
+ bool inuse; /* True: This channel is "in use" */
+ uint8_t interval; /* Interrupt/isochronous EP polling interval */
+ uint32_t xferlen; /* for HCTSIZx*/
+ uint8_t num_packets; /* for HCTSIZx*/
volatile int result; /* The result of the transfer */
volatile uint32_t xfrd; /* Bytes transferred (at end of transfer) */
volatile bool waiter; /* True: Thread is waiting for a channel event */
@@ -48,23 +48,13 @@ struct dwc2_pipe {
#endif
};
-/* A channel represents on uni-directional endpoint. So, in the case of the
- * bi-directional, control endpoint, there must be two channels to represent
- * the endpoint.
- */
-
-struct usb_dwc2_ctrlinfo {
- uint8_t inndx; /* EP0 IN control channel index */
- uint8_t outndx; /* EP0 OUT control channel index */
-};
-
struct dwc2_hcd {
volatile bool connected;
struct usb_work work;
- struct dwc2_pipe chan[CONFIG_USB_DWC2_CHANNELS];
+ struct dwc2_pipe chan[CONFIG_USB_DWC2_PIPE_NUM];
} g_dwc2_hcd;
-static int usb_dwc2_reset(void)
+static inline int dwc2_reset(void)
{
uint32_t count = 0U;
@@ -88,7 +78,7 @@ static int usb_dwc2_reset(void)
return 0;
}
-static inline int usb_dwc2_core_init(void)
+static inline int dwc2_core_init(void)
{
int ret;
#if defined(CONFIG_USB_DWC2_ULPI_PHY)
@@ -98,7 +88,7 @@ static inline int usb_dwc2_core_init(void)
USB_OTG_GLB->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
#endif
/* Reset after a PHY select */
- ret = usb_dwc2_reset();
+ ret = dwc2_reset();
/* Activate the USB Transceiver */
USB_OTG_GLB->GCCFG |= USB_OTG_GCCFG_PWRDWN;
@@ -106,7 +96,7 @@ static inline int usb_dwc2_core_init(void)
return ret;
}
-static void usb_dwc2_set_mode(uint8_t mode)
+static inline void dwc2_set_mode(uint8_t mode)
{
USB_OTG_GLB->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
@@ -117,7 +107,7 @@ static void usb_dwc2_set_mode(uint8_t mode)
}
}
-static int usb_dwc2_flush_rxfifo(void)
+static inline int dwc2_flush_rxfifo(void)
{
uint32_t count = 0;
@@ -132,7 +122,7 @@ static int usb_dwc2_flush_rxfifo(void)
return 0;
}
-static int usb_dwc2_flush_txfifo(uint32_t num)
+static inline int dwc2_flush_txfifo(uint32_t num)
{
uint32_t count = 0U;
@@ -147,44 +137,20 @@ static int usb_dwc2_flush_txfifo(uint32_t num)
return 0;
}
-static void usb_dwc2_drivebus(uint8_t state)
+static inline void dwc2_drivebus(uint8_t state)
{
__IO uint32_t hprt0 = 0U;
- hprt0 = USBx_HPRT0;
+ hprt0 = USB_OTG_HPRT;
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
if (((hprt0 & USB_OTG_HPRT_PPWR) == 0U) && (state == 1U)) {
- USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
+ USB_OTG_HPRT = (USB_OTG_HPRT_PPWR | hprt0);
}
if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0U)) {
- USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
- }
-}
-
-/**
- * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
- * HCFG register on the PHY type and set the right frame interval
- * @param USBx Selected device
- * @param freq clock frequency
- * This parameter can be one of these values:
- * HCFG_48_MHZ : Full Speed 48 MHz Clock
- * HCFG_6_MHZ : Low Speed 6 MHz Clock
- * @retval HAL status
- */
-static void usb_dwc2_init_fsls_pclksel(uint8_t freq)
-{
- USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
- USBx_HOST->HCFG |= (uint32_t)freq & USB_OTG_HCFG_FSLSPCS;
-
- if (freq == HCFG_48_MHZ) {
- USBx_HOST->HFIR = 48000U;
- } else if (freq == HCFG_6_MHZ) {
- USBx_HOST->HFIR = 6000U;
- } else {
- /* ... */
+ USB_OTG_HPRT = ((~USB_OTG_HPRT_PPWR) & hprt0);
}
}
@@ -193,7 +159,7 @@ static void dwc2_pipe_init(uint8_t ch_num, uint8_t devaddr, uint8_t ep_addr, uin
uint32_t regval;
/* Clear old interrupt conditions for this host channel. */
- USBx_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU;
+ USB_OTG_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU;
/* Enable channel interrupts required for this transfer. */
regval = USB_OTG_HCINTMSK_XFRCM |
@@ -221,10 +187,10 @@ static void dwc2_pipe_init(uint8_t ch_num, uint8_t devaddr, uint8_t ep_addr, uin
break;
}
- USBx_HC((uint32_t)ch_num)->HCINTMSK = regval;
+ USB_OTG_HC((uint32_t)ch_num)->HCINTMSK = regval;
/* Enable the top level host channel interrupt. */
- USBx_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU);
+ USB_OTG_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU);
/* Make sure host channel interrupts are enabled. */
USB_OTG_GLB->GINTMSK |= USB_OTG_GINTMSK_HCIM;
@@ -249,10 +215,10 @@ static void dwc2_pipe_init(uint8_t ch_num, uint8_t devaddr, uint8_t ep_addr, uin
regval |= USB_OTG_HCCHAR_ODDFRM;
}
- USBx_HC((uint32_t)ch_num)->HCCHAR = regval;
+ USB_OTG_HC((uint32_t)ch_num)->HCCHAR = regval;
}
-static uint8_t usb_dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_addr, uint16_t ep_mps, uint32_t *output_size)
+static uint8_t dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_addr, uint16_t ep_mps, uint32_t *output_size)
{
uint16_t num_packets;
@@ -274,26 +240,24 @@ static uint8_t usb_dwc2_calculate_packet_num(uint32_t input_size, uint8_t ep_add
*output_size = input_size;
return num_packets;
}
-/*
-* For IN channel HCTSIZ.XferSize is expected to be an integer multiple of
-* max_packet size.
-*/
-static inline void usb_dwc2_pipe_transfer(uint8_t ch_num, uint8_t ep_addr, uint32_t *buf, uint32_t size, uint8_t num_packets, uint8_t pid)
+
+/* For IN channel HCTSIZ.XferSize is expected to be an integer multiple of ep_mps size.*/
+static inline void dwc2_pipe_transfer(uint8_t ch_num, uint8_t ep_addr, uint32_t *buf, uint32_t size, uint8_t num_packets, uint8_t pid)
{
__IO uint32_t tmpreg;
uint8_t is_oddframe;
/* Initialize the HCTSIZn register */
- USBx_HC(ch_num)->HCTSIZ = (size & USB_OTG_HCTSIZ_XFRSIZ) |
- (((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
- (((uint32_t)pid << 29) & USB_OTG_HCTSIZ_DPID);
+ USB_OTG_HC(ch_num)->HCTSIZ = (size & USB_OTG_HCTSIZ_XFRSIZ) |
+ (((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
+ (((uint32_t)pid << 29) & USB_OTG_HCTSIZ_DPID);
/* xfer_buff MUST be 32-bits aligned */
- USBx_HC(ch_num)->HCDMA = (uint32_t)buf;
+ USB_OTG_HC(ch_num)->HCDMA = (uint32_t)buf;
- is_oddframe = (((uint32_t)USBx_HOST->HFNUM & 0x01U) != 0U) ? 0U : 1U;
- USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
- USBx_HC(ch_num)->HCCHAR |= (uint32_t)is_oddframe << 29;
+ is_oddframe = (((uint32_t)USB_OTG_HOST->HFNUM & 0x01U) != 0U) ? 0U : 1U;
+ USB_OTG_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
+ USB_OTG_HC(ch_num)->HCCHAR |= (uint32_t)is_oddframe << 29;
/* make sure to set the correct ep direction */
if (ep_addr & 0x80) {
@@ -303,17 +267,17 @@ static inline void usb_dwc2_pipe_transfer(uint8_t ch_num, uint8_t ep_addr, uint3
}
/* Set host channel enable */
- tmpreg = USBx_HC(ch_num)->HCCHAR;
+ tmpreg = USB_OTG_HC(ch_num)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR = tmpreg;
+ USB_OTG_HC(ch_num)->HCCHAR = tmpreg;
}
-static void usb_dwc2_halt(uint8_t ch_num)
+static void dwc2_halt(uint8_t ch_num)
{
uint32_t count = 0U;
- uint32_t HcEpType = (USBx_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
- uint32_t ChannelEna = (USBx_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) >> 31;
+ uint32_t HcEpType = (USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
+ uint32_t ChannelEna = (USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) >> 31;
if (((USB_OTG_GLB->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) &&
(ChannelEna == 0U)) {
@@ -322,44 +286,44 @@ static void usb_dwc2_halt(uint8_t ch_num)
/* Check for space in the request queue to issue the halt. */
if ((HcEpType == HCCHAR_CTRL) || (HcEpType == HCCHAR_BULK)) {
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
if ((USB_OTG_GLB->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U) {
if ((USB_OTG_GLB->HNPTXSTS & (0xFFU << 16)) == 0U) {
- USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
+ USB_OTG_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
do {
if (++count > 1000U) {
break;
}
- } while ((USBx_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ } while ((USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
} else {
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
}
}
} else {
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
- if ((USBx_HOST->HPTXSTS & (0xFFU << 16)) == 0U) {
- USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
- USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
+ if ((USB_OTG_HOST->HPTXSTS & (0xFFU << 16)) == 0U) {
+ USB_OTG_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
do {
if (++count > 1000U) {
break;
}
- } while ((USBx_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ } while ((USB_OTG_HC(ch_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
} else {
- USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ USB_OTG_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
}
}
}
/**
- * @brief USB_ReadInterrupts: return the global USB interrupt status
+ * @brief dwc2_get_glb_intstatus: return the global USB interrupt status
* @retval status
*/
-static inline uint32_t usb_dwc2_get_glb_intstatus(void)
+static inline uint32_t dwc2_get_glb_intstatus(void)
{
uint32_t tmpreg;
@@ -383,7 +347,7 @@ static int dwc2_pipe_alloc(void)
/* Search the table of channels */
- for (chidx = 0; chidx < CONFIG_USB_DWC2_CHANNELS; chidx++) {
+ for (chidx = 0; chidx < CONFIG_USB_DWC2_PIPE_NUM; chidx++) {
/* Is this channel available? */
if (!g_dwc2_hcd.chan[chidx].inuse) {
/* Yes... make it "in use" and return the index */
@@ -427,7 +391,7 @@ static inline void dwc2_pipe_freeall(void)
/* Free all host channels */
- for (chidx = 1; chidx < CONFIG_USB_DWC2_CHANNELS; chidx++) {
+ for (chidx = 1; chidx < CONFIG_USB_DWC2_PIPE_NUM; chidx++) {
dwc2_pipe_free(chidx);
}
}
@@ -612,7 +576,7 @@ int usb_hc_sw_init(void)
{
memset(&g_dwc2_hcd, 0, sizeof(struct dwc2_hcd));
- for (uint8_t chidx = 0; chidx < CONFIG_USB_DWC2_CHANNELS; chidx++) {
+ for (uint8_t chidx = 0; chidx < CONFIG_USB_DWC2_PIPE_NUM; chidx++) {
g_dwc2_hcd.chan[chidx].exclsem = usb_osal_mutex_create();
g_dwc2_hcd.chan[chidx].waitsem = usb_osal_sem_create(0);
}
@@ -628,9 +592,9 @@ int usb_hc_hw_init(void)
USB_OTG_GLB->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
- ret = usb_dwc2_core_init();
+ ret = dwc2_core_init();
/* Force Host Mode*/
- usb_dwc2_set_mode(USB_OTG_MODE_HOST);
+ dwc2_set_mode(USB_OTG_MODE_HOST);
usb_osal_msleep(50);
/* Restart the Phy Clock */
@@ -649,22 +613,22 @@ int usb_hc_hw_init(void)
USB_OTG_GLB->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
USB_OTG_GLB->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
#endif
- USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSPCS_0;
+ USB_OTG_HOST->HCFG |= USB_OTG_HCFG_FSLSPCS_0;
usbh_reset_port(1);
/* Set default Max speed support */
- USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
+ USB_OTG_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
- ret = usb_dwc2_flush_txfifo(0x10U);
- ret = usb_dwc2_flush_rxfifo();
+ ret = dwc2_flush_txfifo(0x10U);
+ ret = dwc2_flush_rxfifo();
/* Clear all pending HC Interrupts */
- for (uint8_t i = 0U; i < CONFIG_USB_DWC2_CHANNELS; i++) {
- USBx_HC(i)->HCINT = 0xFFFFFFFFU;
- USBx_HC(i)->HCINTMSK = 0U;
+ for (uint8_t i = 0U; i < CONFIG_USB_DWC2_PIPE_NUM; i++) {
+ USB_OTG_HC(i)->HCINT = 0xFFFFFFFFU;
+ USB_OTG_HC(i)->HCINTMSK = 0U;
}
- usb_dwc2_drivebus(1);
+ dwc2_drivebus(1);
usb_osal_msleep(200);
/* Disable all interrupts. */
@@ -697,7 +661,7 @@ bool usbh_get_port_connect_status(const uint8_t port)
{
__IO uint32_t hprt0;
- hprt0 = USBx_HPRT0;
+ hprt0 = USB_OTG_HPRT;
if ((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS) {
return true;
@@ -710,14 +674,14 @@ int usbh_reset_port(const uint8_t port)
{
__IO uint32_t hprt0 = 0U;
- hprt0 = USBx_HPRT0;
+ hprt0 = USB_OTG_HPRT;
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
- USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
+ USB_OTG_HPRT = (USB_OTG_HPRT_PRST | hprt0);
usb_osal_msleep(100U); /* See Note #1 */
- USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
+ USB_OTG_HPRT = ((~USB_OTG_HPRT_PRST) & hprt0);
usb_osal_msleep(10U);
return 0;
}
@@ -727,7 +691,7 @@ uint8_t usbh_get_port_speed(const uint8_t port)
__IO uint32_t hprt0 = 0U;
uint8_t speed;
- hprt0 = USBx_HPRT0;
+ hprt0 = USB_OTG_HPRT;
speed = (hprt0 & USB_OTG_HPRT_PSPD) >> 17;
@@ -821,9 +785,9 @@ int usbh_control_transfer(usbh_epinfo_t ep, struct usb_setup_packet *setup, uint
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(8, chan->ep_addr, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(8, chan->ep_addr, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x00, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x00, (uint32_t *)setup, chan->xferlen, chan->num_packets, HC_PID_SETUP);
+ dwc2_pipe_transfer(chidx, 0x00, (uint32_t *)setup, chan->xferlen, chan->num_packets, HC_PID_SETUP);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
@@ -833,18 +797,18 @@ int usbh_control_transfer(usbh_epinfo_t ep, struct usb_setup_packet *setup, uint
if (setup->bmRequestType & 0x80) {
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(setup->wLength, 0x80, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(setup->wLength, 0x80, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x80, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x80, (uint32_t *)buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1);
+ dwc2_pipe_transfer(chidx, 0x80, (uint32_t *)buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
}
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(0, 0x00, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(0, 0x00, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x00, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x00, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
+ dwc2_pipe_transfer(chidx, 0x00, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
@@ -852,18 +816,18 @@ int usbh_control_transfer(usbh_epinfo_t ep, struct usb_setup_packet *setup, uint
} else {
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(setup->wLength, 0x00, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(setup->wLength, 0x00, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x00, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x00, (uint32_t *)buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1);
+ dwc2_pipe_transfer(chidx, 0x00, (uint32_t *)buffer, chan->xferlen, chan->num_packets, HC_PID_DATA1);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
}
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(0, 0x80, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(0, 0x80, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x80, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x80, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
+ dwc2_pipe_transfer(chidx, 0x80, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
@@ -872,9 +836,9 @@ int usbh_control_transfer(usbh_epinfo_t ep, struct usb_setup_packet *setup, uint
} else {
chan->waiter = true;
chan->result = -EBUSY;
- chan->num_packets = usb_dwc2_calculate_packet_num(0, 0x80, chan->ep_mps, &chan->xferlen);
+ chan->num_packets = dwc2_calculate_packet_num(0, 0x80, chan->ep_mps, &chan->xferlen);
dwc2_pipe_init(chidx, chan->dev_addr, 0x80, 0x00, chan->ep_mps, chan->speed);
- usb_dwc2_pipe_transfer(chidx, 0x80, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
+ dwc2_pipe_transfer(chidx, 0x80, NULL, chan->xferlen, chan->num_packets, HC_PID_DATA1);
ret = dwc2_pipe_wait(chan, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT);
if (ret < 0) {
goto error_out;
@@ -907,8 +871,8 @@ int usbh_ep_bulk_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, ui
goto error_out;
}
- chan->num_packets = usb_dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
- usb_dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
+ chan->num_packets = dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
+ dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
ret = dwc2_pipe_wait(chan, timeout);
if (ret < 0) {
goto error_out;
@@ -941,8 +905,8 @@ int usbh_ep_intr_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t buflen, ui
goto error_out;
}
- chan->num_packets = usb_dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
- usb_dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
+ chan->num_packets = dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
+ dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
ret = dwc2_pipe_wait(chan, timeout);
if (ret < 0) {
goto error_out;
@@ -974,8 +938,8 @@ int usbh_ep_bulk_async_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t bufl
goto error_out;
}
- chan->num_packets = usb_dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
- usb_dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
+ chan->num_packets = dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
+ dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
return 0;
error_out:
@@ -1002,8 +966,8 @@ int usbh_ep_intr_async_transfer(usbh_epinfo_t ep, uint8_t *buffer, uint32_t bufl
goto error_out;
}
- chan->num_packets = usb_dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
- usb_dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
+ chan->num_packets = dwc2_calculate_packet_num(buflen, chan->ep_addr, chan->ep_mps, &chan->xferlen);
+ dwc2_pipe_transfer(chidx, chan->ep_addr, (uint32_t *)buffer, chan->xferlen, chan->num_packets, chan->data_pid);
return 0;
error_out:
@@ -1055,7 +1019,7 @@ int usb_ep_cancel(usbh_epinfo_t ep)
return 0;
}
-void usb_dwc2_reset_handler(void *arg)
+void dwc2_reset_handler(void *arg)
{
usbh_reset_port(1);
}
@@ -1110,18 +1074,18 @@ void usb_dwc2_reset_handler(void *arg)
// }
//}
-static void usb_dwc2_inchan_irq_handler(uint8_t ch_num)
+static void dwc2_inchan_irq_handler(uint8_t ch_num)
{
uint32_t chan_intstatus;
struct dwc2_pipe *chan;
- chan_intstatus = (USBx_HC(ch_num)->HCINT) & (USBx_HC((uint32_t)ch_num)->HCINTMSK);
+ chan_intstatus = (USB_OTG_HC(ch_num)->HCINT) & (USB_OTG_HC((uint32_t)ch_num)->HCINTMSK);
chan = &g_dwc2_hcd.chan[ch_num];
if ((chan_intstatus & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC) {
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = 0;
USB_UNMASK_HALT_HC_INT(ch_num);
} else if ((chan_intstatus & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR) {
@@ -1130,47 +1094,47 @@ static void usb_dwc2_inchan_irq_handler(uint8_t ch_num)
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
} else if ((chan_intstatus & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EPERM;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
} else if ((chan_intstatus & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EAGAIN;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
} else if ((chan_intstatus & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK) {
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
} else if ((chan_intstatus & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EAGAIN;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
} else if ((chan_intstatus & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
} else if ((chan_intstatus & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
} else if ((chan_intstatus & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EPIPE;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
} else if ((chan_intstatus & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
} else if ((chan_intstatus & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH) {
USB_MASK_HALT_HC_INT(ch_num);
if (chan->result == 0) {
- uint32_t count = chan->xferlen - (USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* size that has received */
- uint32_t has_sent_packets = chan->num_packets - ((USBx_HC(ch_num)->HCTSIZ & USB_OTG_DIEPTSIZ_PKTCNT) >> 19); /*how many packets has sent*/
+ uint32_t count = chan->xferlen - (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* size that has received */
+ uint32_t has_sent_packets = chan->num_packets - ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_DIEPTSIZ_PKTCNT) >> 19); /*how many packets has sent*/
chan->xfrd += count;
@@ -1189,19 +1153,19 @@ static void usb_dwc2_inchan_irq_handler(uint8_t ch_num)
}
}
-static void usb_dwc2_outchan_irq_handler(uint8_t ch_num)
+static void dwc2_outchan_irq_handler(uint8_t ch_num)
{
uint32_t chan_intstatus;
struct dwc2_pipe *chan;
uint16_t buflen;
- chan_intstatus = (USBx_HC(ch_num)->HCINT) & (USBx_HC((uint32_t)ch_num)->HCINTMSK);
+ chan_intstatus = (USB_OTG_HC(ch_num)->HCINT) & (USB_OTG_HC((uint32_t)ch_num)->HCINTMSK);
chan = &g_dwc2_hcd.chan[ch_num];
if ((chan_intstatus & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC) {
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = 0;
USB_UNMASK_HALT_HC_INT(ch_num);
} else if ((chan_intstatus & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR) {
@@ -1210,46 +1174,46 @@ static void usb_dwc2_outchan_irq_handler(uint8_t ch_num)
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
} else if ((chan_intstatus & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EPERM;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
} else if ((chan_intstatus & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EAGAIN;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
} else if ((chan_intstatus & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK) {
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
} else if ((chan_intstatus & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EAGAIN;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
} else if ((chan_intstatus & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
} else if ((chan_intstatus & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
} else if ((chan_intstatus & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EPIPE;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
} else if ((chan_intstatus & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR) {
USB_UNMASK_HALT_HC_INT(ch_num);
- usb_dwc2_halt(ch_num);
+ dwc2_halt(ch_num);
chan->result = -EIO;
CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
} else if ((chan_intstatus & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH) {
USB_MASK_HALT_HC_INT(ch_num);
if (chan->result == 0) {
- uint32_t count = (USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* last send size */
+ uint32_t count = (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* last send size */
if (count == chan->ep_mps) {
chan->xfrd += chan->num_packets * chan->ep_mps;
@@ -1272,13 +1236,13 @@ static void usb_dwc2_outchan_irq_handler(uint8_t ch_num)
}
}
-static void usb_dwc2_port_irq_handler(void)
+static void dwc2_port_irq_handler(void)
{
__IO uint32_t hprt0, hprt0_dup, regval;
/* Handle Host Port Interrupts */
- hprt0 = USBx_HPRT0;
- hprt0_dup = USBx_HPRT0;
+ hprt0 = USB_OTG_HPRT;
+ hprt0_dup = USB_OTG_HPRT;
hprt0_dup &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
@@ -1286,7 +1250,11 @@ static void usb_dwc2_port_irq_handler(void)
/* Check whether Port Connect detected */
if ((hprt0 & USB_OTG_HPRT_PCDET) == USB_OTG_HPRT_PCDET) {
if ((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS) {
- usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, usb_dwc2_reset_handler, NULL, 0);
+ if (!g_dwc2_hcd.connected) {
+ g_dwc2_hcd.connected = true;
+ usbh_event_notify_handler(USBH_EVENT_CONNECTED, 1);
+ }
+ //usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, dwc2_reset_handler, NULL, 0);
}
hprt0_dup |= USB_OTG_HPRT_PCDET;
}
@@ -1299,44 +1267,27 @@ static void usb_dwc2_port_irq_handler(void)
#if defined(CONFIG_USB_DWC2_ULPI_PHY)
#else
if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17)) {
- USBx_HOST->HFIR = 6000U;
- if ((USBx_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_1) {
- regval = USBx_HOST->HCFG;
+ USB_OTG_HOST->HFIR = 6000U;
+ if ((USB_OTG_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_1) {
+ regval = USB_OTG_HOST->HCFG;
regval &= ~USB_OTG_HCFG_FSLSPCS;
regval |= USB_OTG_HCFG_FSLSPCS_1;
- USBx_HOST->HCFG = regval;
- usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, usb_dwc2_reset_handler, NULL, 0);
+ USB_OTG_HOST->HCFG = regval;
+ //usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, dwc2_reset_handler, NULL, 0);
}
} else {
- USBx_HOST->HFIR = 48000U;
- if ((USBx_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_0) {
- regval = USBx_HOST->HCFG;
+ USB_OTG_HOST->HFIR = 48000U;
+ if ((USB_OTG_HOST->HCFG & USB_OTG_HCFG_FSLSPCS) != USB_OTG_HCFG_FSLSPCS_0) {
+ regval = USB_OTG_HOST->HCFG;
regval &= ~USB_OTG_HCFG_FSLSPCS;
regval |= USB_OTG_HCFG_FSLSPCS_0;
- USBx_HOST->HCFG = regval;
- usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, usb_dwc2_reset_handler, NULL, 0);
+ USB_OTG_HOST->HCFG = regval;
+ //usb_workqueue_submit(&g_hpworkq, &g_dwc2_hcd.work, dwc2_reset_handler, NULL, 0);
}
}
#endif
- if (!g_dwc2_hcd.connected) {
- g_dwc2_hcd.connected = true;
- usbh_event_notify_handler(USBH_EVENT_CONNECTED, 1);
- }
} else {
- if (g_dwc2_hcd.connected) {
- g_dwc2_hcd.connected = false;
-
- for (int chidx = 0; chidx < CONFIG_USB_DWC2_CHANNELS; chidx++) {
- struct dwc2_pipe *chan;
- chan = &g_dwc2_hcd.chan[chidx];
- if ((chan->ep_type == 0x00) && chan->waiter) {
- chan->waiter = false;
- usb_osal_sem_give(chan->waitsem);
- }
- }
- usbh_event_notify_handler(USBH_EVENT_DISCONNECTED, 1);
- }
}
}
@@ -1345,13 +1296,13 @@ static void usb_dwc2_port_irq_handler(void)
hprt0_dup |= USB_OTG_HPRT_POCCHNG;
}
/* Clear Port Interrupts */
- USBx_HPRT0 = hprt0_dup;
+ USB_OTG_HPRT = hprt0_dup;
}
void USBH_IRQHandler(void)
{
uint32_t gint_status, chan_int;
- gint_status = usb_dwc2_get_glb_intstatus();
+ gint_status = dwc2_get_glb_intstatus();
if ((USB_OTG_GLB->GINTSTS & 0x1U) == USB_OTG_MODE_HOST) {
/* Avoid spurious interrupt */
if (gint_status == 0) {
@@ -1359,9 +1310,22 @@ void USBH_IRQHandler(void)
}
if (gint_status & USB_OTG_GINTSTS_HPRTINT) {
- usb_dwc2_port_irq_handler();
+ dwc2_port_irq_handler();
}
if (gint_status & USB_OTG_GINTSTS_DISCINT) {
+ if (g_dwc2_hcd.connected) {
+ g_dwc2_hcd.connected = false;
+
+ for (int chidx = 0; chidx < CONFIG_USB_DWC2_PIPE_NUM; chidx++) {
+ struct dwc2_pipe *chan;
+ chan = &g_dwc2_hcd.chan[chidx];
+ if (chan->waiter) {
+ chan->waiter = false;
+ usb_osal_sem_give(chan->waitsem);
+ }
+ }
+ usbh_event_notify_handler(USBH_EVENT_DISCONNECTED, 1);
+ }
USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_DISCINT;
}
// if (gint_status & USB_OTG_GINTSTS_RXFLVL) {
@@ -1370,13 +1334,13 @@ void USBH_IRQHandler(void)
// USB_UNMASK_INTERRUPT(USB_OTG_GLB, USB_OTG_GINTSTS_RXFLVL);
// }
if (gint_status & USB_OTG_GINTSTS_HCINT) {
- chan_int = (USBx_HOST->HAINT & USBx_HOST->HAINTMSK) & 0xFFFFU;
- for (uint8_t i = 0U; i < CONFIG_USB_DWC2_CHANNELS; i++) {
+ chan_int = (USB_OTG_HOST->HAINT & USB_OTG_HOST->HAINTMSK) & 0xFFFFU;
+ for (uint8_t i = 0U; i < CONFIG_USB_DWC2_PIPE_NUM; i++) {
if ((chan_int & (1UL << (i & 0xFU))) != 0U) {
- if ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_EPDIR) == USB_OTG_HCCHAR_EPDIR) {
- usb_dwc2_inchan_irq_handler(i);
+ if ((USB_OTG_HC(i)->HCCHAR & USB_OTG_HCCHAR_EPDIR) == USB_OTG_HCCHAR_EPDIR) {
+ dwc2_inchan_irq_handler(i);
} else {
- usb_dwc2_outchan_irq_handler(i);
+ dwc2_outchan_irq_handler(i);
}
}
}
diff --git a/port/fsdev/usb_dc_fsdev.c b/port/fsdev/usb_dc_fsdev.c
index ed85228b..a45db033 100644
--- a/port/fsdev/usb_dc_fsdev.c
+++ b/port/fsdev/usb_dc_fsdev.c
@@ -21,8 +21,8 @@
#define USB_BTABLE_SIZE (8 * USB_NUM_BIDIR_ENDPOINTS)
-static void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-static void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
+static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
+static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
/* Endpoint state */
struct fsdev_ep_state {
@@ -39,8 +39,8 @@ struct fsdev_ep_state {
/* Driver state */
struct fsdev_udc {
- volatile uint8_t dev_addr; /*!< USB Address */
- volatile uint32_t pma_offset; /*!< pma offset */
+ volatile uint8_t dev_addr; /*!< USB Address */
+ volatile uint32_t pma_offset; /*!< pma offset */
struct fsdev_ep_state in_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< IN endpoint parameters*/
struct fsdev_ep_state out_ep[USB_NUM_BIDIR_ENDPOINTS]; /*!< OUT endpoint parameters */
} g_fsdev_udc;
@@ -272,7 +272,7 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint
data_len = g_fsdev_udc.in_ep[ep_idx].ep_mps;
}
- USB_WritePMA(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len);
+ fsdev_write_pma(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len);
PCD_SET_EP_TX_CNT(USB, ep_idx, (uint16_t)data_len);
PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID);
@@ -301,7 +301,7 @@ int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_
read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
read_count = MIN(read_count, max_data_len);
- USB_ReadPMA(USB, (uint8_t *)data, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
+ fsdev_read_pma(USB, (uint8_t *)data, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
if (read_bytes) {
*read_bytes = read_count;
@@ -439,7 +439,7 @@ void USBD_IRQHandler(void)
}
}
-static void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
+static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
uint32_t BaseAddr = (uint32_t)USBx;
@@ -472,7 +472,7 @@ static void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufA
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
-static void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
+static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
uint32_t n = (uint32_t)wNBytes >> 1;
uint32_t BaseAddr = (uint32_t)USBx;
diff --git a/port/musb/usb_dc_musb.c b/port/musb/usb_dc_musb.c
index 4f5faca6..6b808668 100644
--- a/port/musb/usb_dc_musb.c
+++ b/port/musb/usb_dc_musb.c
@@ -126,18 +126,18 @@ static volatile uint8_t usb_ep0_state = USB_EP0_STATE_SETUP;
volatile uint16_t ep0_last_size = 0;
/* get current active ep */
-static uint8_t USBC_GetActiveEp(void)
+static uint8_t musb_get_active_ep(void)
{
return HWREGB(USB_BASE + MUSB_EPIDX_OFFSET);
}
/* set the active ep */
-static void USBC_SelectActiveEp(uint8_t ep_index)
+static void musb_set_active_ep(uint8_t ep_index)
{
HWREGB(USB_BASE + MUSB_EPIDX_OFFSET) = ep_index;
}
-static void usb_musb_write_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
+static void musb_write_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
{
uint32_t *buf32;
uint8_t *buf8;
@@ -168,7 +168,7 @@ static void usb_musb_write_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
}
}
-static void usb_musb_read_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
+static void musb_read_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
{
uint32_t *buf32;
uint8_t *buf8;
@@ -199,7 +199,7 @@ static void usb_musb_read_packet(uint8_t ep_idx, uint8_t *buffer, uint16_t len)
}
}
-static uint32_t usb_musb_get_fifo_size(uint16_t mps, uint16_t *used)
+static uint32_t musb_get_fifo_size(uint16_t mps, uint16_t *used)
{
uint32_t size;
@@ -241,7 +241,7 @@ int usb_dc_init(void)
HWREGB(USB_BASE + MUSB_POWER_OFFSET) &= ~USB_POWER_HSENAB;
#endif
- USBC_SelectActiveEp(0);
+ musb_set_active_ep(0);
HWREGB(USB_BASE + MUSB_FADDR_OFFSET) = 0;
HWREGB(USB_BASE + MUSB_DEVCTL_OFFSET) |= USB_DEVCTL_SESSION;
@@ -283,8 +283,8 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
return 0;
}
- old_ep_idx = USBC_GetActiveEp();
- USBC_SelectActiveEp(ep_idx);
+ old_ep_idx = musb_get_active_ep();
+ musb_set_active_ep(ep_idx);
if (USB_EP_DIR_IS_OUT(ep_cfg->ep_addr)) {
g_musb_udc.out_ep[ep_idx].ep_mps = ep_cfg->ep_mps;
@@ -332,7 +332,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
else
HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) = USB_RXCSRL1_CLRDT;
- fifo_size = usb_musb_get_fifo_size(ep_cfg->ep_mps, &used);
+ fifo_size = musb_get_fifo_size(ep_cfg->ep_mps, &used);
HWREGB(USB_BASE + MUSB_RXFIFOSZ_OFFSET) = fifo_size & 0x0f;
HWREGH(USB_BASE + MUSB_RXFIFOADD_OFFSET) = (g_musb_udc.fifo_size_offset >> 3);
@@ -378,7 +378,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
else
HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_TXCSRL1_CLRDT;
- fifo_size = usb_musb_get_fifo_size(ep_cfg->ep_mps, &used);
+ fifo_size = musb_get_fifo_size(ep_cfg->ep_mps, &used);
HWREGB(USB_BASE + MUSB_TXFIFOSZ_OFFSET) = fifo_size & 0x0f;
HWREGH(USB_BASE + MUSB_TXFIFOADD_OFFSET) = (g_musb_udc.fifo_size_offset >> 3);
@@ -386,7 +386,7 @@ int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg)
g_musb_udc.fifo_size_offset += used;
}
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
return 0;
}
@@ -401,8 +401,8 @@ int usbd_ep_set_stall(const uint8_t ep)
uint8_t ep_idx = USB_EP_GET_IDX(ep);
uint8_t old_ep_idx;
- old_ep_idx = USBC_GetActiveEp();
- USBC_SelectActiveEp(ep_idx);
+ old_ep_idx = musb_get_active_ep();
+ musb_set_active_ep(ep_idx);
if (USB_EP_DIR_IS_OUT(ep)) {
if (ep_idx == 0x00) {
@@ -420,7 +420,7 @@ int usbd_ep_set_stall(const uint8_t ep)
}
}
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
return 0;
}
@@ -429,8 +429,8 @@ int usbd_ep_clear_stall(const uint8_t ep)
uint8_t ep_idx = USB_EP_GET_IDX(ep);
uint8_t old_ep_idx;
- old_ep_idx = USBC_GetActiveEp();
- USBC_SelectActiveEp(ep_idx);
+ old_ep_idx = musb_get_active_ep();
+ musb_set_active_ep(ep_idx);
if (USB_EP_DIR_IS_OUT(ep)) {
if (ep_idx == 0x00) {
@@ -452,7 +452,7 @@ int usbd_ep_clear_stall(const uint8_t ep)
}
}
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
return 0;
}
@@ -472,8 +472,8 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint
return -1;
}
- old_ep_idx = USBC_GetActiveEp();
- USBC_SelectActiveEp(ep_idx);
+ old_ep_idx = musb_get_active_ep();
+ musb_set_active_ep(ep_idx);
if (ep_idx != 0x00) {
while (HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_TXRDY) {
@@ -503,7 +503,7 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint
data_len = g_musb_udc.in_ep[ep_idx].ep_mps;
}
- usb_musb_write_packet(ep_idx, (uint8_t *)data, data_len);
+ musb_write_packet(ep_idx, (uint8_t *)data, data_len);
if (ep == 0x00) {
HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_CSRL0_TXRDY;
@@ -516,7 +516,7 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint
}
_RET:
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
return ret;
}
@@ -531,8 +531,8 @@ int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_
return -1;
}
- old_ep_idx = USBC_GetActiveEp();
- USBC_SelectActiveEp(ep_idx);
+ old_ep_idx = musb_get_active_ep();
+ musb_set_active_ep(ep_idx);
if (!max_data_len) {
if (ep_idx != 0x00)
@@ -546,12 +546,12 @@ int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_
} else {
read_count = HWREGH(USB_BASE + MUSB_IND_RXCOUNT_OFFSET);
read_count = MIN(read_count, max_data_len);
- usb_musb_read_packet(0, data, read_count);
+ musb_read_packet(0, data, read_count);
}
} else {
read_count = HWREGH(USB_BASE + MUSB_IND_RXCOUNT_OFFSET);
read_count = MIN(read_count, max_data_len);
- usb_musb_read_packet(ep_idx, data, read_count);
+ musb_read_packet(ep_idx, data, read_count);
}
if (read_bytes) {
@@ -559,7 +559,7 @@ int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len, uint32_
}
_RET:
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
return ret;
}
@@ -591,7 +591,7 @@ static void handle_ep0(void)
return;
}
- usb_musb_read_packet(0, (uint8_t *)&g_musb_udc.setup, 8);
+ musb_read_packet(0, (uint8_t *)&g_musb_udc.setup, 8);
if (g_musb_udc.setup.wLength) {
HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_CSRL0_RXRDYC;
} else {
@@ -663,7 +663,7 @@ void USBD_IRQHandler(void)
HWREGB(USB_BASE + MUSB_IS_OFFSET) = is;
- old_ep_idx = USBC_GetActiveEp();
+ old_ep_idx = musb_get_active_ep();
/* Receive a reset signal from the USB bus */
if (is & USB_IS_RESET) {
@@ -672,7 +672,7 @@ void USBD_IRQHandler(void)
HWREGH(USB_BASE + MUSB_RXIE_OFFSET) = 0;
for (uint8_t i = 1; i < USB_NUM_BIDIR_ENDPOINTS; i++) {
- USBC_SelectActiveEp(i);
+ musb_set_active_ep(i);
HWREGB(USB_BASE + MUSB_TXFIFOSZ_OFFSET) = 0;
HWREGH(USB_BASE + MUSB_TXFIFOADD_OFFSET) = 0;
HWREGB(USB_BASE + MUSB_RXFIFOSZ_OFFSET) = 0;
@@ -694,31 +694,32 @@ void USBD_IRQHandler(void)
/* Handle EP0 interrupt */
if (txis & USB_TXIE_EP0) {
HWREGH(USB_BASE + MUSB_TXIS_OFFSET) = USB_TXIE_EP0;
- USBC_SelectActiveEp(0);
+ musb_set_active_ep(0);
handle_ep0();
txis &= ~USB_TXIE_EP0;
}
- while (txis) {
- uint8_t ep_idx = __builtin_ctz(txis);
- USBC_SelectActiveEp(ep_idx);
- HWREGH(USB_BASE + MUSB_TXIS_OFFSET) = (1 << ep_idx);
- if (HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_UNDRN) {
- HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) &= ~USB_TXCSRL1_UNDRN;
+ for (uint32_t ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) {
+ if (txis & (1 << ep_idx)) {
+ musb_set_active_ep(ep_idx);
+ HWREGH(USB_BASE + MUSB_TXIS_OFFSET) = (1 << ep_idx);
+ if (HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) & USB_TXCSRL1_UNDRN) {
+ HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) &= ~USB_TXCSRL1_UNDRN;
+ }
+ usbd_event_notify_handler(USBD_EVENT_EP_IN_NOTIFY, (void *)(0x80 | ep_idx));
}
- usbd_event_notify_handler(USBD_EVENT_EP_IN_NOTIFY, (void *)(0x80 | ep_idx));
- txis &= ~(1 << ep_idx);
}
rxis &= HWREGH(USB_BASE + MUSB_RXIE_OFFSET);
- while (rxis) {
- uint8_t ep_idx = __builtin_ctz(rxis);
- USBC_SelectActiveEp(ep_idx);
- HWREGH(USB_BASE + MUSB_RXIS_OFFSET) = (1 << ep_idx);
- if (HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) & USB_RXCSRL1_RXRDY)
- usbd_event_notify_handler(USBD_EVENT_EP_OUT_NOTIFY, (void *)(ep_idx & 0x7f));
- rxis &= ~(1 << ep_idx);
+ for (uint32_t ep_idx = 1; ep_idx < USB_NUM_BIDIR_ENDPOINTS; ep_idx++) {
+ if (rxis & (1 << ep_idx)) {
+ musb_set_active_ep(ep_idx);
+ HWREGH(USB_BASE + MUSB_RXIS_OFFSET) = (1 << ep_idx);
+ if (HWREGB(USB_BASE + MUSB_IND_RXCSRL_OFFSET) & USB_RXCSRL1_RXRDY) {
+ usbd_event_notify_handler(USBD_EVENT_EP_OUT_NOTIFY, (void *)(ep_idx & 0x7f));
+ }
+ }
}
- USBC_SelectActiveEp(old_ep_idx);
+ musb_set_active_ep(old_ep_idx);
}