diff options
| author | sakumisu <[email protected]> | 2024-06-24 21:23:32 +0800 |
|---|---|---|
| committer | sakumisu <[email protected]> | 2024-06-24 21:23:32 +0800 |
| commit | a1274bad0aba12ec9301be4894dbafe9cab5301a (patch) | |
| tree | 744e6829ca2898f2066ca0dbfd8ae014c0bb630d | |
| parent | c377ebfc61812e422e4533489a088464036a4437 (diff) | |
update(platform/rtthread/usbh_dfs): add hpm6e00 chip
| -rw-r--r-- | platform/rtthread/usbh_dfs.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/platform/rtthread/usbh_dfs.c b/platform/rtthread/usbh_dfs.c index 968064a6..745ea5ea 100644 --- a/platform/rtthread/usbh_dfs.c +++ b/platform/rtthread/usbh_dfs.c @@ -16,7 +16,7 @@ #endif #if defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || \ - defined(SOC_HPM5000) || defined(SOC_HPM6000) || defined(BSP_USING_BL61X) + defined(SOC_HPM5000) || defined(SOC_HPM6000) || defined(SOC_HPM6E00) || defined(BSP_USING_BL61X) #ifndef RT_USING_CACHE #error usbh msc must enable RT_USING_CACHE in this chip #endif @@ -36,17 +36,6 @@ void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) bflb_l1c_dcache_invalidate_range(addr, size); } } -#elif defined(SOC_HPM5000) || defined(SOC_HPM6000) -#include "hpm_l1c_drv.h" - -void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) -{ - if (ops == RT_HW_CACHE_FLUSH) { - l1c_dc_flush((uint32_t)addr, size); - } else { - l1c_dc_invalidate((uint32_t)addr, size); - } -} #endif USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t msc_sector[512]; |