fix(musb): fix `musb_pipe_alloc` missing `bus` parameter, and fix host checks in irq

Includes:

- add `struct usbh_bus *bus` parameter to `musb_pipe_alloc`
- correct call in `usbh_submit_urb`
- correct host checks in irq

2 files changed, 5 insertions, 3 deletions

diff --git a/port/musb/usb_glue_sifli.c b/port/musb/usb_glue_sifli.c
index 106dc3a7..00194820 100644
--- a/port/musb/usb_glue_sifli.c
+++ b/port/musb/usb_glue_sifli.c
@@ -17,7 +17,7 @@
 #undef USB_POWER_RESUME
 
 #ifndef CONFIG_USB_MUSB_SIFLI
-#error must define CONFIG_USB_MUSB_SIFLI when use sunxi chips
+#error must define CONFIG_USB_MUSB_SIFLI when use sifli chips
 #endif
 
 #include "bf0_hal.h"
diff --git a/port/musb/usb_hc_musb.c b/port/musb/usb_hc_musb.c
index 3b73903a..26d2ce74 100644
--- a/port/musb/usb_hc_musb.c
+++ b/port/musb/usb_hc_musb.c
@@ -524,7 +524,7 @@ static uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port)
     return speed;
 }
 
-static int musb_pipe_alloc(void)
+static int musb_pipe_alloc(struct usbh_bus *bus)
 {
     int chidx;
     uintptr_t flags;
@@ -769,7 +769,7 @@ int usbh_submit_urb(struct usbh_urb *urb)
     if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_CONTROL) {
         chidx = 0;
     } else {
-        chidx = musb_pipe_alloc();
+        chidx = musb_pipe_alloc(bus);
         if (chidx == -1) {
             return -USB_ERR_NOMEM;
         }
@@ -1023,9 +1023,11 @@ void USBH_IRQHandler(uint8_t busid)
 
     bus = &g_usbhost_bus[busid];
 
+#if 0
     if (!(HWREGB(USB_BASE + MUSB_DEVCTL_OFFSET) & USB_DEVCTL_HOST)) {
         return;
     }
+#endif
 
     is = HWREGB(USB_BASE + MUSB_IS_OFFSET);
     txis = HWREGH(USB_BASE + MUSB_TXIS_OFFSET);