diff options
| -rw-r--r-- | port/dwc2/usb_glue_esp.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/port/dwc2/usb_glue_esp.c b/port/dwc2/usb_glue_esp.c index ae197e2d..d166a457 100644 --- a/port/dwc2/usb_glue_esp.c +++ b/port/dwc2/usb_glue_esp.c @@ -41,7 +41,11 @@ void usb_dc_low_level_init(uint8_t busid) usb_phy_config_t phy_config = { .controller = USB_PHY_CTRL_OTG, .otg_mode = USB_OTG_MODE_DEVICE, +#if CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4 has 2 USB-DWC peripherals, each with its dedicated PHY. We support HS+UTMI only ATM. + .target = USB_PHY_TARGET_UTMI, +#else .target = USB_PHY_TARGET_INT, +#endif }; esp_err_t ret = usb_new_phy(&phy_config, &s_phy_handle); @@ -87,7 +91,11 @@ void usb_hc_low_level_init(struct usbh_bus *bus) // Host Library defaults to internal PHY usb_phy_config_t phy_config = { .controller = USB_PHY_CTRL_OTG, +#if CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4 has 2 USB-DWC peripherals, each with its dedicated PHY. We support HS+UTMI only ATM. + .target = USB_PHY_TARGET_UTMI, +#else .target = USB_PHY_TARGET_INT, +#endif .otg_mode = USB_OTG_MODE_HOST, .otg_speed = USB_PHY_SPEED_UNDEFINED, // In Host mode, the speed is determined by the connected device .ext_io_conf = NULL, @@ -136,16 +144,25 @@ void usbd_dwc2_delay_ms(uint8_t ms) void usb_dcache_clean(uintptr_t addr, size_t size) { + if (size == 0) + return; + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M); } void usb_dcache_invalidate(uintptr_t addr, size_t size) { + if (size == 0) + return; + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_M2C); } void usb_dcache_flush(uintptr_t addr, size_t size) { + if (size == 0) + return; + esp_cache_msync((void *)addr, size, ESP_CACHE_MSYNC_FLAG_TYPE_DATA | ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_DIR_M2C); } #endif
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