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authorHimanshu Chauhan <[email protected]>2024-01-09 22:30:14 +0530
committerAnup Patel <[email protected]>2024-01-10 09:43:33 +0530
commit20ca19ab0323bb3b162a620008d192e2a56302a2 (patch)
treef7a2d7a5261a41c9c1423cb995dcb8ce20c81362
parentb752099da8e37ec9749245fde918e9f7dbd9957e (diff)
include: sbi: Add TINFO debug trigger CSR
Add the missing TINFO debug trigger CSR. Signed-off-by: Himanshu Chauhan <[email protected]> Reviewed-by: Anup Patel <[email protected]>
-rw-r--r--include/sbi/riscv_encoding.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index f20df761..e74cc0df 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -686,6 +686,7 @@
#define CSR_TDATA1 0x7a1
#define CSR_TDATA2 0x7a2
#define CSR_TDATA3 0x7a3
+#define CSR_TINFO 0x7a4
/* Debug Mode Registers */
#define CSR_DCSR 0x7b0