diff options
| author | Yong-Xuan Wang <[email protected]> | 2024-06-05 20:11:09 +0800 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2024-06-18 16:41:32 +0530 |
| commit | 53844c98d082cbba29a6e568196add6de95e858f (patch) | |
| tree | 4cfc22e482ed4f7f665cf906ff4f960cde7d6f47 | |
| parent | 52dcf351cddf12081acc921c135df265f9d2f243 (diff) | |
lib: sbi: Add support for Svade and Svadu extensions
Add support for Svade and Svadu extensions. When both are present in the
device tree, the M-mode firmware should select the Svade extension
to comply with the RVA23 profile, which mandates Svade and lists Svadu as
an optional extension.
Signed-off-by: Yong-Xuan Wang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
| -rw-r--r-- | include/sbi/riscv_encoding.h | 1 | ||||
| -rw-r--r-- | include/sbi/sbi_hart.h | 4 | ||||
| -rw-r--r-- | lib/sbi/sbi_hart.c | 12 |
3 files changed, 17 insertions, 0 deletions
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index d914828e..477fa3a1 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -211,6 +211,7 @@ #define ENVCFG_STCE (_ULL(1) << 63) #define ENVCFG_PBMTE (_ULL(1) << 62) +#define ENVCFG_ADUE (_ULL(1) << 61) #define ENVCFG_CDE (_ULL(1) << 60) #define ENVCFG_CBZE (_UL(1) << 7) #define ENVCFG_CBCFE (_UL(1) << 6) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index cc78eec6..81ec061d 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -63,6 +63,10 @@ enum sbi_hart_extensions { SBI_HART_EXT_SSCSRIND, /** Hart has Ssccfg extension */ SBI_HART_EXT_SSCCFG, + /** Hart has Svade extension */ + SBI_HART_EXT_SVADE, + /** Hart has Svadu extension */ + SBI_HART_EXT_SVADU, /** Maximum index of Hart extension */ SBI_HART_EXT_MAX, diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index cd974cc1..c3667019 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -135,9 +135,19 @@ static void mstatus_init(struct sbi_scratch *scratch) #endif __set_menvcfg_ext(SBI_HART_EXT_SSTC, ENVCFG_STCE) __set_menvcfg_ext(SBI_HART_EXT_SMCDELEG, ENVCFG_CDE); + __set_menvcfg_ext(SBI_HART_EXT_SVADU, ENVCFG_ADUE); #undef __set_menvcfg_ext + /* + * When both Svade and Svadu are present in DT, the default scheme for managing + * the PTE A/D bits should use Svade. Check Svadu before Svade extension to ensure + * that the ADUE bit is cleared when the Svade support are specified. + */ + + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SVADE)) + menvcfg_val &= ~ENVCFG_ADUE; + csr_write(CSR_MENVCFG, menvcfg_val); #if __riscv_xlen == 32 csr_write(CSR_MENVCFGH, menvcfg_val >> 32); @@ -668,6 +678,8 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = { __SBI_HART_EXT_DATA(smcdeleg, SBI_HART_EXT_SMCDELEG), __SBI_HART_EXT_DATA(sscsrind, SBI_HART_EXT_SSCSRIND), __SBI_HART_EXT_DATA(ssccfg, SBI_HART_EXT_SSCCFG), + __SBI_HART_EXT_DATA(svade, SBI_HART_EXT_SVADE), + __SBI_HART_EXT_DATA(svadu, SBI_HART_EXT_SVADU), }; _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext), |