diff options
| author | Charles Papon <[email protected]> | 2020-05-01 09:28:38 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2020-05-01 09:28:38 +0530 |
| commit | 5bdf022d07f1efcf8bc1647c78a294ab2baf4c9b (patch) | |
| tree | 7e2d18220d9e86c40e5290a924d64e3748a3fa86 | |
| parent | 3a326af9be09612a699d3dee7c2b91c4986de95f (diff) | |
firmware: fw_base: Remove CSR_MTVEC update check
Remove unnecessary CSR_MTVEC read to reduce the openSBI CSR requirement.
Mux are costly in FPGA. Allowing CSR_MTVEC to be write only is usefull
for the FMax/Area of FPGA softcore.
https://github.com/SpinalHDL/opensbi.git branch mtvec
Signed-off-by: Charles Papon <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
| -rw-r--r-- | firmware/fw_base.S | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/firmware/fw_base.S b/firmware/fw_base.S index cc6381da..07edc749 100644 --- a/firmware/fw_base.S +++ b/firmware/fw_base.S @@ -400,9 +400,6 @@ _start_warm: /* Setup trap handler */ la a4, _trap_handler csrw CSR_MTVEC, a4 - /* Make sure that mtvec is updated */ -1: csrr a5, CSR_MTVEC - bne a4, a5, 1b /* Initialize SBI runtime */ csrr a0, CSR_MSCRATCH |