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authorYu-Chien Peter Lin <[email protected]>2025-08-14 19:10:12 +0800
committerAnup Patel <[email protected]>2025-10-06 11:13:20 +0530
commit5de8c1d49983ada5daa68fc01979526f510d8063 (patch)
treeee839b513c9466bf902e5f83af78ea11783992e8
parent040f3100a952891f2ff71344b11fca2f70912c4f (diff)
lib: serial: sifive-uart: add shared memory region for SiFive UART
Add shared memory region so the driver has permission to access it in OpenSBI. Signed-off-by: Yu-Chien Peter Lin <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
-rw-r--r--lib/utils/serial/sifive-uart.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 3581d47a..55637137 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -9,6 +9,7 @@
#include <sbi/riscv_io.h>
#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
#include <sbi_utils/serial/sifive-uart.h>
/* clang-format off */
@@ -111,5 +112,7 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
sbi_console_set_device(&sifive_console);
- return 0;
+ return sbi_domain_root_add_memrange(base, PAGE_SIZE, PAGE_SIZE,
+ (SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
}