diff options
| author | Inochi Amaoto <[email protected]> | 2023-08-15 17:40:31 +0800 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2023-09-10 11:04:57 +0530 |
| commit | 664692f507a8b3a173256e1231dc1aed00eaf249 (patch) | |
| tree | db2efee964d66911c731861ca2bd6d43dbbc8b01 | |
| parent | b20bd479eff1588bfea52cceda213c40cc273ba9 (diff) | |
lib: sbi_pmu: ensure update hpm counter before starting counting
When detecting features of PMU, the hpm counter may be written to some
value, this will cause some unexpected behavior in some cases. So ensure
the hpm counter is updated before starting the counter and the related
interrupt.
Signed-off-by: Haijiao Liu <[email protected]>
Co-authored-by: Inochi Amaoto <[email protected]>
Signed-off-by: Inochi Amaoto <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Tested-by: Samuel Holland <[email protected]>
| -rw-r--r-- | lib/sbi/sbi_pmu.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index e8bed49f..c52e8a29 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -353,8 +353,11 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update) if (cidx >= num_hw_ctrs || cidx == 1) return SBI_EINVAL; - if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) - goto skip_inhibit_update; + if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) { + if (ival_update) + pmu_ctr_write_hw(cidx, ival); + return 0; + } /* * Some of the hardware may not support mcountinhibit but perf stat @@ -368,13 +371,12 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update) if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF)) pmu_ctr_enable_irq_hw(cidx); + if (ival_update) + pmu_ctr_write_hw(cidx, ival); if (pmu_dev && pmu_dev->hw_counter_enable_irq) pmu_dev->hw_counter_enable_irq(cidx); - csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt); -skip_inhibit_update: - if (ival_update) - pmu_ctr_write_hw(cidx, ival); + csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt); return 0; } |