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authorAnup Patel <[email protected]>2018-12-31 10:25:42 +0530
committerAnup Patel <[email protected]>2019-01-02 09:57:12 +0530
commit81e8950abeb649a0842726fdfc1aa4e60b1008f5 (patch)
tree6a47449870f8ba8dda63493df3fd9129667b0756
parentd0bbbbb8fdf059b2e49235af271db0d67ade2fc9 (diff)
include: Remove redundant csr_read_n() and csr_write_n()
The patch removes redundant csr_read_n() and csr_write_n() because same thing can be achieved by using __ASM_STR() macro in csr_read() and csr_write() macros. Signed-off-by: Anup Patel <[email protected]>
-rw-r--r--include/sbi/riscv_asm.h21
-rw-r--r--lib/riscv_asm.c80
2 files changed, 42 insertions, 59 deletions
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 045310b5..c7a89379 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -140,16 +140,7 @@
#define csr_read(csr) \
({ \
register unsigned long __v; \
- __asm__ __volatile__ ("csrr %0, " #csr \
- : "=r" (__v) : \
- : "memory"); \
- __v; \
-})
-
-#define csr_read_n(csr_num) \
-({ \
- register unsigned long __v; \
- __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr_num) \
+ __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
: "=r" (__v) : \
: "memory"); \
__v; \
@@ -158,15 +149,7 @@
#define csr_write(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrw " #csr ", %0" \
- : : "rK" (__v) \
- : "memory"); \
-})
-
-#define csr_write_n(csr_num, val) \
-({ \
- unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrw " __ASM_STR(csr_num) ", %0" \
+ __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
: : "rK" (__v) \
: "memory"); \
})
diff --git a/lib/riscv_asm.c b/lib/riscv_asm.c
index 0fbdb315..4ffd7547 100644
--- a/lib/riscv_asm.c
+++ b/lib/riscv_asm.c
@@ -17,64 +17,64 @@ unsigned long csr_read_num(int csr_num)
switch (csr_num) {
case CSR_PMPCFG0:
- ret = csr_read_n(CSR_PMPCFG0);
+ ret = csr_read(CSR_PMPCFG0);
break;
case CSR_PMPCFG1:
- ret = csr_read_n(CSR_PMPCFG1);
+ ret = csr_read(CSR_PMPCFG1);
break;
case CSR_PMPCFG2:
- ret = csr_read_n(CSR_PMPCFG2);
+ ret = csr_read(CSR_PMPCFG2);
break;
case CSR_PMPCFG3:
- ret = csr_read_n(CSR_PMPCFG3);
+ ret = csr_read(CSR_PMPCFG3);
break;
case CSR_PMPADDR0:
- ret = csr_read_n(CSR_PMPADDR0);
+ ret = csr_read(CSR_PMPADDR0);
break;
case CSR_PMPADDR1:
- ret = csr_read_n(CSR_PMPADDR1);
+ ret = csr_read(CSR_PMPADDR1);
break;
case CSR_PMPADDR2:
- ret = csr_read_n(CSR_PMPADDR2);
+ ret = csr_read(CSR_PMPADDR2);
break;
case CSR_PMPADDR3:
- ret = csr_read_n(CSR_PMPADDR3);
+ ret = csr_read(CSR_PMPADDR3);
break;
case CSR_PMPADDR4:
- ret = csr_read_n(CSR_PMPADDR4);
+ ret = csr_read(CSR_PMPADDR4);
break;
case CSR_PMPADDR5:
- ret = csr_read_n(CSR_PMPADDR5);
+ ret = csr_read(CSR_PMPADDR5);
break;
case CSR_PMPADDR6:
- ret = csr_read_n(CSR_PMPADDR6);
+ ret = csr_read(CSR_PMPADDR6);
break;
case CSR_PMPADDR7:
- ret = csr_read_n(CSR_PMPADDR7);
+ ret = csr_read(CSR_PMPADDR7);
break;
case CSR_PMPADDR8:
- ret = csr_read_n(CSR_PMPADDR8);
+ ret = csr_read(CSR_PMPADDR8);
break;
case CSR_PMPADDR9:
- ret = csr_read_n(CSR_PMPADDR9);
+ ret = csr_read(CSR_PMPADDR9);
break;
case CSR_PMPADDR10:
- ret = csr_read_n(CSR_PMPADDR10);
+ ret = csr_read(CSR_PMPADDR10);
break;
case CSR_PMPADDR11:
- ret = csr_read_n(CSR_PMPADDR11);
+ ret = csr_read(CSR_PMPADDR11);
break;
case CSR_PMPADDR12:
- ret = csr_read_n(CSR_PMPADDR12);
+ ret = csr_read(CSR_PMPADDR12);
break;
case CSR_PMPADDR13:
- ret = csr_read_n(CSR_PMPADDR13);
+ ret = csr_read(CSR_PMPADDR13);
break;
case CSR_PMPADDR14:
- ret = csr_read_n(CSR_PMPADDR14);
+ ret = csr_read(CSR_PMPADDR14);
break;
case CSR_PMPADDR15:
- ret = csr_read_n(CSR_PMPADDR15);
+ ret = csr_read(CSR_PMPADDR15);
break;
default:
break;
@@ -87,64 +87,64 @@ void csr_write_num(int csr_num, unsigned long val)
{
switch (csr_num) {
case CSR_PMPCFG0:
- csr_write_n(CSR_PMPCFG0, val);
+ csr_write(CSR_PMPCFG0, val);
break;
case CSR_PMPCFG1:
- csr_write_n(CSR_PMPCFG1, val);
+ csr_write(CSR_PMPCFG1, val);
break;
case CSR_PMPCFG2:
- csr_write_n(CSR_PMPCFG2, val);
+ csr_write(CSR_PMPCFG2, val);
break;
case CSR_PMPCFG3:
- csr_write_n(CSR_PMPCFG3, val);
+ csr_write(CSR_PMPCFG3, val);
break;
case CSR_PMPADDR0:
- csr_write_n(CSR_PMPADDR0, val);
+ csr_write(CSR_PMPADDR0, val);
break;
case CSR_PMPADDR1:
- csr_write_n(CSR_PMPADDR1, val);
+ csr_write(CSR_PMPADDR1, val);
break;
case CSR_PMPADDR2:
- csr_write_n(CSR_PMPADDR2, val);
+ csr_write(CSR_PMPADDR2, val);
break;
case CSR_PMPADDR3:
- csr_write_n(CSR_PMPADDR3, val);
+ csr_write(CSR_PMPADDR3, val);
break;
case CSR_PMPADDR4:
- csr_write_n(CSR_PMPADDR4, val);
+ csr_write(CSR_PMPADDR4, val);
break;
case CSR_PMPADDR5:
- csr_write_n(CSR_PMPADDR5, val);
+ csr_write(CSR_PMPADDR5, val);
break;
case CSR_PMPADDR6:
- csr_write_n(CSR_PMPADDR6, val);
+ csr_write(CSR_PMPADDR6, val);
break;
case CSR_PMPADDR7:
- csr_write_n(CSR_PMPADDR7, val);
+ csr_write(CSR_PMPADDR7, val);
break;
case CSR_PMPADDR8:
- csr_write_n(CSR_PMPADDR8, val);
+ csr_write(CSR_PMPADDR8, val);
break;
case CSR_PMPADDR9:
- csr_write_n(CSR_PMPADDR9, val);
+ csr_write(CSR_PMPADDR9, val);
break;
case CSR_PMPADDR10:
- csr_write_n(CSR_PMPADDR10, val);
+ csr_write(CSR_PMPADDR10, val);
break;
case CSR_PMPADDR11:
- csr_write_n(CSR_PMPADDR11, val);
+ csr_write(CSR_PMPADDR11, val);
break;
case CSR_PMPADDR12:
- csr_write_n(CSR_PMPADDR12, val);
+ csr_write(CSR_PMPADDR12, val);
break;
case CSR_PMPADDR13:
- csr_write_n(CSR_PMPADDR13, val);
+ csr_write(CSR_PMPADDR13, val);
break;
case CSR_PMPADDR14:
- csr_write_n(CSR_PMPADDR14, val);
+ csr_write(CSR_PMPADDR14, val);
break;
case CSR_PMPADDR15:
- csr_write_n(CSR_PMPADDR15, val);
+ csr_write(CSR_PMPADDR15, val);
break;
default:
break;