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authorBen Zong-You Xie <[email protected]>2025-08-14 18:40:24 +0800
committerAnup Patel <[email protected]>2025-09-30 17:48:11 +0530
commit8408845cc9554b152218569c67027bc9d70ea692 (patch)
tree744dc1d64c1428e396f87b801db6c661d264e6eb
parent944db4eced291f248724d9f662585257b4876e16 (diff)
platform: generic: Add Andes QiLai SoC support
Extend generic platform to support Andes QiLai SoC. Signed-off-by: Ben Zong-You Xie <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
-rw-r--r--platform/generic/Kconfig7
-rw-r--r--platform/generic/andes/objects.mk3
-rw-r--r--platform/generic/andes/qilai.c66
-rw-r--r--platform/generic/configs/defconfig1
-rw-r--r--platform/generic/include/andes/andes_pma.h1
-rw-r--r--platform/generic/include/andes/qilai.h18
6 files changed, 96 insertions, 0 deletions
diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig
index 7559a4bd..4b9bcfc6 100644
--- a/platform/generic/Kconfig
+++ b/platform/generic/Kconfig
@@ -36,6 +36,13 @@ config PLATFORM_ANDES_AE350
select ANDES_PMA
default n
+config PLATFORM_ANDES_QILAI
+ bool "Andes QiLai support"
+ select ANDES_PMU
+ select ANDES_PMA
+ select ANDES_SBI
+ default n
+
config PLATFORM_OPENHWGROUP_OPENPITON
bool "OpenHWGroup Openpiton support"
default n
diff --git a/platform/generic/andes/objects.mk b/platform/generic/andes/objects.mk
index 15e61852..f85ad481 100644
--- a/platform/generic/andes/objects.mk
+++ b/platform/generic/andes/objects.mk
@@ -5,6 +5,9 @@
carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_AE350) += andes_ae350
platform-objs-$(CONFIG_PLATFORM_ANDES_AE350) += andes/ae350.o andes/sleep.o
+carray-platform_override_modules-$(CONFIG_PLATFORM_ANDES_QILAI) += andes_qilai
+platform-objs-$(CONFIG_PLATFORM_ANDES_QILAI) += andes/qilai.o
+
platform-objs-$(CONFIG_ANDES_PMA) += andes/andes_pma.o
platform-objs-$(CONFIG_ANDES_SBI) += andes/andes_sbi.o
platform-objs-$(CONFIG_ANDES_PMU) += andes/andes_pmu.o
diff --git a/platform/generic/andes/qilai.c b/platform/generic/andes/qilai.c
new file mode 100644
index 00000000..0c61169a
--- /dev/null
+++ b/platform/generic/andes/qilai.c
@@ -0,0 +1,66 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2025 Andes Technology Corporation
+ *
+ */
+
+#include <andes/andes_pma.h>
+#include <andes/andes_pmu.h>
+#include <andes/andes_sbi.h>
+#include <andes/qilai.h>
+#include <platform_override.h>
+#include <sbi/sbi_domain.h>
+#include <sbi_utils/fdt/fdt_driver.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+static int andes_qilai_final_init(bool cold_boot)
+{
+
+ int rc;
+
+ /*
+ * Set the memory attribute for 3 PCIE endpoint regions,
+ * and they are all non-idempotent and non-bufferable.
+ */
+ rc = andes_sbi_set_pma((unsigned long)PCIE0_BASE, (unsigned long)PCIE0_SIZE,
+ ANDES_PMACFG_ETYP_NAPOT |
+ ANDES_PMACFG_MTYP_DEV_NOBUF);
+ if (rc)
+ return rc;
+
+ rc = andes_sbi_set_pma((unsigned long)PCIE1_BASE, (unsigned long)PCIE1_SIZE,
+ ANDES_PMACFG_ETYP_NAPOT |
+ ANDES_PMACFG_MTYP_DEV_NOBUF);
+ if (rc)
+ return rc;
+
+ rc = andes_sbi_set_pma((unsigned long)PCIE2_BASE, (unsigned long)PCIE2_SIZE,
+ ANDES_PMACFG_ETYP_NAPOT |
+ ANDES_PMACFG_MTYP_DEV_NOBUF);
+ if (rc)
+ return rc;
+
+ return generic_final_init(cold_boot);
+}
+
+static int andes_qilai_platform_init(const void *fdt, int nodeoff,
+ const struct fdt_match *match)
+{
+ generic_platform_ops.final_init = andes_qilai_final_init;
+ generic_platform_ops.extensions_init = andes_pmu_extensions_init;
+ generic_platform_ops.pmu_init = andes_pmu_init;
+ generic_platform_ops.vendor_ext_provider =
+ andes_sbi_vendor_ext_provider;
+ return 0;
+}
+
+static const struct fdt_match andes_qilai_match[] = {
+ { .compatible = "andestech,qilai" },
+ {},
+};
+
+const struct fdt_driver andes_qilai = {
+ .match_table = andes_qilai_match,
+ .init = andes_qilai_platform_init,
+};
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig
index 4b93d0bc..fb90bb3e 100644
--- a/platform/generic/configs/defconfig
+++ b/platform/generic/configs/defconfig
@@ -1,5 +1,6 @@
CONFIG_PLATFORM_ALLWINNER_D1=y
CONFIG_PLATFORM_ANDES_AE350=y
+CONFIG_PLATFORM_ANDES_QILAI=y
CONFIG_PLATFORM_RENESAS_RZFIVE=y
CONFIG_PLATFORM_SIFIVE_FU540=y
CONFIG_PLATFORM_SIFIVE_FU740=y
diff --git a/platform/generic/include/andes/andes_pma.h b/platform/generic/include/andes/andes_pma.h
index 4a66e1b6..b0dbeb22 100644
--- a/platform/generic/include/andes/andes_pma.h
+++ b/platform/generic/include/andes/andes_pma.h
@@ -19,6 +19,7 @@
#define ANDES_PMACFG_ETYP_NAPOT (3 << ANDES_PMACFG_ETYP_OFFSET)
#define ANDES_PMACFG_MTYP_OFFSET 2
+#define ANDES_PMACFG_MTYP_DEV_NOBUF (0 << ANDES_PMACFG_MTYP_OFFSET)
/* Memory, Non-cacheable, Bufferable */
#define ANDES_PMACFG_MTYP_MEM_NON_CACHE_BUF (3 << ANDES_PMACFG_MTYP_OFFSET)
diff --git a/platform/generic/include/andes/qilai.h b/platform/generic/include/andes/qilai.h
new file mode 100644
index 00000000..2f00f314
--- /dev/null
+++ b/platform/generic/include/andes/qilai.h
@@ -0,0 +1,18 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2025 Andes Technology Corporation
+ *
+ */
+
+#ifndef __QILAI_H__
+#define __QILAI_H__
+
+#define PCIE0_BASE 0x1000000000ULL
+#define PCIE0_SIZE 0x800000000ULL
+#define PCIE1_BASE 0x1800000000ULL
+#define PCIE1_SIZE 0x800000000ULL
+#define PCIE2_BASE 0x2000000000ULL
+#define PCIE2_SIZE 0x2000000000ULL
+
+#endif