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authorBenedikt Freisen <[email protected]>2025-11-14 21:38:39 +0100
committerAnup Patel <[email protected]>2025-12-15 18:42:00 +0530
commitafc24152bb55927297716c72ef37f9d529893c55 (patch)
treebe0a7b5d932d2c8ceaa8ca99860cd93459b15a3c
parentdffa24b7f56c5f3567dac35b64eb59587c304ff1 (diff)
include: sbi: Ignore rs1 and rd fields in FENCE.TSO.
While FENCE.TSO is only specified with them set to zero, it is a special case of FENCE, which needs to ignore these otherwise reserved fields, but in some implementations, namely XuanTie C906 and C910, apparently does not. See the RISCVuzz paper by Thomas et al. for details. Signed-off-by: Benedikt Freisen <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
-rw-r--r--include/sbi/riscv_encoding.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index be2e8557..b5a4ce81 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -949,7 +949,7 @@
#define INSN_MASK_WFI 0xffffff00
#define INSN_MATCH_WFI 0x10500000
-#define INSN_MASK_FENCE_TSO 0xffffffff
+#define INSN_MASK_FENCE_TSO 0xfff0707f
#define INSN_MATCH_FENCE_TSO 0x8330000f
#define INSN_MASK_VECTOR_UNIT_STRIDE 0xfdf0707f