diff options
| author | Aurelien Jarno <[email protected]> | 2026-04-19 16:49:20 +0200 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2026-05-11 19:21:31 +0530 |
| commit | d9637d00bf47a3cc17306fc62e71652c8a83c289 (patch) | |
| tree | f538b6cc8936af974bf0ced3ec52f4ee9364c5a1 | |
| parent | b10e18ec854a80e938a1fc8cf23beb8f8577cbaf (diff) | |
lib: utils/reset: add SpacemiT P1 PMIC support
The SpacemiT P1 is a PMIC commonly found with SpacemiT CPU like K1. Add
a reset driver for it.
Signed-off-by: Aurelien Jarno <[email protected]>
Tested-by: Anand Moon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
| -rw-r--r-- | lib/utils/reset/Kconfig | 4 | ||||
| -rw-r--r-- | lib/utils/reset/fdt_reset_spacemit_p1.c | 112 | ||||
| -rw-r--r-- | lib/utils/reset/objects.mk | 3 | ||||
| -rw-r--r-- | platform/generic/configs/defconfig | 1 |
4 files changed, 120 insertions, 0 deletions
diff --git a/lib/utils/reset/Kconfig b/lib/utils/reset/Kconfig index 4835921f..f98926e5 100644 --- a/lib/utils/reset/Kconfig +++ b/lib/utils/reset/Kconfig @@ -33,6 +33,10 @@ config FDT_RESET_SG2042_HWMON_MCU bool "Sophgo SG2042 hwmon MCU FDT reset driver" default n +config FDT_RESET_SPACEMIT_P1 + bool "SpacemiT P1 reset driver" + default n + config FDT_RESET_SUNXI_WDT bool "Sunxi WDT FDT reset driver" default n diff --git a/lib/utils/reset/fdt_reset_spacemit_p1.c b/lib/utils/reset/fdt_reset_spacemit_p1.c new file mode 100644 index 00000000..5312e741 --- /dev/null +++ b/lib/utils/reset/fdt_reset_spacemit_p1.c @@ -0,0 +1,112 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2026 Aurelien Jarno + * Authors: + * Aurelien Jarno <[email protected]> + */ + +#include <libfdt.h> +#include <platform_override.h> +#include <sbi/sbi_bitops.h> +#include <sbi/sbi_console.h> +#include <sbi/sbi_system.h> +#include <sbi_utils/fdt/fdt_driver.h> +#include <sbi_utils/i2c/fdt_i2c.h> + +/* SpacemiT P1 Power Control Register 2 */ +#define PWR_CTRL2 0x7e +#define PWR_CTRL2_SHUTDOWN BIT(2) /* Shutdown request */ +#define PWR_CTRL2_RST BIT(1) /* Reset request */ + +static struct i2c_adapter *p1_adapter = NULL; +static uint32_t p1_reg = 0; + +static int p1_system_reset_check(uint32_t type, uint32_t reason) +{ + switch (type) { + case SBI_SRST_RESET_TYPE_SHUTDOWN: + return 1; + case SBI_SRST_RESET_TYPE_COLD_REBOOT: + case SBI_SRST_RESET_TYPE_WARM_REBOOT: + return 255; + } + + return 0; +} + +static void p1_ops(uint32_t type) +{ + uint8_t byte; + int rc; + + rc = i2c_adapter_reg_read(p1_adapter, p1_reg, PWR_CTRL2, &byte); + if (rc) { + sbi_printf("%s: cannot read P1 Power Control Register 2\n", __func__); + return; + } + + if (type == SBI_SRST_RESET_TYPE_SHUTDOWN) + byte |= PWR_CTRL2_SHUTDOWN; + else + byte |= PWR_CTRL2_RST; + + rc = i2c_adapter_reg_write(p1_adapter, p1_reg, PWR_CTRL2, byte); + if (rc) + sbi_printf("%s: cannot write P1 Power Control Register 2\n", __func__); +} + +static void p1_system_reset(uint32_t type, uint32_t reason) +{ + switch (type) { + case SBI_SRST_RESET_TYPE_SHUTDOWN: + case SBI_SRST_RESET_TYPE_COLD_REBOOT: + case SBI_SRST_RESET_TYPE_WARM_REBOOT: + p1_ops(type); + break; + } +} + +static struct sbi_system_reset_device p1_reset = { + .name = "spacemit-p1-reset", + .system_reset_check = p1_system_reset_check, + .system_reset = p1_system_reset +}; + +static int p1_reset_init(const void *fdt, int nodeoff, + const struct fdt_match *match) +{ + int rc, i2c_bus; + uint64_t addr; + + /* we are spacemit,p1 node */ + rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &addr, NULL); + if (rc) + return rc; + + p1_reg = addr; + + /* find i2c bus parent node */ + i2c_bus = fdt_parent_offset(fdt, nodeoff); + if (i2c_bus < 0) + return i2c_bus; + + /* i2c adapter get */ + rc = fdt_i2c_adapter_get(fdt, i2c_bus, &p1_adapter); + if (rc) + return rc; + + sbi_system_reset_add_device(&p1_reset); + + return 0; +} + +static const struct fdt_match p1_reset_match[] = { + { .compatible = "spacemit,p1", .data = (void *)true }, + { }, +}; + +const struct fdt_driver fdt_reset_spacemit_p1 = { + .match_table = p1_reset_match, + .init = p1_reset_init, +}; diff --git a/lib/utils/reset/objects.mk b/lib/utils/reset/objects.mk index ac38b49d..3c681c27 100644 --- a/lib/utils/reset/objects.mk +++ b/lib/utils/reset/objects.mk @@ -20,6 +20,9 @@ libsbiutils-objs-$(CONFIG_FDT_RESET_HTIF) += reset/fdt_reset_htif.o carray-fdt_early_drivers-$(CONFIG_FDT_RESET_SG2042_HWMON_MCU) += fdt_reset_sg2042_mcu libsbiutils-objs-$(CONFIG_FDT_RESET_SG2042_HWMON_MCU) += reset/fdt_reset_sg2042_hwmon_mcu.o +carray-fdt_early_drivers-$(CONFIG_FDT_RESET_SPACEMIT_P1) += fdt_reset_spacemit_p1 +libsbiutils-objs-$(CONFIG_FDT_RESET_SPACEMIT_P1) += reset/fdt_reset_spacemit_p1.o + carray-fdt_early_drivers-$(CONFIG_FDT_RESET_SUNXI_WDT) += fdt_reset_sunxi_wdt libsbiutils-objs-$(CONFIG_FDT_RESET_SUNXI_WDT) += reset/fdt_reset_sunxi_wdt.o diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig index 91f59a33..818b71f4 100644 --- a/platform/generic/configs/defconfig +++ b/platform/generic/configs/defconfig @@ -52,6 +52,7 @@ CONFIG_FDT_RESET_GPIO=y CONFIG_FDT_RESET_HTIF=y CONFIG_FDT_RESET_RPMI=y CONFIG_FDT_RESET_SG2042_HWMON_MCU=y +CONFIG_FDT_RESET_SPACEMIT_P1=y CONFIG_FDT_RESET_SUNXI_WDT=y CONFIG_FDT_RESET_SYSCON=y CONFIG_FDT_SERIAL=y |
