diff options
| author | Anup Patel <[email protected]> | 2018-12-21 15:05:59 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2018-12-21 15:05:59 +0530 |
| commit | ef5f4e149c9f6f354d48463f30f7bf0f759d8028 (patch) | |
| tree | f84b54d5e88869490dee660fde2efdba9948a840 | |
| parent | 4e15d79419a63c8bd08045fab8f15d2daa3bb353 (diff) | |
firmware: Remove redundant write to mideleg and medeleg
The mideleg and medeleg are already programmed in delegate_traps()
so no need to set it here.
Any CSR setup in our reference firmware becomes a requirement
for bootloader linking to libsbi.a so we should have minimum
possible CSR setup in our reference firmware.
Signed-off-by: Anup Patel <[email protected]>
| -rw-r--r-- | firmware/fw_common.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/firmware/fw_common.S b/firmware/fw_common.S index b5e1f904..198aa0b9 100644 --- a/firmware/fw_common.S +++ b/firmware/fw_common.S @@ -119,8 +119,6 @@ _wait_for_boot_hart: _start_warm: /* Disable and clear all interrupts */ - csrw mideleg, zero - csrw medeleg, zero csrw mie, zero csrw mip, zero |
