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authorSamuel Holland <[email protected]>2024-10-25 11:45:47 -0700
committerAnup Patel <[email protected]>2024-10-28 10:51:37 +0530
commit62447cd7aa17097cefdb0d7a2f1312ff55fcda27 (patch)
tree79826ca861a0c6c28471096ea15817f0bb608f9b /include/sbi/riscv_asm.h
parent3e0c170397074c32f733ac2681e8a077f8d7a814 (diff)
include: sbi: Optimize reads of mhartid and mscratch
csr_read() is marked as volatile and clobbering memory, which is generally the safe thing to do. However, these two CSRs do not have any side effects, and the values returned do not change between calls. The compiler can generate better code if we allow it to reorder calls to these functions and cache the return value. Introduce csr_read_relaxed() for this use case. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'include/sbi/riscv_asm.h')
-rw-r--r--include/sbi/riscv_asm.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/include/sbi/riscv_asm.h b/include/sbi/riscv_asm.h
index 2c34635a..4605db20 100644
--- a/include/sbi/riscv_asm.h
+++ b/include/sbi/riscv_asm.h
@@ -101,6 +101,14 @@
__v; \
})
+/* Variant of csr_read() that allows the compiler to cache the value. */
+#define csr_read_relaxed(csr) \
+ ({ \
+ register unsigned long __v; \
+ __asm__ ("csrr %0, " __ASM_STR(csr) : "=r"(__v)); \
+ __v; \
+ })
+
#define csr_write(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
@@ -163,7 +171,7 @@ void csr_write_num(int csr_num, unsigned long val);
} while (0)
/* Get current HART id */
-#define current_hartid() ((unsigned int)csr_read(CSR_MHARTID))
+#define current_hartid() ((unsigned int)csr_read_relaxed(CSR_MHARTID))
/* determine CPU extension, return non-zero support */
int misa_extension_imp(char ext);