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authorRaj Vishwanathan <[email protected]>2025-04-23 15:50:45 -0700
committerAnup Patel <[email protected]>2025-04-24 09:23:47 +0530
commit99aabc6b8431a2bcf2b28a2423952e529de9fbc5 (patch)
tree98113aa1ca54567d010931e7f9f3799ca208e435 /include/sbi_utils
parent4d0128ec58e109faed3f6357f982a0079361075a (diff)
lib: sbi: Set the scratch allocation to alignment to cacheline size
Set the scratch allocation alignment to cacheline size specified by riscv,cbom-block-size in the DTS file to avoid two atomic variables from the same cache line causing livelock on some platforms. If the cacheline is not specified, we set it a default value. Signed-off-by: Raj Vishwanathan <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'include/sbi_utils')
-rw-r--r--include/sbi_utils/fdt/fdt_helper.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h
index 58758808..04c850cc 100644
--- a/include/sbi_utils/fdt/fdt_helper.h
+++ b/include/sbi_utils/fdt/fdt_helper.h
@@ -50,6 +50,8 @@ int fdt_parse_hart_id(const void *fdt, int cpu_offset, u32 *hartid);
int fdt_parse_max_enabled_hart_id(const void *fdt, u32 *max_hartid);
+int fdt_parse_cbom_block_size(const void *fdt, int cpu_offset, unsigned long *cbom_block_size);
+
int fdt_parse_timebase_frequency(const void *fdt, unsigned long *freq);
int fdt_parse_isa_extensions(const void *fdt, unsigned int hartid,