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authorBen Zong-You Xie <[email protected]>2026-07-28 16:10:39 +0800
committerAnup Patel <[email protected]>2026-09-01 10:46:23 +0530
commite01bd7926b5d808d883df18c6ac919dfa9ab04e7 (patch)
treed2bf5a2065157bd80db3b50a287766f4cb5bb981 /include/sbi_utils
parent9ceaf4738a62ec990dcd0e797243bb6e78508291 (diff)
lib: utils/hsm: wake sleeping Andes harts with an IPI
An IPI wakes a hart from light sleep and, once MSIP is kept as an SMU wakeup event, from deep sleep too. Drop the WAKEUP_CMD path and the boot state, hart type and sleep type conditions that selected it. Signed-off-by: Ben Zong-You Xie <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'include/sbi_utils')
-rw-r--r--include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h b/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h
index 5e71fab7..20e6cea0 100644
--- a/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h
+++ b/include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h
@@ -36,6 +36,7 @@
#define PCS_WAKEUP_RTC_ALARM_MASK BIT(2)
#define PCS_WAKEUP_UART2_MASK BIT(9)
#define PCS_WAKEUP_MSIP_MASK BIT(29)
+#define PCS_WAKEUP_MEIP_MASK BIT(31)
#define PCS0_CTL_OFFSET 0x94
#define PCSm_CTL_OFFSET(i) ((i + 3) * 0x20 + PCS0_CTL_OFFSET)