diff options
| author | Clément Léger <[email protected]> | 2025-03-25 11:26:08 +0100 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2025-03-27 18:03:41 +0530 |
| commit | 601bea45c50664310aaf6470ff27935ca09fe987 (patch) | |
| tree | 99dbd9dbc4bf61894a522b52643cd67e96d522e3 /include | |
| parent | 321ca8063b7ea9863cdeb6c80fe8bce340bcd04b (diff) | |
lib: sbi: sse: Update SSE event ids
The latest specification added new high priority RAS events and renamed
the PMU to PMU_OVERFLOW.
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sbi/sbi_ecall_interface.h | 44 |
1 files changed, 35 insertions, 9 deletions
diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h index e68d9188..4817c8cf 100644 --- a/include/sbi/sbi_ecall_interface.h +++ b/include/sbi/sbi_ecall_interface.h @@ -393,34 +393,60 @@ enum sbi_sse_state { }; /* SBI SSE Event IDs. */ -#define SBI_SSE_EVENT_LOCAL_RAS 0x00000000 +/* Range 0x00000000 - 0x0000ffff */ +#define SBI_SSE_EVENT_LOCAL_HIGH_PRIO_RAS 0x00000000 #define SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP 0x00000001 +#define SBI_SSE_EVENT_LOCAL_RESERVED_0_START 0x00000002 +#define SBI_SSE_EVENT_LOCAL_RESERVED_0_END 0x00003fff #define SBI_SSE_EVENT_LOCAL_PLAT_0_START 0x00004000 #define SBI_SSE_EVENT_LOCAL_PLAT_0_END 0x00007fff -#define SBI_SSE_EVENT_GLOBAL_RAS 0x00008000 + +#define SBI_SSE_EVENT_GLOBAL_HIGH_PRIO_RAS 0x00008000 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_0_START 0x00008001 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_0_END 0x0000bfff #define SBI_SSE_EVENT_GLOBAL_PLAT_0_START 0x0000c000 #define SBI_SSE_EVENT_GLOBAL_PLAT_0_END 0x0000ffff -#define SBI_SSE_EVENT_LOCAL_PMU 0x00010000 +/* Range 0x00010000 - 0x0001ffff */ +#define SBI_SSE_EVENT_LOCAL_PMU_OVERFLOW 0x00010000 +#define SBI_SSE_EVENT_LOCAL_RESERVED_1_START 0x00010001 +#define SBI_SSE_EVENT_LOCAL_RESERVED_1_END 0x00013fff #define SBI_SSE_EVENT_LOCAL_PLAT_1_START 0x00014000 #define SBI_SSE_EVENT_LOCAL_PLAT_1_END 0x00017fff + +#define SBI_SSE_EVENT_GLOBAL_RESERVED_1_START 0x00018000 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_1_END 0x0001bfff #define SBI_SSE_EVENT_GLOBAL_PLAT_1_START 0x0001c000 #define SBI_SSE_EVENT_GLOBAL_PLAT_1_END 0x0001ffff -#define SBI_SSE_EVENT_LOCAL_PLAT_2_START 0x00024000 -#define SBI_SSE_EVENT_LOCAL_PLAT_2_END 0x00027fff -#define SBI_SSE_EVENT_GLOBAL_PLAT_2_START 0x0002c000 -#define SBI_SSE_EVENT_GLOBAL_PLAT_2_END 0x0002ffff +/* Range 0x00100000 - 0x0010ffff */ +#define SBI_SSE_EVENT_LOCAL_LOW_PRIO_RAS 0x00100000 +#define SBI_SSE_EVENT_LOCAL_RESERVED_2_START 0x00100001 +#define SBI_SSE_EVENT_LOCAL_RESERVED_2_END 0x00103fff +#define SBI_SSE_EVENT_LOCAL_PLAT_2_START 0x00104000 +#define SBI_SSE_EVENT_LOCAL_PLAT_2_END 0x00107fff +#define SBI_SSE_EVENT_GLOBAL_LOW_PRIO_RAS 0x00108000 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_2_START 0x00108001 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_2_END 0x0010bfff +#define SBI_SSE_EVENT_GLOBAL_PLAT_2_START 0x0010c000 +#define SBI_SSE_EVENT_GLOBAL_PLAT_2_END 0x0010ffff + +/* Range 0xffff0000 - 0xffffffff */ #define SBI_SSE_EVENT_LOCAL_SOFTWARE 0xffff0000 +#define SBI_SSE_EVENT_LOCAL_RESERVED_3_START 0xffff0001 +#define SBI_SSE_EVENT_LOCAL_RESERVED_3_END 0xffff3fff #define SBI_SSE_EVENT_LOCAL_PLAT_3_START 0xffff4000 #define SBI_SSE_EVENT_LOCAL_PLAT_3_END 0xffff7fff + #define SBI_SSE_EVENT_GLOBAL_SOFTWARE 0xffff8000 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_3_START 0xffff8001 +#define SBI_SSE_EVENT_GLOBAL_RESERVED_3_END 0xffffbfff #define SBI_SSE_EVENT_GLOBAL_PLAT_3_START 0xffffc000 #define SBI_SSE_EVENT_GLOBAL_PLAT_3_END 0xffffffff -#define SBI_SSE_EVENT_GLOBAL_BIT (1 << 15) -#define SBI_SSE_EVENT_PLATFORM_BIT (1 << 14) +#define SBI_SSE_EVENT_GLOBAL_BIT BIT(15) +#define SBI_SSE_EVENT_PLATFORM_BIT BIT(14) /* SBI function IDs for MPXY extension */ #define SBI_EXT_MPXY_GET_SHMEM_SIZE 0x0 |