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authorAnup Patel <[email protected]>2019-08-17 20:54:40 +0530
committerAnup Patel <[email protected]>2019-09-30 15:35:43 +0530
commit7d4420bd6929ef3f2c761c262dbc3f7f2ae150c2 (patch)
treedd82311f1464491c0a7f7df116961ca64aab5a33 /include
parenta14e7ee82c2723f18cf2d1c7f1a88d88766a6018 (diff)
include: Extend get_insn() to read instruction from VS/VU mode
Current implementation of get_insn() is not suitable for reading instruction from VS/VU mode because we have to set SSTATUS_MXR bit in VSSTATUS CSR for reading instruction from VS/VU mode. This patch extends get_insn() to read instruction from VS/VU mode. Signed-off-by: Anup Patel <[email protected]> Signed-off-by: Alistair Francis <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/sbi/riscv_unpriv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h
index ebd0fe37..fce49bcb 100644
--- a/include/sbi/riscv_unpriv.h
+++ b/include/sbi/riscv_unpriv.h
@@ -43,7 +43,7 @@ DECLARE_UNPRIVILEGED_LOAD_FUNCTION(u64)
DECLARE_UNPRIVILEGED_STORE_FUNCTION(u64)
DECLARE_UNPRIVILEGED_LOAD_FUNCTION(ulong)
-ulong get_insn(ulong mepc, struct sbi_scratch *scratch,
+ulong get_insn(ulong mepc, bool virt, struct sbi_scratch *scratch,
struct unpriv_trap *trap);
#endif