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authorVincent Chen <[email protected]>2025-10-20 14:34:05 +0800
committerAnup Patel <[email protected]>2025-10-28 11:27:51 +0530
commit8ea972838cf3f398b1a2896e645c8c2fb23e2159 (patch)
tree27ed41ac15186e86eae65ff3bd17277d4f8c78d1 /include
parentd6b684ec8695fc4f4211670f6c45d54d882af3fb (diff)
utils: cache: Add SiFive ccache controller
SiFive Composable cache is a L3 share cache of the core complex. Add this driver to support the share cache maintenance operations via the MMIO registers. Co-developed-by: Samuel Holland <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Vincent Chen <[email protected]> Co-developed-by: Nick Hu <[email protected]> Signed-off-by: Nick Hu <[email protected]> Reviewed-by: Samuel Holland <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
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