diff options
| author | liutong <[email protected]> | 2026-06-28 13:55:09 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2026-06-28 14:04:17 +0530 |
| commit | 0dfe6be08778102bf2fde61c5c99ea2cceb0b73a (patch) | |
| tree | 7cc03b6013f97ba7d27eb8e5e750c4d0b14b4c44 /lib/utils/cppc | |
| parent | cc9b4ef8f3b465f4625ca40bf6af5e033df2bd75 (diff) | |
lib: sbi_pmu: fix integer overflow in pmu_ctr_idx_validate
pmu_ctr_idx_validate() checks whether counter indices are in range
using cbase + sbi_fls(cmask) < total_ctrs. Both operands are unsigned
long, so a crafted cbase close to ULONG_MAX causes the addition to wrap
around to a small value that passes the comparison.
Once validation is bypassed, sbi_pmu_ctr_cfg_match() with the
SKIP_MATCH flag uses the overflowed index directly as an array subscript
into phs->active_events[], producing an out-of-bounds read in M-mode.
Through the firmware-event code path, the same overflowed index reaches
fw_counters_data[] and fw_counters_started, giving an attacker OOB
write-zero and OOB bit-set primitives in M-mode memory.
Fix pmu_ctr_idx_validate() by checking for unsigned overflow before the
comparison, and add a secondary bounds check on cidx_first in the
SKIP_MATCH path so that even if validation is somehow bypassed in the
future, the array access remains bounded.
Signed-off-by: liutong <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib/utils/cppc')
0 files changed, 0 insertions, 0 deletions
