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authorPawandeep Oza <[email protected]>2026-07-21 14:48:28 -0700
committerAnup Patel <[email protected]>2026-07-22 13:20:14 +0530
commit193b1d9e7ecb06c6a374665bcc177f6997a58505 (patch)
tree94040c126609288663484d3c673ee9d6c1030279 /lib/utils/cppc
parent22139b889dfeaa98d4b3f1abe4fd0b7c96f11b26 (diff)
lib: utils/irqchip/imsic:migrate to irqchip framework
Rewrite imsic_process_hwirqs() to use container_of() for instance lookup, validate ownership via imsic_current_hart_owner(), mask IMSIC_TOPEI_ID_MASK on the raw CSR value, and dispatch non-IPI EIIDs through sbi_irqchip_process_hwirq() instead of an open-coded switch. Rewrite imsic_warm_irqchip_init() to resolve the imsic_data instance via container_of() from the sbi_irqchip_device pointer, and skip initialization silently for harts not owned by this instance. Extend the sbi_irqchip callback set: - hwirq_setup: registers sbi_irqchip_raw_handler_default for the EIID - hwirq_cleanup: clears EIE and EIP bits for the EIID on the owner hart - hwirq_eoi: no-op as claim/ack is already performed by CSR_MTOPEI read in imsic_process_hwirqs() - hwirq_set_affinity: reprograms the upstream MSI source via imsic_program_msi() to retarget the interrupt to the new hart - hwirq_mask: clears the EIE bit for the EIID on the owner hart - hwirq_unmask: sets the EIE bit for the EIID on the owner hart, skipping IPI (EIID 1) and non-owner harts Add imsic_compose_msi_msg() to compute the MMIO target address for a given hart and EIID by walking the imsic_regs array and applying file and guest index offsets. Add imsic_program_msi() that composes an MSI message and delivers it to the upstream interrupt source via sbi_irqchip_write_msi(), enabling APLIC TARGET register programming from the IMSIC driver. Migrate imsic_cold_irqchip_init() to the instance-based model: preserve any pre-configured target_harts mask set by platform or FDT code before applying the imsic_device template, falling back to sbi_hartmask_set_all() only when no mask was provided. Register the irqchip and reserved EIIDs on the embedded irqchip rather than the global singleton. Signed-off-by: Oza Pawandeep <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib/utils/cppc')
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