diff options
| author | Clément Léger <[email protected]> | 2024-10-18 10:40:08 +0200 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2024-10-26 00:00:12 +0530 |
| commit | c46a937fd9071660979ff68e5c6310e62c9d1770 (patch) | |
| tree | e126795690adf22d8c1ee1c0188dd66661ee50ed /lib/utils/timer/fdt_timer_mtimer.c | |
| parent | 3bc86854ab5e26de580433cf67ed47bae148d777 (diff) | |
lib: sbi: add Smdbltrp ISA extension support
Add support for the Smdbltrp[1] ISA extension. First thing to do is
clearing MDT on entry after setting the first MTVEC (since MDT is
reset to 1). Additionally, during trap handling, clear MDT once all
critical CSRs have been saved and in return path, restore MSTATUS/H
before restoring MEPC to avoid taking another trap which would clobber
it.
Link: https://github.com/riscv/riscv-double-trap/releases/download/v0.56/riscv-double-trap.pdf [1]
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Diffstat (limited to 'lib/utils/timer/fdt_timer_mtimer.c')
0 files changed, 0 insertions, 0 deletions
