diff options
| author | Anup Patel <[email protected]> | 2022-08-24 11:39:02 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2022-09-01 16:53:16 +0530 |
| commit | 1664d0efce0b7945394148870acafe19c2b3e900 (patch) | |
| tree | a3d13e1b9b6c956b88d32c2e9cd28629976e3566 /lib | |
| parent | a90cf6b186bff1306a12abd290bd36f7a3702a24 (diff) | |
lib: sbi_pmu: Replace sbi_pmu_ctr_read() with sbi_pmu_ctr_fw_read()
The "read a firmware counter" SBI call should only work for firmware
counters so let us replace sbi_pmu_ctr_read() with sbi_pmu_ctr_fw_read()
which works only on firmware counters.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/sbi/sbi_ecall_pmu.c | 3 | ||||
| -rw-r--r-- | lib/sbi/sbi_pmu.c | 45 |
2 files changed, 9 insertions, 39 deletions
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c index 9ee9e818..826c8a89 100644 --- a/lib/sbi/sbi_ecall_pmu.c +++ b/lib/sbi/sbi_ecall_pmu.c @@ -51,7 +51,8 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid, break; case SBI_EXT_PMU_COUNTER_FW_READ: - ret = sbi_pmu_ctr_read(regs->a0, out_val); + ret = sbi_pmu_ctr_fw_read(regs->a0, &temp); + *out_val = temp; break; case SBI_EXT_PMU_COUNTER_START: diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index 535e5cc1..250808ec 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -167,50 +167,19 @@ static int pmu_ctr_validate(uint32_t cidx, uint32_t *event_idx_code) return event_idx_type; } -static int pmu_ctr_read_fw(uint32_t cidx, unsigned long *cval, - uint32_t fw_evt_code) -{ - u32 hartid = current_hartid(); - struct sbi_pmu_fw_event fevent; - - fevent = fw_event_map[hartid][fw_evt_code]; - *cval = fevent.curr_count; - - return 0; -} - -/* Add a hardware counter read for completeness for future purpose */ -static int pmu_ctr_read_hw(uint32_t cidx, uint64_t *cval) -{ - /* Check for invalid hw counter read requests */ - if (unlikely(cidx == 1)) - return SBI_EINVAL; -#if __riscv_xlen == 32 - uint32_t temp, temph = 0; - - temp = csr_read_num(CSR_MCYCLE + cidx); - temph = csr_read_num(CSR_MCYCLEH + cidx); - *cval = ((uint64_t)temph << 32) | temp; -#else - *cval = csr_read_num(CSR_MCYCLE + cidx); -#endif - - return 0; -} - -int sbi_pmu_ctr_read(uint32_t cidx, unsigned long *cval) +int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval) { int event_idx_type; uint32_t event_code; - uint64_t cval64; + u32 hartid = current_hartid(); + struct sbi_pmu_fw_event *fevent; event_idx_type = pmu_ctr_validate(cidx, &event_code); - if (event_idx_type < 0) + if (event_idx_type != SBI_PMU_EVENT_TYPE_FW) return SBI_EINVAL; - else if (event_idx_type == SBI_PMU_EVENT_TYPE_FW) - pmu_ctr_read_fw(cidx, cval, event_code); - else - pmu_ctr_read_hw(cidx, &cval64); + + fevent = &fw_event_map[hartid][event_code]; + *cval = fevent->curr_count; return 0; } |
