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authorXiang W <[email protected]>2024-09-23 09:37:53 +0800
committerAnup Patel <[email protected]>2024-09-27 13:09:51 +0530
commit2ffa0a153d804910c20b82974bfe2dedcf35a777 (patch)
treefe26c4d7334a5eb83cc8d4ad93bd5cff2df7232e /lib
parent3e141a6950a276632439b202b220e49f3ae6969b (diff)
lib: sbi: fix missing high 32bits when sbi_cppc_write on rv32
sbi_cppc_write was writing to the a1 register only, which under rv32 would cause the high 32 bits to always be 0. This patch fixes that. Closes: https://github.com/riscv-software-src/opensbi/issues/334 Signed-off-by: Xiang W <[email protected]> Reported-by: Wesley Norris <[email protected]> Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib')
-rw-r--r--lib/sbi/sbi_ecall_cppc.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/sbi/sbi_ecall_cppc.c b/lib/sbi/sbi_ecall_cppc.c
index c26bb401..dab78299 100644
--- a/lib/sbi/sbi_ecall_cppc.c
+++ b/lib/sbi/sbi_ecall_cppc.c
@@ -32,7 +32,13 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
#endif
break;
case SBI_EXT_CPPC_WRITE:
- ret = sbi_cppc_write(regs->a0, regs->a1);
+#if __riscv_xlen == 32
+ temp = regs->a2;
+ temp = (temp << 32) | regs->a1;
+#else
+ temp = regs->a1;
+#endif
+ ret = sbi_cppc_write(regs->a0, temp);
break;
case SBI_EXT_CPPC_PROBE:
ret = sbi_cppc_probe(regs->a0);