diff options
| author | Yu Chien Peter Lin <[email protected]> | 2023-11-30 20:42:02 +0800 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2023-12-06 17:30:01 +0530 |
| commit | a48f2cfd94d3be641b2b17eb3fa9090bed2d6cb8 (patch) | |
| tree | 99422c4201161509f27b01fbf9b9a59ad4cfbb12 /lib | |
| parent | 090fa99d7cf519a8b7d2685ae9f84a2fbe46b083 (diff) | |
sbi: sbi_pmu: Add hw_counter_filter_mode() to pmu device
Add support for custom PMU extensions to set inhibit bits
on custom CSRs by introducing the PMU device callback
hw_counter_filter_mode(). This allows the perf tool to
restrict event counting under a specified privileged
mode by appending a modifier, e.g. perf record -e event:k
to count events only happening in kernel mode.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/sbi/sbi_pmu.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c index 2ee6e62a..4b0f5be4 100644 --- a/lib/sbi/sbi_pmu.c +++ b/lib/sbi/sbi_pmu.c @@ -599,7 +599,10 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx, pmu_dev->hw_counter_disable_irq(ctr_idx); /* Update the inhibit flags based on inhibit flags received from supervisor */ - pmu_update_inhibit_flags(flags, &mhpmevent_val); + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSCOFPMF)) + pmu_update_inhibit_flags(flags, &mhpmevent_val); + if (pmu_dev && pmu_dev->hw_counter_filter_mode) + pmu_dev->hw_counter_filter_mode(flags, ctr_idx); #if __riscv_xlen == 32 csr_write_num(CSR_MHPMEVENT3 + ctr_idx - 3, mhpmevent_val & 0xFFFFFFFF); @@ -620,7 +623,8 @@ static int pmu_fixed_ctr_update_inhibit_bits(int fixed_ctr, unsigned long flags) #if __riscv_xlen == 32 uint64_t cfgh_csr_no; #endif - if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF)) + if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF) && + !(pmu_dev && pmu_dev->hw_counter_filter_mode)) return fixed_ctr; switch (fixed_ctr) { @@ -641,13 +645,17 @@ static int pmu_fixed_ctr_update_inhibit_bits(int fixed_ctr, unsigned long flags) } cfg_val |= MHPMEVENT_MINH; - pmu_update_inhibit_flags(flags, &cfg_val); + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMCNTRPMF)) { + pmu_update_inhibit_flags(flags, &cfg_val); #if __riscv_xlen == 32 - csr_write_num(cfg_csr_no, cfg_val & 0xFFFFFFFF); - csr_write_num(cfgh_csr_no, cfg_val >> BITS_PER_LONG); + csr_write_num(cfg_csr_no, cfg_val & 0xFFFFFFFF); + csr_write_num(cfgh_csr_no, cfg_val >> BITS_PER_LONG); #else - csr_write_num(cfg_csr_no, cfg_val); + csr_write_num(cfg_csr_no, cfg_val); #endif + } + if (pmu_dev && pmu_dev->hw_counter_filter_mode) + pmu_dev->hw_counter_filter_mode(flags, fixed_ctr); return fixed_ctr; } |