diff options
| author | Vincent Chen <[email protected]> | 2025-10-20 14:34:05 +0800 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2025-10-28 11:27:51 +0530 |
| commit | 8ea972838cf3f398b1a2896e645c8c2fb23e2159 (patch) | |
| tree | 27ed41ac15186e86eae65ff3bd17277d4f8c78d1 /platform | |
| parent | d6b684ec8695fc4f4211670f6c45d54d882af3fb (diff) | |
utils: cache: Add SiFive ccache controller
SiFive Composable cache is a L3 share cache of the core complex. Add this
driver to support the share cache maintenance operations via the MMIO
registers.
Co-developed-by: Samuel Holland <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Vincent Chen <[email protected]>
Co-developed-by: Nick Hu <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'platform')
| -rw-r--r-- | platform/generic/configs/defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig index 6aa51f56..c074518a 100644 --- a/platform/generic/configs/defconfig +++ b/platform/generic/configs/defconfig @@ -11,6 +11,7 @@ CONFIG_PLATFORM_THEAD=y CONFIG_PLATFORM_MIPS_P8700=y CONFIG_PLATFORM_SPACEMIT_K1=y CONFIG_FDT_CACHE=y +CONFIG_FDT_CACHE_SIFIVE_CCACHE=y CONFIG_FDT_CPPC=y CONFIG_FDT_CPPC_RPMI=y CONFIG_FDT_GPIO=y |