diff options
| author | Mayuresh Chitale <[email protected]> | 2023-03-25 22:20:47 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2023-04-06 18:52:03 +0530 |
| commit | 8e90259da8b4b5bc6c934506cc4302578d44dbc2 (patch) | |
| tree | 6a38a05e971bf6d0ffcce5da92a83b738f258a6f /scripts | |
| parent | 30b9e7ee14498e5db805f471dbb23ea67c7a3b32 (diff) | |
lib: sbi_hart: clear mip csr during hart init
If mip.SEIP bit is not cleared then on HiFive Unmatched board it causes
spurious external interrupts. This breaks the boot up of HiFive Unmatched
board. Hence it is required to bring the mip CSR to a known state during
hart init and avoid spurious interrupts.
Fixes: d9e7368 ("firmware: Not to clear all the MIP")
Signed-off-by: Mayuresh Chitale <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions