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-rw-r--r--include/sbi/riscv_dbtr.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/include/sbi/riscv_dbtr.h b/include/sbi/riscv_dbtr.h
index 96c7d3e3..e249eaed 100644
--- a/include/sbi/riscv_dbtr.h
+++ b/include/sbi/riscv_dbtr.h
@@ -122,6 +122,50 @@ enum {
RV_DBTR_DECLARE_BIT_MASK(MC, TYPE, 4),
};
+
+/* ICOUNT - Match Control Type Register */
+enum {
+ RV_DBTR_DECLARE_BIT(ICOUNT, ACTION, 0),
+ RV_DBTR_DECLARE_BIT(ICOUNT, U, 6),
+ RV_DBTR_DECLARE_BIT(ICOUNT, S, 7),
+ RV_DBTR_DECLARE_BIT(ICOUNT, PENDING, 8),
+ RV_DBTR_DECLARE_BIT(ICOUNT, M, 9),
+ RV_DBTR_DECLARE_BIT(ICOUNT, COUNT, 10),
+ RV_DBTR_DECLARE_BIT(ICOUNT, HIT, 24),
+ RV_DBTR_DECLARE_BIT(ICOUNT, VU, 25),
+ RV_DBTR_DECLARE_BIT(ICOUNT, VS, 26),
+#if __riscv_xlen == 64
+ RV_DBTR_DECLARE_BIT(ICOUNT, DMODE, 59),
+ RV_DBTR_DECLARE_BIT(ICOUNT, TYPE, 60),
+#elif __riscv_xlen == 32
+ RV_DBTR_DECLARE_BIT(ICOUNT, DMODE, 27),
+ RV_DBTR_DECLARE_BIT(ICOUNT, TYPE, 28),
+#else
+ #error "Unknown __riscv_xlen"
+#endif
+};
+
+enum {
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, ACTION, 6),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, U, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, S, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, PENDING, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, M, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, COUNT, 14),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, HIT, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, VU, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, VS, 1),
+#if __riscv_xlen == 64
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, DMODE, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, TYPE, 4),
+#elif __riscv_xlen == 32
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, DMODE, 1),
+ RV_DBTR_DECLARE_BIT_MASK(ICOUNT, TYPE, 4),
+#else
+ #error "Unknown __riscv_xlen"
+#endif
+};
+
/* MC6 - Match Control 6 Type Register */
enum {
RV_DBTR_DECLARE_BIT(MC6, LOAD, 0),