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UBSan (Undefined Behavior Sanitizer) is a tool implemented using
compiler instrumentation at runtime that allows checking for
statements whose output is not deterministic or defined by the C
standard. Compiling and running OpenSBI with UBSan instrumentation
will print a message in the console if any sentence performs such
an action.
Support involves two main components:
1. The UBSan implementation hooks (derived from NetBSD),
used by the compiler to handle the check output.
2. A test suite integrated with the SBI unit test framework to
verify correct operation at runtime.
Usage:
make UBSAN=y PLATFORM=generic ...
The test suite is built when both UBSAN=y and CONFIG_SBIUNIT=y are
enabled.
When UBSan is enabled, FW_PAYLOAD_OFFSET may need to be increased
due to the size increase added by the instrumentation. A
value of 0x400000 has been tested.
UBSan adds runtime overhead and is intended for development builds
only, not for production.
Note: This patch marks __stack_chk_guard in sbi_init.c as a weak
symbol to prevent multiple definition errors at compile time with
UBSan instrumentation enabled. This resolves the conflict
between the .globl definitions in sbi_init.c and test_head.S.
Signed-off-by: Marcos Oduardo <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Create a new file for handling the RISC-V PMP format and the new pmp_t
type, as opposed to hart PMP CSR specific access.
Signed-off-by: Nicholas Piggin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add support for saving and restoring RISC-V floating-point (F/D) extension
state in OpenSBI. This introduces a floating-point context structure and
helper routines to perform full context save and restore.
The floating-point context includes storage for all 32 FPi registers (f0–f31)
along with the fcsr control and status register. The register state is saved
and restored using double-precision load/store instructions (fsd/fld), and
single-precision load/store instructions (fsw/flw) on an RV64 system with
F and D-extension support.
The implementation follows an eager context switching model where the entire
FP state is saved and restored on every context switch. This avoids the need
for trap-based lazy management and keeps the design simple and deterministic.
Signed-off-by: Dave Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Eager context switch: Add support for saving and restoring RISC-V vector
extension state in OpenSBI. This introduces a per-hart vector context
structure and helper routines to perform full context save and restore.
The vector context includes vcsr CSRs along with storage for all 32 vector
registers. The register state is saved and restored using byte-wise vector
load/store instructions (vs8r/vl8r).
The implementation follows an eager context switching model where the entire
vector state is saved and restored on every context switch. This provides a
simple and deterministic mechanism without requiring lazy trap-based
management.
Signed-off-by: Dave Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The PMP programming is a significant part of sbi_hart.c so factor-out
this into separate sources sbi_hart_pmp.c and sbi_hart_pmp.h for better
maintainability.
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Currently, PMP and ePMP are the only hart protection mechanisms
available in OpenSBI but new protection mechanisms (such as Smmpt)
will be added in the near future.
To allow multiple hart protection mechanisms, introduce hart
protection abstraction and related APIs.
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The AMO instructions are very critical for Linux so allow low-end
RISC-V implementations without Zaamo to boot Linux by emulating AMO
instructions using Zalrsc when OpenSBI is compiled without Zaamo.
Signed-off-by: Chao-ying Fu <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add misaligned load/store handling for the vector extension
to the sbi_misaligned_ldst library.
This implementation is inspired from the misaligned_vec_ldst
implementation in the riscv-pk project.
Co-developed-by: Zong Li <[email protected]>
Signed-off-by: Zong Li <[email protected]>
Signed-off-by: Nylon Chen <[email protected]>
Reviewed-by: Andy Chiu <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Implement the SBI MPXY extension which provides an SBI interface to
the supervisor software for send messages via MPXY framework.
Signed-off-by: Rahul Pathak <[email protected]>
Co-developed-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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Introduce SBI Message Proxy (MPXY) framework which allows platform specific
code or drivers to register message protocol specific channels.
This framework enables the supervisor software to send messages belonging
to different message protocols via OpenSBI firmware.
Signed-off-by: Rahul Pathak <[email protected]>
Co-developed-by: Himanshu Chauhan <[email protected]>
Signed-off-by: Himanshu Chauhan <[email protected]>
Co-developed-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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Add Ssdbltrp trap handler support for S-mode double trap handling. If
the trap is received while in VS-mode, then the trap is redirected to
S-mode. If caught while in HS-mode, then an error is returned to the top
trap handler which will panic.
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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Different parts of OpenSBI require their own per-domain data so
introduce domain data (or sbi_domain_data) which can be registered
by any part of OpenSBI. Using the domain data, the domain framework
will create a data pointer for every domain which can be used to
maintain some per-domain state.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Yu Chien Peter Lin <[email protected]>
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We would like to clean any files generated by the carray
scripts by just searching for the filename as the current
make system turns f.carray into f.o. Change to make the
make system turn f.carray into f.carray.o
note, command to go through .mk files changing the .o
in the .mk files is:
find . -type f -name "*.carray" | xargs -t -I fname /bin/bash -x -c ' fn=`basename -s .carray fname`; echo "$fn"; sed -i `dirname fname `/objects.mk -e s/"$fn".o/"$fn".carray.o/g'
Link: https://patchwork.ozlabs.org/project/opensbi/patch/[email protected]/
Reported-by: Ivan Orlov <[email protected]>
Suggested-by: Andrew Jones <[email protected]>
Signed-off-by: Ben Dooks <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The SBI FWFT extension defines a set of function that can be called
to control the configuration of some platform features (misaligned
trap delegation, etc). This patch implements sbi_fwft_set() and
sbi_fwft_get() as defined in the specification [1].
Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This extension allows the software running in supervisor mode to control
the behavior of various features of the SBI [1]. Implement the support
for such extension.
Link: https://lists.riscv.org/g/tech-prs/message/924 [1]
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The SBI SSE extension defines a set of function that can be called to
register and handle supervisor sofwtare events. This patch implements
all of the functionality defined in the specification.
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Himanshu Chauhan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This extension [1] allows to deliver events from SBI to supervisor via
a software mechanism. This extension defines events (either local or
global) which are signaled by the SBI on specific signal sources (IRQ,
exceptions, etc) and are injected to be executed in supervisor mode.
[1] https://lists.riscv.org/g/tech-prs/message/798
Signed-off-by: Clément Léger <[email protected]>
Reviewed-by: Himanshu Chauhan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Move all of the SBIUnit-related code into the lib/sbi/tests directory.
Update 'Makefile' to index objects from the tests subdirectory.
I don't think creating the full separate list of Makefile variables
(libsbitests-objs-path-y, libsbitests-object-mks, etc. as it is done for
libsbiutils) is necessary for the tests because:
1) `lib/sbi/tests/objects.mk` is already indexed into
'libsbi-objects-mks' since the find expression for the libsbi-object-mks
variable looks for objects.mk files in the nested directories as well).
2) Tests are tightly coupled with the `lib/sbi/` sources, therefore it
may be reasonable to store the list of lib/sbi and lib/sbi/tests object
files together in the libsbi-objs-path-y variable.
Additionally, update relative paths in the tests where necessary.
Signed-off-by: Ivan Orlov <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Signed-off-by: Bo Gan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The domain context management component in OpenSBI provides basic CPU
context management routines for existing OpenSBI domain. As domain
extension, it was initially designed to facilitate the suspension
and resumption of domains, enabling secure domains to efficiently
share CPU resources.
The patch also provides an addition to the OpenSBI domain to provide
updates on hart-domain assignment and declarations of contexts within
the domain.
Signed-off-by: Qingyu Shang <[email protected]>
Reviewed-by: Yu Chien Peter Lin <[email protected]>
Tested-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add the test suite covering some of the functions from
lib/sbi/sbi_console.c: putc, puts and printf. The test covers a variety
of format specifiers for printf and different strings and characters for
putc and puts.
In order to do that, the test "mocks" the sbi_console_device structure
by setting the 'console_dev' variable to the virtual console.
Signed-off-by: Ivan Orlov <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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Add test suite covering all of the functions from lib/sbi/sbi_bitmap.c:
__bitmap_and, __bitmap_or and __bitmap_xor.
Signed-off-by: Ivan Orlov <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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This patch introduces all of the SBIUnit macros and functions which
can be used during the test development process. Also, it defines
the 'run_all_tests' function, which is being called during the
'init_coldboot' right after printing the boot hart information.
Also, add the CONFIG_SBIUNIT Kconfig entry in order to be able to
turn the tests on and off. When the CONFIG_SBIUNIT is disabled,
the tests and all related code is excluded completely on the
compilation stage.
Signed-off-by: Ivan Orlov <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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This patch adds functions to register ecalls for debug triggers
and handler to handle the debug trigger function IDs.
Signed-off-by: Himanshu Chauhan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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RISC-V Debug specification includes Sdtrig ISA extension
which describes Trigger Module. Triggers can cause
a breakpoint exception or trace action without execution
of a special instruction. They can be used to implement
hardware breakpoints and watchpoints for native debugging.
The SBI Debut Trigger extension (Draft v6) can be found at:
https://lists.riscv.org/g/tech-debug/topic/99825362#1302
This patch is an initial implementation of SBI Debug
Trigger Extension (Draft v6) in OpenSBI.
The following features are supported:
* mcontrol, mcontrol6 triggers
* Breakpoint and trace actions
NOTE: Chained triggers are not supported
Signed-off-by: Himanshu Chauhan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We provide simple heap allocator to manage the heap space provided
by OpenSBI firmware and platform.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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Implement SBI CPPC extension. This extension is only available when
OpenSBI platform provides a CPPC device to generic library.
Signed-off-by: Sunil V L <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add the SUSP extension probe and ecall support, but for now the
system suspend function is just a stub.
Signed-off-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We implement SBI debug console extension as one of the replacement
SBI extensions. This extension is only available when OpenSBI platform
provides a console device to generic library.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Split up sbi_ecall_replace so that each extension is in its individual
file.
Also reorganize the corresponding section in lib/sbi/objects.mk so
that it is grouped by extension, now that the object file targets are
split up.
Signed-off-by: Vivian Wang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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For each SBI extension, we:
- Add a Kconfig option for it
- Add the extension to sbi_ecall_exts only if the extension is enabled
- Add the corresponding sbi_ecall_* object file only if the extension is
enabled
Special cases are as follows:
- The legacy extensions are lumped together as one 'big' extension, as
has always been the case in OpenSBI code.
- The platform-defined vendor extensions are regarded as one extension.
- The Base extension cannot be disabled.
- sbi_ecall_replace implements multiple extensions, so it's not easy to
avoid linking it in. Enable it always, and use #ifdef to
disable/enable individual extensions.
Signed-off-by: Vivian Wang <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Instead of hard-coding the list of extensions in C code, use carray to
generate the list of extensions.
Using carray makes adding and removing extensions slightly cleaner. This
also paves the way for using Kconfig to disable unneeded extensions.
Signed-off-by: Vivian Wang <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Currently, the external interrupt handling is scattered between
sbi_init and sbi_trap. This patch moves all external interrupt
handling into a simple framework called sbi_irqchip.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor
mode to start/stop/configure pmu related events. This patch implements
all of the functionality defined in the specification.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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RISC-V SBI v0.3 specification defined a PMU extension to configure/start/stop
the hardware/firmware pmu events.
Implement PMU support in OpenSBI library. The implementation is agnostic of
event to counter mapping & mhpmevent value configuration. That means, it
expects platform hooks will be used to set up the mapping and provide
the mhpmevent value at runtime.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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An OpenSBI domain is a logical entity representing a set of HARTs
and a set of memory regions for these HARTs.
The OpenSBI domains support will allow OpenSBI platforms and previous
booting stage (i.e. U-Boot SPL, Coreboot, etc) to partition a system
into multiple domains where each domain will run it's own software.
For inter-domain isolation, OpenSBI will eventually use various HW
features such as PMP, ePMP, IOPMP, SiFive shield, etc but initial
implementation only use HW PMP support.
This patch provides initial implementation of OpenSBI domains where
we have a root/default domain and OpenSBI platforms can provide
non-root/custom domains using domain_get() callback.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We have now clear distinction between platform and hart features.
Modify the boot print messages to print platform features in a string
format. In the process, this patch moved relatively larger functions
to its own file from platform.h header file.
Signed-off-by: Atish Patra <[email protected]>
Tested-by: Jonathan Balkind <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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There may be few common mathematics helper functions which can be used
anywhere in OpenSBI project.
Add a separate math helper function file to add these functions.
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Unprivileged trap handler can be reused for any cases where the executing
code expects a trap.
Rename it to "expected" trap handler as it will be used in other cases in
future.
Signed-off-by: Atish Patra <[email protected]>
Tested-by: Jonathan Balkind <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch optimize unpriv load/store implementation by having
dedicated unpriv trap handler (just like KVM RISC-V).
As a result of this optimization:
1. We have reduced roughly 13+ instruction in all unpriv load/store
functions. The reduced instruction also include two function calls.
2. Per-HART trap info pointer in scratch space is now redundant
hence removed.
3. The sbi_trap_handler() is now much cleaner because we don't have
to handle unpriv load/store traps.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple bitmap library which will help us create and maintain
bitmaps. It will also help us create a simple HART mask library.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch extends our bit operation library with mechanism to:
1. Iteratively traverse bits
2. Set bit
3. Clear bit
4. Change bit
5. ... other helpful functions ...
Most the above is adopted from Xvisor sources.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch adds support HSM extension. The specification is available
at https://github.com/riscv/riscv-sbi-doc.
It allows to implement hart hotplug and fixed ordered hart booting in
supervisor.
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch adds support for hart hotplug in OpenSBI using a generic WFI
based approach. Hart hotplug can be achieved via SBI HSM extension which
allows supervisor mode software to start or stop any harts anytime.
Any platform wishes to implement platform specific hart hotplug must
implement both hart_start and hart_stop in addition to enable platform
feature SBI_PLATFORM_HAS_HART_HOTPLUG.
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch factor-out SBI base extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch factor-out SBI vendor extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch factor-out SBI replacement extensions (such as RFENCE,
IPI, and TIME) into its own source for better modularity of SBI
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch factor-out SBI legacy extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, the toolchains do not have support for hfence instruction.
Hence, the instruction are hardcode until we have toolchain support.
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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