summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLZero <[email protected]>2024-05-09 11:55:44 +0800
committerMeco Man <[email protected]>2024-05-09 00:37:10 -0400
commit1cac9e92b562119052c5fdeee84fe9d535df3236 (patch)
tree23b7e8b0529213ff13890d62947ff4f0e896f58e
parent79b3d5ec1e47dbee3595d4bfe78ec496512354ba (diff)
Stm32F411 Blackpill CubeMX delete SPI_NSS
-rw-r--r--bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/CubeMX_Config.ioc35
-rw-r--r--bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/main.c686
-rw-r--r--bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c12
-rw-r--r--bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/system_stm32f4xx.c747
4 files changed, 16 insertions, 1464 deletions
diff --git a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/CubeMX_Config.ioc
index 9f6e8a3963..eb0e0261fa 100644
--- a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/CubeMX_Config.ioc
+++ b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/CubeMX_Config.ioc
@@ -46,30 +46,29 @@ Mcu.Pin20=PA11
Mcu.Pin21=PA12
Mcu.Pin22=PA13
Mcu.Pin23=PA14
-Mcu.Pin24=PA15
-Mcu.Pin25=PB3
-Mcu.Pin26=PB4
-Mcu.Pin27=PB5
-Mcu.Pin28=PB6
-Mcu.Pin29=PB7
+Mcu.Pin24=PB3
+Mcu.Pin25=PB4
+Mcu.Pin26=PB5
+Mcu.Pin27=PB6
+Mcu.Pin28=PB7
+Mcu.Pin29=PB8
Mcu.Pin3=PH0 - OSC_IN
-Mcu.Pin30=PB8
-Mcu.Pin31=PB9
-Mcu.Pin32=VP_ADC1_TempSens_Input
-Mcu.Pin33=VP_ADC1_Vref_Input
-Mcu.Pin34=VP_RTC_VS_RTC_Activate
-Mcu.Pin35=VP_SYS_VS_Systick
-Mcu.Pin36=VP_TIM1_VS_ClockSourceINT
-Mcu.Pin37=VP_TIM4_VS_ClockSourceINT
-Mcu.Pin38=VP_TIM10_VS_ClockSourceINT
-Mcu.Pin39=VP_TIM11_VS_ClockSourceINT
+Mcu.Pin30=PB9
+Mcu.Pin31=VP_ADC1_TempSens_Input
+Mcu.Pin32=VP_ADC1_Vref_Input
+Mcu.Pin33=VP_RTC_VS_RTC_Activate
+Mcu.Pin34=VP_SYS_VS_Systick
+Mcu.Pin35=VP_TIM1_VS_ClockSourceINT
+Mcu.Pin36=VP_TIM4_VS_ClockSourceINT
+Mcu.Pin37=VP_TIM10_VS_ClockSourceINT
+Mcu.Pin38=VP_TIM11_VS_ClockSourceINT
Mcu.Pin4=PH1 - OSC_OUT
Mcu.Pin5=PA0-WKUP
Mcu.Pin6=PA1
Mcu.Pin7=PA2
Mcu.Pin8=PA3
Mcu.Pin9=PA4
-Mcu.PinsNb=40
+Mcu.PinsNb=39
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F411CEUx
@@ -102,8 +101,6 @@ PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
-PA15.Locked=true
-PA15.Signal=SPI1_NSS
PA2.Locked=true
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
diff --git a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/main.c
deleted file mode 100644
index e7bd99e3b9..0000000000
--- a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/main.c
+++ /dev/null
@@ -1,686 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file : main.c
- * @brief : Main program body
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2022 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
- ADC_HandleTypeDef hadc1;
-
-RTC_HandleTypeDef hrtc;
-
-SPI_HandleTypeDef hspi1;
-
-TIM_HandleTypeDef htim1;
-TIM_HandleTypeDef htim4;
-TIM_HandleTypeDef htim10;
-TIM_HandleTypeDef htim11;
-
-UART_HandleTypeDef huart1;
-UART_HandleTypeDef huart2;
-
-PCD_HandleTypeDef hpcd_USB_OTG_FS;
-
-/* USER CODE BEGIN PV */
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_USART1_UART_Init(void);
-static void MX_RTC_Init(void);
-static void MX_TIM10_Init(void);
-static void MX_TIM11_Init(void);
-static void MX_USB_OTG_FS_PCD_Init(void);
-static void MX_ADC1_Init(void);
-static void MX_TIM1_Init(void);
-static void MX_TIM4_Init(void);
-static void MX_USART2_UART_Init(void);
-static void MX_SPI1_Init(void);
-/* USER CODE BEGIN PFP */
-
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/**
- * @brief The application entry point.
- * @retval int
- */
-int main(void)
-{
- /* USER CODE BEGIN 1 */
-
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
-
- /* USER CODE BEGIN Init */
-
- /* USER CODE END Init */
-
- /* Configure the system clock */
- SystemClock_Config();
-
- /* USER CODE BEGIN SysInit */
-
- /* USER CODE END SysInit */
-
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- MX_USART1_UART_Init();
- MX_RTC_Init();
- MX_TIM10_Init();
- MX_TIM11_Init();
- MX_USB_OTG_FS_PCD_Init();
- MX_ADC1_Init();
- MX_TIM1_Init();
- MX_TIM4_Init();
- MX_USART2_UART_Init();
- MX_SPI1_Init();
- /* USER CODE BEGIN 2 */
-
- /* USER CODE END 2 */
-
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1)
- {
- /* USER CODE END WHILE */
-
- /* USER CODE BEGIN 3 */
- }
- /* USER CODE END 3 */
-}
-
-/**
- * @brief System Clock Configuration
- * @retval None
- */
-void SystemClock_Config(void)
-{
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
- /** Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
- /** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- RCC_OscInitStruct.LSEState = RCC_LSE_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 15;
- RCC_OscInitStruct.PLL.PLLN = 144;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
- RCC_OscInitStruct.PLL.PLLQ = 5;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
- {
- Error_Handler();
- }
-}
-
-/**
- * @brief ADC1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_ADC1_Init(void)
-{
-
- /* USER CODE BEGIN ADC1_Init 0 */
-
- /* USER CODE END ADC1_Init 0 */
-
- ADC_ChannelConfTypeDef sConfig = {0};
-
- /* USER CODE BEGIN ADC1_Init 1 */
-
- /* USER CODE END ADC1_Init 1 */
-
- /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
- */
- hadc1.Instance = ADC1;
- hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
- hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- hadc1.Init.ScanConvMode = DISABLE;
- hadc1.Init.ContinuousConvMode = DISABLE;
- hadc1.Init.DiscontinuousConvMode = DISABLE;
- hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- hadc1.Init.NbrOfConversion = 1;
- hadc1.Init.DMAContinuousRequests = DISABLE;
- hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- if (HAL_ADC_Init(&hadc1) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_0;
- sConfig.Rank = 1;
- sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN ADC1_Init 2 */
-
- /* USER CODE END ADC1_Init 2 */
-
-}
-
-/**
- * @brief RTC Initialization Function
- * @param None
- * @retval None
- */
-static void MX_RTC_Init(void)
-{
-
- /* USER CODE BEGIN RTC_Init 0 */
-
- /* USER CODE END RTC_Init 0 */
-
- /* USER CODE BEGIN RTC_Init 1 */
-
- /* USER CODE END RTC_Init 1 */
-
- /** Initialize RTC Only
- */
- hrtc.Instance = RTC;
- hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
- hrtc.Init.AsynchPrediv = 127;
- hrtc.Init.SynchPrediv = 255;
- hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
- hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
- hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
- if (HAL_RTC_Init(&hrtc) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN RTC_Init 2 */
-
- /* USER CODE END RTC_Init 2 */
-
-}
-
-/**
- * @brief SPI1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SPI1_Init(void)
-{
-
- /* USER CODE BEGIN SPI1_Init 0 */
-
- /* USER CODE END SPI1_Init 0 */
-
- /* USER CODE BEGIN SPI1_Init 1 */
-
- /* USER CODE END SPI1_Init 1 */
- /* SPI1 parameter configuration*/
- hspi1.Instance = SPI1;
- hspi1.Init.Mode = SPI_MODE_MASTER;
- hspi1.Init.Direction = SPI_DIRECTION_2LINES;
- hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
- hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
- hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
- hspi1.Init.NSS = SPI_NSS_SOFT;
- hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
- hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
- hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- hspi1.Init.CRCPolynomial = 10;
- if (HAL_SPI_Init(&hspi1) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN SPI1_Init 2 */
-
- /* USER CODE END SPI1_Init 2 */
-
-}
-
-/**
- * @brief TIM1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM1_Init(void)
-{
-
- /* USER CODE BEGIN TIM1_Init 0 */
-
- /* USER CODE END TIM1_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
- TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
-
- /* USER CODE BEGIN TIM1_Init 1 */
-
- /* USER CODE END TIM1_Init 1 */
- htim1.Instance = TIM1;
- htim1.Init.Prescaler = 0;
- htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim1.Init.Period = 65535;
- htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim1.Init.RepetitionCounter = 0;
- htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- sConfigOC.Pulse = 0;
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
- sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
- if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- {
- Error_Handler();
- }
- sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
- sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
- sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
- sBreakDeadTimeConfig.DeadTime = 0;
- sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
- sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
- sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
- if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM1_Init 2 */
-
- /* USER CODE END TIM1_Init 2 */
- HAL_TIM_MspPostInit(&htim1);
-
-}
-
-/**
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM4_Init(void)
-{
-
- /* USER CODE BEGIN TIM4_Init 0 */
-
- /* USER CODE END TIM4_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
-
- /* USER CODE BEGIN TIM4_Init 1 */
-
- /* USER CODE END TIM4_Init 1 */
- htim4.Instance = TIM4;
- htim4.Init.Prescaler = 0;
- htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim4.Init.Period = 65535;
- htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- sConfigOC.Pulse = 0;
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM4_Init 2 */
-
- /* USER CODE END TIM4_Init 2 */
- HAL_TIM_MspPostInit(&htim4);
-
-}
-
-/**
- * @brief TIM10 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM10_Init(void)
-{
-
- /* USER CODE BEGIN TIM10_Init 0 */
-
- /* USER CODE END TIM10_Init 0 */
-
- /* USER CODE BEGIN TIM10_Init 1 */
-
- /* USER CODE END TIM10_Init 1 */
- htim10.Instance = TIM10;
- htim10.Init.Prescaler = 0;
- htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim10.Init.Period = 65535;
- htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM10_Init 2 */
-
- /* USER CODE END TIM10_Init 2 */
-
-}
-
-/**
- * @brief TIM11 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM11_Init(void)
-{
-
- /* USER CODE BEGIN TIM11_Init 0 */
-
- /* USER CODE END TIM11_Init 0 */
-
- /* USER CODE BEGIN TIM11_Init 1 */
-
- /* USER CODE END TIM11_Init 1 */
- htim11.Instance = TIM11;
- htim11.Init.Prescaler = 0;
- htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim11.Init.Period = 65535;
- htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM11_Init 2 */
-
- /* USER CODE END TIM11_Init 2 */
-
-}
-
-/**
- * @brief USART1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART1_UART_Init(void)
-{
-
- /* USER CODE BEGIN USART1_Init 0 */
-
- /* USER CODE END USART1_Init 0 */
-
- /* USER CODE BEGIN USART1_Init 1 */
-
- /* USER CODE END USART1_Init 1 */
- huart1.Instance = USART1;
- huart1.Init.BaudRate = 115200;
- huart1.Init.WordLength = UART_WORDLENGTH_8B;
- huart1.Init.StopBits = UART_STOPBITS_1;
- huart1.Init.Parity = UART_PARITY_NONE;
- huart1.Init.Mode = UART_MODE_TX_RX;
- huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- if (HAL_UART_Init(&huart1) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN USART1_Init 2 */
-
- /* USER CODE END USART1_Init 2 */
-
-}
-
-/**
- * @brief USART2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART2_UART_Init(void)
-{
-
- /* USER CODE BEGIN USART2_Init 0 */
-
- /* USER CODE END USART2_Init 0 */
-
- /* USER CODE BEGIN USART2_Init 1 */
-
- /* USER CODE END USART2_Init 1 */
- huart2.Instance = USART2;
- huart2.Init.BaudRate = 115200;
- huart2.Init.WordLength = UART_WORDLENGTH_8B;
- huart2.Init.StopBits = UART_STOPBITS_1;
- huart2.Init.Parity = UART_PARITY_NONE;
- huart2.Init.Mode = UART_MODE_TX_RX;
- huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart2.Init.OverSampling = UART_OVERSAMPLING_16;
- if (HAL_UART_Init(&huart2) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN USART2_Init 2 */
-
- /* USER CODE END USART2_Init 2 */
-
-}
-
-/**
- * @brief USB_OTG_FS Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USB_OTG_FS_PCD_Init(void)
-{
-
- /* USER CODE BEGIN USB_OTG_FS_Init 0 */
-
- /* USER CODE END USB_OTG_FS_Init 0 */
-
- /* USER CODE BEGIN USB_OTG_FS_Init 1 */
-
- /* USER CODE END USB_OTG_FS_Init 1 */
- hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
- hpcd_USB_OTG_FS.Init.dev_endpoints = 4;
- hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
- hpcd_USB_OTG_FS.Init.dma_enable = DISABLE;
- hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
- hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
- hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
- hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
- hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
- hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
- if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN USB_OTG_FS_Init 2 */
-
- /* USER CODE END USB_OTG_FS_Init 2 */
-
-}
-
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOC_CLK_ENABLE();
- __HAL_RCC_GPIOH_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
-
- /*Configure GPIO pin : PC13 */
- GPIO_InitStruct.Pin = GPIO_PIN_13;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
-}
-
-/* USER CODE BEGIN 4 */
-
-/* USER CODE END 4 */
-
-/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
-void Error_Handler(void)
-{
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
- __disable_irq();
- while (1)
- {
- }
- /* USER CODE END Error_Handler_Debug */
-}
-
-#ifdef USE_FULL_ASSERT
-/**
- * @brief Reports the name of the source file and the source line number
- * where the assert_param error has occurred.
- * @param file: pointer to the source file name
- * @param line: assert_param error line source number
- * @retval None
- */
-void assert_failed(uint8_t *file, uint32_t line)
-{
- /* USER CODE BEGIN 6 */
- /* User can add his own implementation to report the file name and line number,
- ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
- /* USER CODE END 6 */
-}
-#endif /* USE_FULL_ASSERT */
diff --git a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
index 34a2954eb3..f1a8d1cb92 100644
--- a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
+++ b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
@@ -236,21 +236,12 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**SPI1 GPIO Configuration
- PA15 ------> SPI1_NSS
PB3 ------> SPI1_SCK
PB4 ------> SPI1_MISO
PB5 ------> SPI1_MOSI
*/
- GPIO_InitStruct.Pin = GPIO_PIN_15;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
@@ -282,13 +273,10 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
- PA15 ------> SPI1_NSS
PB3 ------> SPI1_SCK
PB4 ------> SPI1_MISO
PB5 ------> SPI1_MOSI
*/
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15);
-
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
diff --git a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/system_stm32f4xx.c b/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/system_stm32f4xx.c
deleted file mode 100644
index 3bd40f7788..0000000000
--- a/bsp/stm32/stm32f411-weact-blackpill/board/CubeMX_Config/Src/system_stm32f4xx.c
+++ /dev/null
@@ -1,747 +0,0 @@
-/**
- ******************************************************************************
- * @file system_stm32f4xx.c
- * @author MCD Application Team
- * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
- *
- * This file provides two functions and one global variable to be called from
- * user application:
- * - SystemInit(): This function is called at startup just after reset and
- * before branch to main program. This call is made inside
- * the "startup_stm32f4xx.s" file.
- *
- * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
- * by the user application to setup the SysTick
- * timer or configure other parameters.
- *
- * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
- * be called whenever the core clock is changed
- * during program execution.
- *
- *
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/** @addtogroup CMSIS
- * @{
- */
-
-/** @addtogroup stm32f4xx_system
- * @{
- */
-
-/** @addtogroup STM32F4xx_System_Private_Includes
- * @{
- */
-
-
-#include "stm32f4xx.h"
-
-#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined (HSI_VALUE)
- #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Defines
- * @{
- */
-
-/************************* Miscellaneous Configuration ************************/
-/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-/* #define DATA_IN_ExtSRAM */
-#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
- STM32F412Zx || STM32F412Vx */
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-/* #define DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
- STM32F479xx */
-
-/* Note: Following vector table addresses must be defined in line with linker
- configuration. */
-/*!< Uncomment the following line if you need to relocate the vector table
- anywhere in Flash or Sram, else the vector table is kept at the automatic
- remap of boot address selected */
-/* #define USER_VECT_TAB_ADDRESS */
-
-#if defined(USER_VECT_TAB_ADDRESS)
-/*!< Uncomment the following line if you need to relocate your vector Table
- in Sram else user remap will be done in Flash. */
-/* #define VECT_TAB_SRAM */
-#if defined(VECT_TAB_SRAM)
-#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
- This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-#else
-#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
- This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-#endif /* VECT_TAB_SRAM */
-#endif /* USER_VECT_TAB_ADDRESS */
-/******************************************************************************/
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Variables
- * @{
- */
- /* This variable is updated in three ways:
- 1) by calling CMSIS function SystemCoreClockUpdate()
- 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
- 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
- Note: If you use this function to configure the system clock; then there
- is no need to call the 2 first functions listed above, since SystemCoreClock
- variable is updated automatically.
- */
-uint32_t SystemCoreClock = 16000000;
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
- * @{
- */
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
- static void SystemInit_ExtMemCtl(void);
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
-/**
- * @}
- */
-
-/** @addtogroup STM32F4xx_System_Private_Functions
- * @{
- */
-
-/**
- * @brief Setup the microcontroller system
- * Initialize the FPU setting, vector table location and External memory
- * configuration.
- * @param None
- * @retval None
- */
-void SystemInit(void)
-{
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- #endif
-
-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
- SystemInit_ExtMemCtl();
-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
-
- /* Configure the Vector Table location -------------------------------------*/
-#if defined(USER_VECT_TAB_ADDRESS)
- SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#endif /* USER_VECT_TAB_ADDRESS */
-}
-
-/**
- * @brief Update SystemCoreClock variable according to Clock Register Values.
- * The SystemCoreClock variable contains the core clock (HCLK), it can
- * be used by the user application to setup the SysTick timer or configure
- * other parameters.
- *
- * @note Each time the core clock (HCLK) changes, this function must be called
- * to update SystemCoreClock variable value. Otherwise, any configuration
- * based on this variable will be incorrect.
- *
- * @note - The system frequency computed by this function is not the real
- * frequency in the chip. It is calculated based on the predefined
- * constant and the selected clock source:
- *
- * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
- *
- * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
- *
- * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
- * or HSI_VALUE(*) multiplied/divided by the PLL factors.
- *
- * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
- * 16 MHz) but the real value may vary depending on the variations
- * in voltage and temperature.
- *
- * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
- * depends on the application requirements), user has to ensure that HSE_VALUE
- * is same as the real frequency of the crystal used. Otherwise, this function
- * may have wrong result.
- *
- * - The result of this function could be not correct when using fractional
- * value for HSE crystal.
- *
- * @param None
- * @retval None
- */
-void SystemCoreClockUpdate(void)
-{
- uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
-
- /* Get SYSCLK source -------------------------------------------------------*/
- tmp = RCC->CFGR & RCC_CFGR_SWS;
-
- switch (tmp)
- {
- case 0x00: /* HSI used as system clock source */
- SystemCoreClock = HSI_VALUE;
- break;
- case 0x04: /* HSE used as system clock source */
- SystemCoreClock = HSE_VALUE;
- break;
- case 0x08: /* PLL used as system clock source */
-
- /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
- SYSCLK = PLL_VCO / PLL_P
- */
- pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
- pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
-
- if (pllsource != 0)
- {
- /* HSE used as PLL clock source */
- pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
- }
- else
- {
- /* HSI used as PLL clock source */
- pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
- }
-
- pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
- SystemCoreClock = pllvco/pllp;
- break;
- default:
- SystemCoreClock = HSI_VALUE;
- break;
- }
- /* Compute HCLK frequency --------------------------------------------------*/
- /* Get HCLK prescaler */
- tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
- /* HCLK frequency */
- SystemCoreClock >>= tmp;
-}
-
-#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)
-/**
- * @brief Setup the external memory controller.
- * Called in startup_stm32f4xx.s before jump to main.
- * This function configures the external memories (SRAM/SDRAM)
- * This SRAM/SDRAM will be used as program data memory (including heap and stack).
- * @param None
- * @retval None
- */
-void SystemInit_ExtMemCtl(void)
-{
- __IO uint32_t tmp = 0x00;
-
- register uint32_t tmpreg = 0, timeout = 0xFFFF;
- register __IO uint32_t index;
-
- /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
- RCC->AHB1ENR |= 0x000001F8;
-
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x00CCC0CC;
- GPIOD->AFR[1] = 0xCCCCCCCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xAAAA0A8A;
- /* Configure PDx pins speed to 100 MHz */
- GPIOD->OSPEEDR = 0xFFFF0FCF;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00CC0CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA828A;
- /* Configure PEx pins speed to 100 MHz */
- GPIOE->OSPEEDR = 0xFFFFC3CF;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0xCCCCCCCC;
- GPIOF->AFR[1] = 0xCCCCCCCC;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA800AAA;
- /* Configure PFx pins speed to 50 MHz */
- GPIOF->OSPEEDR = 0xAA800AAA;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0xCCCCCCCC;
- GPIOG->AFR[1] = 0xCCCCCCCC;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0xAAAAAAAA;
- /* Configure PGx pins speed to 50 MHz */
- GPIOG->OSPEEDR = 0xAAAAAAAA;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
- /* Connect PHx pins to FMC Alternate function */
- GPIOH->AFR[0] = 0x00C0CC00;
- GPIOH->AFR[1] = 0xCCCCCCCC;
- /* Configure PHx pins in Alternate function mode */
- GPIOH->MODER = 0xAAAA08A0;
- /* Configure PHx pins speed to 50 MHz */
- GPIOH->OSPEEDR = 0xAAAA08A0;
- /* Configure PHx pins Output type to push-pull */
- GPIOH->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PHx pins */
- GPIOH->PUPDR = 0x00000000;
-
- /* Connect PIx pins to FMC Alternate function */
- GPIOI->AFR[0] = 0xCCCCCCCC;
- GPIOI->AFR[1] = 0x00000CC0;
- /* Configure PIx pins in Alternate function mode */
- GPIOI->MODER = 0x0028AAAA;
- /* Configure PIx pins speed to 50 MHz */
- GPIOI->OSPEEDR = 0x0028AAAA;
- /* Configure PIx pins Output type to push-pull */
- GPIOI->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PIx pins */
- GPIOI->PUPDR = 0x00000000;
-
-/*-- FMC Configuration -------------------------------------------------------*/
- /* Enable the FMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
- FMC_Bank5_6->SDCR[0] = 0x000019E4;
- FMC_Bank5_6->SDTR[0] = 0x01115351;
-
- /* SDRAM initialization sequence */
- /* Clock enable command */
- FMC_Bank5_6->SDCMR = 0x00000011;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Delay */
- for (index = 0; index<1000; index++);
-
- /* PALL command */
- FMC_Bank5_6->SDCMR = 0x00000012;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Auto refresh command */
- FMC_Bank5_6->SDCMR = 0x00000073;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* MRD register program */
- FMC_Bank5_6->SDCMR = 0x00046014;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Set refresh count */
- tmpreg = FMC_Bank5_6->SDRTR;
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-
- /* Disable write protection */
- tmpreg = FMC_Bank5_6->SDCR[0];
- FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001011;
- FMC_Bank1->BTCR[3] = 0x00000201;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001091;
- FMC_Bank1->BTCR[3] = 0x00110212;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-
- (void)(tmp);
-}
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
-/**
- * @brief Setup the external memory controller.
- * Called in startup_stm32f4xx.s before jump to main.
- * This function configures the external memories (SRAM/SDRAM)
- * This SRAM/SDRAM will be used as program data memory (including heap and stack).
- * @param None
- * @retval None
- */
-void SystemInit_ExtMemCtl(void)
-{
- __IO uint32_t tmp = 0x00;
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
-#if defined (DATA_IN_ExtSDRAM)
- register uint32_t tmpreg = 0, timeout = 0xFFFF;
- register __IO uint32_t index;
-
-#if defined(STM32F446xx)
- /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
- clock */
- RCC->AHB1ENR |= 0x0000007D;
-#else
- /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
- clock */
- RCC->AHB1ENR |= 0x000001F8;
-#endif /* STM32F446xx */
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
-
-#if defined(STM32F446xx)
- /* Connect PAx pins to FMC Alternate function */
- GPIOA->AFR[0] |= 0xC0000000;
- GPIOA->AFR[1] |= 0x00000000;
- /* Configure PDx pins in Alternate function mode */
- GPIOA->MODER |= 0x00008000;
- /* Configure PDx pins speed to 50 MHz */
- GPIOA->OSPEEDR |= 0x00008000;
- /* Configure PDx pins Output type to push-pull */
- GPIOA->OTYPER |= 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOA->PUPDR |= 0x00000000;
-
- /* Connect PCx pins to FMC Alternate function */
- GPIOC->AFR[0] |= 0x00CC0000;
- GPIOC->AFR[1] |= 0x00000000;
- /* Configure PDx pins in Alternate function mode */
- GPIOC->MODER |= 0x00000A00;
- /* Configure PDx pins speed to 50 MHz */
- GPIOC->OSPEEDR |= 0x00000A00;
- /* Configure PDx pins Output type to push-pull */
- GPIOC->OTYPER |= 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOC->PUPDR |= 0x00000000;
-#endif /* STM32F446xx */
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x000000CC;
- GPIOD->AFR[1] = 0xCC000CCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xA02A000A;
- /* Configure PDx pins speed to 50 MHz */
- GPIOD->OSPEEDR = 0xA02A000A;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00000CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA800A;
- /* Configure PEx pins speed to 50 MHz */
- GPIOE->OSPEEDR = 0xAAAA800A;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0xCCCCCCCC;
- GPIOF->AFR[1] = 0xCCCCCCCC;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA800AAA;
- /* Configure PFx pins speed to 50 MHz */
- GPIOF->OSPEEDR = 0xAA800AAA;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0xCCCCCCCC;
- GPIOG->AFR[1] = 0xCCCCCCCC;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0xAAAAAAAA;
- /* Configure PGx pins speed to 50 MHz */
- GPIOG->OSPEEDR = 0xAAAAAAAA;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx)
- /* Connect PHx pins to FMC Alternate function */
- GPIOH->AFR[0] = 0x00C0CC00;
- GPIOH->AFR[1] = 0xCCCCCCCC;
- /* Configure PHx pins in Alternate function mode */
- GPIOH->MODER = 0xAAAA08A0;
- /* Configure PHx pins speed to 50 MHz */
- GPIOH->OSPEEDR = 0xAAAA08A0;
- /* Configure PHx pins Output type to push-pull */
- GPIOH->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PHx pins */
- GPIOH->PUPDR = 0x00000000;
-
- /* Connect PIx pins to FMC Alternate function */
- GPIOI->AFR[0] = 0xCCCCCCCC;
- GPIOI->AFR[1] = 0x00000CC0;
- /* Configure PIx pins in Alternate function mode */
- GPIOI->MODER = 0x0028AAAA;
- /* Configure PIx pins speed to 50 MHz */
- GPIOI->OSPEEDR = 0x0028AAAA;
- /* Configure PIx pins Output type to push-pull */
- GPIOI->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PIx pins */
- GPIOI->PUPDR = 0x00000000;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
-
-/*-- FMC Configuration -------------------------------------------------------*/
- /* Enable the FMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
-
- /* Configure and enable SDRAM bank1 */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCR[0] = 0x00001954;
-#else
- FMC_Bank5_6->SDCR[0] = 0x000019E4;
-#endif /* STM32F446xx */
- FMC_Bank5_6->SDTR[0] = 0x01115351;
-
- /* SDRAM initialization sequence */
- /* Clock enable command */
- FMC_Bank5_6->SDCMR = 0x00000011;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Delay */
- for (index = 0; index<1000; index++);
-
- /* PALL command */
- FMC_Bank5_6->SDCMR = 0x00000012;
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Auto refresh command */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCMR = 0x000000F3;
-#else
- FMC_Bank5_6->SDCMR = 0x00000073;
-#endif /* STM32F446xx */
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* MRD register program */
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDCMR = 0x00044014;
-#else
- FMC_Bank5_6->SDCMR = 0x00046014;
-#endif /* STM32F446xx */
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- timeout = 0xFFFF;
- while((tmpreg != 0) && (timeout-- > 0))
- {
- tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
- }
-
- /* Set refresh count */
- tmpreg = FMC_Bank5_6->SDRTR;
-#if defined(STM32F446xx)
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
-#else
- FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
-#endif /* STM32F446xx */
-
- /* Disable write protection */
- tmpreg = FMC_Bank5_6->SDCR[0];
- FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
-#endif /* DATA_IN_ExtSDRAM */
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
-
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
-
-#if defined(DATA_IN_ExtSRAM)
-/*-- GPIOs Configuration -----------------------------------------------------*/
- /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
- RCC->AHB1ENR |= 0x00000078;
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
-
- /* Connect PDx pins to FMC Alternate function */
- GPIOD->AFR[0] = 0x00CCC0CC;
- GPIOD->AFR[1] = 0xCCCCCCCC;
- /* Configure PDx pins in Alternate function mode */
- GPIOD->MODER = 0xAAAA0A8A;
- /* Configure PDx pins speed to 100 MHz */
- GPIOD->OSPEEDR = 0xFFFF0FCF;
- /* Configure PDx pins Output type to push-pull */
- GPIOD->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PDx pins */
- GPIOD->PUPDR = 0x00000000;
-
- /* Connect PEx pins to FMC Alternate function */
- GPIOE->AFR[0] = 0xC00CC0CC;
- GPIOE->AFR[1] = 0xCCCCCCCC;
- /* Configure PEx pins in Alternate function mode */
- GPIOE->MODER = 0xAAAA828A;
- /* Configure PEx pins speed to 100 MHz */
- GPIOE->OSPEEDR = 0xFFFFC3CF;
- /* Configure PEx pins Output type to push-pull */
- GPIOE->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PEx pins */
- GPIOE->PUPDR = 0x00000000;
-
- /* Connect PFx pins to FMC Alternate function */
- GPIOF->AFR[0] = 0x00CCCCCC;
- GPIOF->AFR[1] = 0xCCCC0000;
- /* Configure PFx pins in Alternate function mode */
- GPIOF->MODER = 0xAA000AAA;
- /* Configure PFx pins speed to 100 MHz */
- GPIOF->OSPEEDR = 0xFF000FFF;
- /* Configure PFx pins Output type to push-pull */
- GPIOF->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PFx pins */
- GPIOF->PUPDR = 0x00000000;
-
- /* Connect PGx pins to FMC Alternate function */
- GPIOG->AFR[0] = 0x00CCCCCC;
- GPIOG->AFR[1] = 0x000000C0;
- /* Configure PGx pins in Alternate function mode */
- GPIOG->MODER = 0x00085AAA;
- /* Configure PGx pins speed to 100 MHz */
- GPIOG->OSPEEDR = 0x000CAFFF;
- /* Configure PGx pins Output type to push-pull */
- GPIOG->OTYPER = 0x00000000;
- /* No pull-up, pull-down for PGx pins */
- GPIOG->PUPDR = 0x00000000;
-
-/*-- FMC/FSMC Configuration --------------------------------------------------*/
- /* Enable the FMC/FSMC interface clock */
- RCC->AHB3ENR |= 0x00000001;
-
-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001011;
- FMC_Bank1->BTCR[3] = 0x00000201;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
-#if defined(STM32F469xx) || defined(STM32F479xx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FMC_Bank1->BTCR[2] = 0x00001091;
- FMC_Bank1->BTCR[3] = 0x00110212;
- FMC_Bank1E->BWTR[2] = 0x0fffffff;
-#endif /* STM32F469xx || STM32F479xx */
-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
- || defined(STM32F412Zx) || defined(STM32F412Vx)
- /* Delay after an RCC peripheral clock enabling */
- tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
- /* Configure and enable Bank1_SRAM2 */
- FSMC_Bank1->BTCR[2] = 0x00001011;
- FSMC_Bank1->BTCR[3] = 0x00000201;
- FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
-
-#endif /* DATA_IN_ExtSRAM */
-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
- STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
- (void)(tmp);
-}
-#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */