[bsp][nxp]:keep imxrt1180 mini bsp#11629

8 files changed, 740 insertions, 126 deletions

diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.config b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.config
index d86bd16aed..716a1d80d1 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.config
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.config
@@ -242,14 +242,14 @@ CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_USING_SERIAL_V2=y
 # CONFIG_RT_SERIAL_BUF_STRATEGY_DROP is not set
 CONFIG_RT_SERIAL_BUF_STRATEGY_OVERWRITE=y
-CONFIG_RT_SERIAL_USING_DMA=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
 # CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_CLOCK_TIME is not set
 # CONFIG_RT_USING_I2C is not set
 # CONFIG_RT_USING_PHY is not set
 # CONFIG_RT_USING_PHY_V2 is not set
-CONFIG_RT_USING_ADC=y
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
@@ -274,7 +274,6 @@ CONFIG_RT_USING_ADC=y
 # CONFIG_RT_USING_BLK is not set
 # CONFIG_RT_USING_REGULATOR is not set
 # CONFIG_RT_USING_POWER_SUPPLY is not set
-
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_CHERRYUSB is not set
 # end of Device Drivers
@@ -1467,23 +1466,21 @@ CONFIG_SOC_MIMXRT1189CVM8C_CM33=y
 #
 # On-chip Peripheral Drivers
 #
-CONFIG_BSP_USING_DMA=y
-CONFIG_BSP_USING_LPADC=y
-CONFIG_BSP_USING_LPADC1=y
-CONFIG_BSP_LPADC1_USING_DMA=y
+# CONFIG_BSP_USING_DMA is not set
+# CONFIG_BSP_USING_LPADC is not set
 CONFIG_BSP_USING_GPIO=y
 # CONFIG_BSP_USING_RTC is not set
 # CONFIG_BSP_USING_USB is not set
 # CONFIG_BSP_USING_SDIO is not set
 CONFIG_BSP_USING_LPUART=y
 CONFIG_BSP_USING_LPUART1=y
-CONFIG_BSP_LPUART1_RX_USING_DMA=y
-CONFIG_BSP_LPUART1_RX_DMA_CHANNEL=0
-CONFIG_BSP_LPUART1_TX_USING_DMA=y
-CONFIG_BSP_LPUART1_TX_DMA_CHANNEL=1
+# CONFIG_BSP_LPUART1_RX_USING_DMA is not set
+# CONFIG_BSP_LPUART1_TX_USING_DMA is not set
 # CONFIG_BSP_USING_LPUART10 is not set
 # CONFIG_BSP_USING_LPUART12 is not set
+# CONFIG_BSP_USING_I2C is not set
 # CONFIG_BSP_USING_CAN is not set
+# CONFIG_BSP_USING_CLOCK_TIMER is not set
 # CONFIG_BSP_USING_FLEXSPI is not set
 # end of On-chip Peripheral Drivers
 
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.c b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.c
new file mode 100644
index 0000000000..2deeb7375a
--- /dev/null
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.c
@@ -0,0 +1,526 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v15.0
+processor: MIMXRT1189xxxxx
+package_id: MIMXRT1189CVM8C
+mcu_data: ksdk2_0
+processor_version: 26.03.10
+board: MIMXRT1180-EVK
+functionalGroups:
+- name: BOARD_InitPeripherals
+  UUID: e05a8704-a0aa-436e-89f3-59a6570dd2ff
+  called_from_default_init: true
+  selectedCore: cm33
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+  - global_init: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'uart_cmsis_common'
+- type_id: 'uart_cmsis_common'
+- global_USART_CMSIS_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'gpio_adapter_common'
+- type_id: 'gpio_adapter_common'
+- global_gpio_adapter_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * BOARD_InitPeripherals functional group
+ **********************************************************************************************************************/
+#ifdef BSP_LPADC1_USING_DMA
+/***********************************************************************************************************************
+ * DMA4 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'DMA4'
+- type: 'edma4'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'edma4_2.9.0'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'DMA4'
+- config_sets:
+  - fsl_edma:
+    - dmamux_devices: []
+    - common_settings:
+      - vars: []
+      - enableHaltOnError: 'true'
+      - enableDebugMode: 'false'
+      - enableRoundRobinArbitration: 'fixedPriority'
+      - enableGlobalChannelLink: 'true'
+      - enableMasterIdReplication: 'false'
+    - dma_table:
+      - 0: []
+    - edma_channels:
+      - 0:
+        - apiMode: 'trans'
+        - edma_channel:
+          - channel_prefix_id: 'CH0'
+          - uid: '1780195171347'
+          - eDMAn: '0'
+          - eDMA_source: 'kDma4RequestMuxADC1Request0'
+          - init_channel_priority: 'false'
+          - edma_channel_Preemption:
+            - enableChannelPreemption: 'false'
+            - enablePreemptAbility: 'false'
+            - channelPriority: '0'
+          - initMemoryAttributes: 'false'
+          - memAttributes:
+            - writeCache: 'buffer'
+            - readCache: 'buffer'
+          - setChannelSwapSize: 'noInit'
+          - signExtension: 'noInit'
+          - setChannelAccessType: 'noInit'
+          - masterIdReplicationEnable: 'noInit'
+          - securityLevel: 'noInit'
+          - protectionLevel: 'noInit'
+          - enable_custom_name: 'false'
+        - resetChannel: 'false'
+        - enableChannelRequest: 'true'
+        - enableAsyncRequest: 'false'
+        - enableAutoStop: 'false'
+        - tcd_pool_enable: 'false'
+        - tcd_settings:
+          - tcd_size: '1'
+          - tcd_memory_ptr_id: 'default'
+        - transfer_config:
+          - 0:
+            - uid: '1780716022754'
+            - tcdID: 'CH0_TRANSFER0'
+            - ssize: 'kEDMA_TransferSize4Bytes'
+            - saddr_expr: '&ADC1->RESFIFO[0]'
+            - saddr_def: ''
+            - soff: '0'
+            - soff_def: ''
+            - smod: 'kEDMA_ModuloDisable'
+            - dsize: 'kEDMA_TransferSize4Bytes'
+            - daddr_expr: '&adc_result[0]'
+            - daddr_def: 'AT_NONCACHEABLE_SECTION_ALIGN_INIT(extern uint32_t adc_result[], sizeof(uint32_t));'
+            - doff: 'sizeof(uint32_t)'
+            - doff_def: ''
+            - dmod: 'kEDMA_ModuloDisable'
+            - nbytes: '4'
+            - MLconfig:
+              - offsetType: 'disabled'
+              - mloff: '0'
+            - enableChannelLinkMinor: 'false'
+            - linkedChannelMinor: '1780195171347'
+            - citer: '7'
+            - slast: '0'
+            - dlast: '-28'
+            - enableChannelLinkMajor: 'false'
+            - linkedChannelMajor: '1780195171347'
+            - submitTransfer: 'true'
+        - loopTransfer: 'false'
+        - no_init_uid: '1780195171376'
+        - init_callback: 'true'
+        - callback_function: 'DMA_Callback'
+        - callback_user_data: ''
+        - channel_enabled_interrupts: ''
+        - interrupt_channel:
+          - IRQn: 'DMA4_CH0_CH1_CH32_CH33_IRQn'
+          - enable_priority: 'false'
+          - priority: '0'
+    - errInterruptConfig:
+      - enableErrInterrupt: 'false'
+      - errorInterrupt:
+        - IRQn: 'DMA4_ERROR_IRQn'
+        - enable_interrrupt: 'enabled'
+        - enable_priority: 'false'
+        - priority: '0'
+        - enable_custom_name: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+edma_config_t DMA4_config = {
+    .enableMasterIdReplication = false,
+    .enableGlobalChannelLink = true,
+    .enableHaltOnError = true,
+    .enableDebugMode = false,
+    .enableRoundRobinArbitration = false
+};
+/* Tansactional transfer configurations */
+edma_transfer_config_t DMA4_CH0_Transfers_config[1];
+edma_handle_t DMA4_CH0_Handle;
+
+static void DMA4_init(void)
+{
+    status_t status;
+    (void)status;
+
+  /* Channel CH0 initialization */
+  /* Set the kDma4RequestMuxADC1Request0 request */
+    EDMA_SetChannelMux(DMA4_DMA_BASEADDR, DMA4_CH0_DMA_CHANNEL, DMA4_CH0_DMA_REQUEST);
+  /* Create the eDMA DMA4_CH0_Handle handle */
+    EDMA_CreateHandle(&DMA4_CH0_Handle, DMA4_DMA_BASEADDR, DMA4_CH0_DMA_CHANNEL);
+  /* DMA callback initialization */
+    EDMA_SetCallback(&DMA4_CH0_Handle, DMA_Callback, NULL);
+  /* DMA4 transfer CH0_TRANSFER0 configuration */
+    EDMA_PrepareTransferConfig(&DMA4_CH0_TRANSFER0_CONFIG, (void *)&ADC1->RESFIFO[0], 1 << kEDMA_TransferSize4Bytes, 0, (void *)&adc_result[0], 1 << kEDMA_TransferSize4Bytes, sizeof(uint32_t), 4U, 28U);
+    DMA4_CH0_TRANSFER0_CONFIG.dstMajorLoopOffset = -28;
+  /* DMA4 transfer CH0_TRANSFER0 submit */
+    status = EDMA_SubmitTransfer(&DMA4_CH0_Handle, &DMA4_CH0_TRANSFER0_CONFIG);
+    assert(status == kStatus_Success);
+  /* DMA4 hardware channel 0 request auto stop */
+    EDMA_EnableAutoStopRequest(DMA4_DMA_BASEADDR, DMA4_CH0_DMA_CHANNEL, false);
+  /* DMA4 channel 0 peripheral request */
+    EDMA_EnableChannelRequest(DMA4_DMA_BASEADDR, DMA4_CH0_DMA_CHANNEL);
+}
+#endif
+/***********************************************************************************************************************
+ * CM33_NVIC initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'CM33_NVIC'
+- type: 'nvic'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'nvic'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'CM33_NVIC'
+- config_sets:
+  - nvic:
+    - interrupt_table:
+      - 0: []
+    - interrupts: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void CM33_NVIC_init(void)
+{
+} */
+
+/***********************************************************************************************************************
+ * LPUART1 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'LPUART1'
+- type: 'lpuart'
+- mode: 'polling'
+- custom_name_enabled: 'false'
+- type_id: 'lpuart_2.11.0'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'LPUART1'
+- config_sets:
+  - lpuartConfig_t:
+    - lpuartConfig:
+      - clockSource: 'LpuartClock'
+      - lpuartSrcClkFreq: 'ClocksTool_DefaultInit'
+      - baudRate_Bps: '115200'
+      - parityMode: 'kLPUART_ParityDisabled'
+      - dataBitsCount: 'kLPUART_EightDataBits'
+      - isMsb: 'false'
+      - stopBitCount: 'kLPUART_OneStopBit'
+      - enableMatchAddress1: 'false'
+      - matchAddress1: '0'
+      - enableMatchAddress2: 'false'
+      - matchAddress2: '0'
+      - txFifoWatermark: '0'
+      - rxFifoWatermark: '1'
+      - enableRxRTS: 'false'
+      - enableTxRTS: 'false'
+      - enableTxCTS: 'false'
+      - txCtsSource: 'kLPUART_CtsSourcePin'
+      - txCtsConfig: 'kLPUART_CtsSampleAtStart'
+      - txRtsPolarity: 'kLPUART_RtsPolarityLow'
+      - rtsWatermark: '0'
+      - rxIdleType: 'kLPUART_IdleTypeStartBit'
+      - rxIdleConfig: 'kLPUART_IdleCharacter1'
+      - enableTx: 'true'
+      - enableRx: 'true'
+      - inverseTxd: 'false'
+    - quick_selection: 'QuickSelection1'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const lpuart_config_t LPUART1_config = {
+    .baudRate_Bps = 115200UL,
+    .parityMode = kLPUART_ParityDisabled,
+    .dataBitsCount = kLPUART_EightDataBits,
+    .isMsb = false,
+    .stopBitCount = kLPUART_OneStopBit,
+    .txFifoWatermark = 0U,
+    .rxFifoWatermark = 1U,
+    .enableRxRTS = false,
+    .enableTxRTS = false,
+    .enableTxCTS = false,
+    .txCtsSource = kLPUART_CtsSourcePin,
+    .txCtsConfig = kLPUART_CtsSampleAtStart,
+    .txRtsPolarity = kLPUART_RtsPolarityLow,
+    .rtsWatermark = 0U,
+    .rxIdleType = kLPUART_IdleTypeStartBit,
+    .rxIdleConfig = kLPUART_IdleCharacter1,
+    .enableTx = true,
+    .enableRx = true,
+    .inverseTxd = false
+};
+
+static void LPUART1_init(void)
+{
+    LPUART_Init(LPUART1_PERIPHERAL, &LPUART1_config, LPUART1_CLOCK_SOURCE);
+}
+
+/***********************************************************************************************************************
+ * RGPIO4 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'RGPIO4'
+- type: 'rgpio'
+- mode: 'GPIO'
+- custom_name_enabled: 'false'
+- type_id: 'rgpio_2.1.0'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'RGPIO4'
+- config_sets:
+  - fsl_gpio:
+    - interrupts:
+      - 0:
+        - enable_irq: 'false'
+        - gpio_interrupt:
+          - IRQn: 'GPIO4_IRQn'
+          - enable_interrrupt: 'enabled'
+          - enable_priority: 'false'
+          - priority: '0'
+          - enable_custom_name: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void RGPIO4_init(void)
+{
+} */
+
+#ifdef BSP_USING_LPADC
+/***********************************************************************************************************************
+ * ADC1 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'ADC1'
+- type: 'lpadc'
+- mode: 'LPADC'
+- custom_name_enabled: 'false'
+- type_id: 'lpadc_2.8.1'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'ADC1'
+- config_sets:
+  - fsl_lpadc:
+    - lpadcConfig:
+      - clockSource: 'AsynchronousFunctionClock'
+      - clockSourceFreq: 'ClocksTool_DefaultInit'
+      - enableJustifiedLeft: 'false'
+      - enableInDozeMode: 'true'
+      - conversionAverageMode: 'kLPADC_ConversionAverage2'
+      - offsetCalibration: 'yes'
+      - autoCalibrate: 'true'
+      - enableAnalogPreliminary: 'false'
+      - powerUpDelay: '0x80'
+      - referenceVoltageSource: 'kLPADC_ReferenceVoltageAlt2'
+      - triggerPriorityPolicy: 'kLPADC_ConvPreemptImmediatelyNotAutoResumed'
+      - enableConvPause: 'false'
+      - convPauseDelay: '0'
+      - FIFO0Watermark: '0'
+      - FIFO1Watermark: '0'
+      - FIFO0WatermarkDMA: 'true'
+      - FIFO1WatermarkDMA: 'false'
+    - lpadcConvCommandConfig:
+      - 0:
+        - user_commandId: 'GRPA'
+        - commandId: '1'
+        - chainedNextCommandNumber: '2'
+        - sampleChannelMode: 'kLPADC_SampleChannelSingleEndSideA'
+        - sampleScaleMode: 'kLPADC_SampleFullScale'
+        - channelNumber: 'A.1_4'
+        - enableChannelB_b: 'false'
+        - channelBScaleMode_e: 'kLPADC_SampleFullScale'
+        - channelBNumber: 'B.1_0'
+        - enableAutoChannelIncrement: 'true'
+        - loopCount: '3'
+        - hardwareAverageMode: 'kLPADC_HardwareAverageCount1'
+        - sampleTimeMode: 'kLPADC_SampleTimeADCK3'
+        - hardwareCompareMode: 'kLPADC_HardwareCompareDisabled'
+        - hardwareCompareValueHigh: '0'
+        - hardwareCompareValueLow: '0'
+        - conversionResoultuionMode: 'kLPADC_ConversionResolutionHigh'
+        - enableWaitTrigger: 'true'
+      - 1:
+        - user_commandId: 'GRPB'
+        - commandId: '2'
+        - chainedNextCommandNumber: '0'
+        - sampleChannelMode: 'kLPADC_SampleChannelSingleEndSideB'
+        - sampleScaleMode: 'kLPADC_SampleFullScale'
+        - channelNumber: 'B.1_5'
+        - enableChannelB_b: 'false'
+        - channelBScaleMode_e: 'kLPADC_SampleFullScale'
+        - channelBNumber: 'B.1_0'
+        - enableAutoChannelIncrement: 'true'
+        - loopCount: '2'
+        - hardwareAverageMode: 'kLPADC_HardwareAverageCount1'
+        - sampleTimeMode: 'kLPADC_SampleTimeADCK3'
+        - hardwareCompareMode: 'kLPADC_HardwareCompareDisabled'
+        - hardwareCompareValueHigh: '0'
+        - hardwareCompareValueLow: '0'
+        - conversionResoultuionMode: 'kLPADC_ConversionResolutionHigh'
+        - enableWaitTrigger: 'false'
+    - lpadcConvTriggerConfig:
+      - 0:
+        - user_triggerId: 'TRIG'
+        - triggerId: '0'
+        - targetCommandId: '1'
+        - delayPower: '0'
+        - priority: 'false'
+        - channelAFIFOSelect: '0'
+        - channelBFIFOSelect: '0'
+        - enableHardwareTrigger: 'false'
+    - IRQ_cfg:
+      - interrupt_type: ''
+      - enable_irq: 'false'
+      - adc_interrupt:
+        - IRQn: 'ADC1_IRQn'
+        - enable_interrrupt: 'enabled'
+        - enable_priority: 'false'
+        - priority: '0'
+        - enable_custom_name: 'true'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const lpadc_config_t ADC1_config = {
+    .enableInDozeMode = true,
+    .conversionAverageMode = kLPADC_ConversionAverage2,
+    .enableAnalogPreliminary = false,
+    .powerUpDelay = 0x80UL,
+    .referenceVoltageSource = kLPADC_ReferenceVoltageAlt2,
+    .triggerPriorityPolicy = kLPADC_ConvPreemptImmediatelyNotAutoResumed,
+    .enableConvPause = false,
+    .convPauseDelay = 0UL,
+    .FIFO0Watermark = 0UL,
+    .FIFO1Watermark = 0UL
+};
+lpadc_conv_command_config_t ADC1_commandsConfig[2] = {
+    { .sampleScaleMode = kLPADC_SampleFullScale,
+      .channelBScaleMode = kLPADC_SampleFullScale,
+      .sampleChannelMode = kLPADC_SampleChannelSingleEndSideA,
+      .channelNumber = 4U,
+      .channelBNumber = 0U,
+      .chainedNextCommandNumber = 2,
+      .enableChannelB = false,
+      .enableAutoChannelIncrement = true,
+      .loopCount = 3UL,
+      .hardwareAverageMode = kLPADC_HardwareAverageCount1,
+      .sampleTimeMode = kLPADC_SampleTimeADCK3,
+      .hardwareCompareMode = kLPADC_HardwareCompareDisabled,
+      .hardwareCompareValueHigh = 0UL,
+      .hardwareCompareValueLow = 0UL,
+      .conversionResolutionMode = kLPADC_ConversionResolutionHigh,
+      .enableWaitTrigger = true },
+    { .sampleScaleMode = kLPADC_SampleFullScale,
+      .channelBScaleMode = kLPADC_SampleFullScale,
+      .sampleChannelMode = kLPADC_SampleChannelSingleEndSideB,
+      .channelNumber = 5U,
+      .channelBNumber = 0U,
+      .chainedNextCommandNumber = 0,
+      .enableChannelB = false,
+      .enableAutoChannelIncrement = true,
+      .loopCount = 2UL,
+      .hardwareAverageMode = kLPADC_HardwareAverageCount1,
+      .sampleTimeMode = kLPADC_SampleTimeADCK3,
+      .hardwareCompareMode = kLPADC_HardwareCompareDisabled,
+      .hardwareCompareValueHigh = 0UL,
+      .hardwareCompareValueLow = 0UL,
+      .conversionResolutionMode = kLPADC_ConversionResolutionHigh,
+      .enableWaitTrigger = false }
+};
+lpadc_conv_trigger_config_t ADC1_triggersConfig[1] = {
+    { .targetCommandId = 1,
+      .delayPower = 0UL,
+      .channelAFIFOSelect = 0,
+      .channelBFIFOSelect = 0,
+      .priority = 1,
+      .enableHardwareTrigger = false }
+};
+
+static void ADC1_init(void)
+{
+  /* Initialize LPADC converter */
+    LPADC_Init(ADC1_PERIPHERAL, &ADC1_config);
+  /* Perform offset calibration */
+    LPADC_DoOffsetCalibration(ADC1_PERIPHERAL);
+  /* Perform auto calibration */
+    LPADC_DoAutoCalibration(ADC1_PERIPHERAL);
+  /* Enable DMA request on FIFO 0 watermark event */
+    LPADC_EnableFIFO0WatermarkDMA(ADC1_PERIPHERAL, true);
+  /* Configure conversion command 1. */
+    LPADC_SetConvCommandConfig(ADC1_PERIPHERAL, ADC1_GRPA, &ADC1_commandsConfig[0]);
+  /* Configure conversion command 2. */
+    LPADC_SetConvCommandConfig(ADC1_PERIPHERAL, ADC1_GRPB, &ADC1_commandsConfig[1]);
+  /* Configure trigger 0. */
+    LPADC_SetConvTriggerConfig(ADC1_PERIPHERAL, ADC1_TRIG, &ADC1_triggersConfig[0]);
+}
+#endif
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals(void)
+{
+#ifdef BSP_USING_LPADC
+    ADC1_init();
+#ifdef BSP_LPADC1_USING_DMA
+    /* Global initialization */
+    (void)memset(DMA4_config.channelConfig, 0, FSL_FEATURE_EDMA_INSTANCE_CHANNELn(DMA4_DMA_BASEADDR) * sizeof(edma_channel_config_t *));
+    EDMA_Init(DMA4_DMA_BASEADDR, &DMA4_config);
+    /* Initialize components */
+    DMA4_init();
+#endif
+#endif
+    LPUART1_init();
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+    BOARD_InitPeripherals();
+}
+
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.h b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.h
new file mode 100644
index 0000000000..93689888d5
--- /dev/null
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/peripherals.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "fsl_edma.h"
+#include <stdlib.h>
+#include "fsl_memory.h"
+#include "fsl_common.h"
+#include "fsl_lpuart.h"
+#include "fsl_clock.h"
+#include "fsl_rgpio.h"
+#include "fsl_lpadc.h"
+#include "rtconfig.h"
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+/* Definitions for BOARD_InitPeripherals functional group */
+/* Used DMA device. */
+#define DMA4_DMA_BASEADDR (EDMA_Type *)DMA4
+
+  /* Channel CH0 definitions */
+/* DMA4 eDMA source request. */
+#define DMA4_CH0_DMA_REQUEST kDma4RequestMuxADC1Request0
+/* Selected eDMA channel number. */
+#define DMA4_CH0_DMA_CHANNEL 0
+/* TCD pool size */
+#define DMA4_CH0_TCD_SIZE 1
+/* DMA4 interrupt vector ID (number). */
+#define DMA4_DMA_CH_INT_DONE_0_IRQN DMA4_CH0_CH1_CH32_CH33_IRQn
+/* Transfer structure index 0 definition */
+#define DMA4_CH0_TRANSFER0_CONFIG DMA4_CH0_Transfers_config[0]
+/* Definition of peripheral ID */
+#define LPUART1_PERIPHERAL LPUART1
+/* Definition of the clock source frequency */
+#define LPUART1_CLOCK_SOURCE 24000000UL
+/* Alias for ADC1 peripheral */
+#define ADC1_PERIPHERAL ADC1
+/* Command 1 - GRPA */
+#define ADC1_GRPA 1U
+/* Command 2 - GRPB */
+#define ADC1_GRPB 2U
+/* Trigger 0 - TRIG */
+#define ADC1_TRIG 0U
+
+/***********************************************************************************************************************
+ * Global variables
+ **********************************************************************************************************************/
+#ifdef BSP_LPADC1_USING_DMA
+extern edma_config_t DMA4_config;
+/* Destination address extern definition */
+extern AT_NONCACHEABLE_SECTION_ALIGN_INIT(uint32_t adc_result[], sizeof(uint32_t));
+extern edma_handle_t DMA4_CH0_Handle;
+/* Transactional transfer configurations */
+extern edma_transfer_config_t DMA4_CH0_Transfers_config[1];
+#endif
+extern const lpuart_config_t LPUART1_config;
+extern const lpadc_config_t ADC1_config;
+extern lpadc_conv_command_config_t ADC1_commandsConfig[2];
+extern lpadc_conv_trigger_config_t ADC1_triggersConfig[1];
+#ifdef BSP_LPADC1_USING_DMA
+/***********************************************************************************************************************
+ * Callback functions
+ **********************************************************************************************************************/
+/* eDMA callback function for the 0 channel.*/
+extern void DMA_Callback(edma_handle_t *, void *, bool, uint32_t);
+#endif
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+
+void BOARD_InitPeripherals(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _PERIPHERALS_H_ */
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/pin_mux.c b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/pin_mux.c
index ccaa04f2bb..4e483fad36 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/pin_mux.c
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config/pin_mux.c
@@ -31,7 +31,8 @@ processor_version: 0.15.9
  * Description   : Calls initialization functions.
  *
  * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void) {
+void BOARD_InitBootPins(void)
+{
     BOARD_InitPins();
 }
 
@@ -53,90 +54,93 @@ BOARD_InitPins:
  * Description   : Configures pin routing and optionally pin electrical features.
  *
  * END ****************************************************************************************************************/
-void BOARD_InitPins(void) {
-  CLOCK_EnableClock(kCLOCK_Iomuxc1);          /* Turn on LPCG: LPCG is ON. */
-  CLOCK_EnableClock(kCLOCK_Iomuxc2);          /* Turn on LPCG: LPCG is ON. */
+void BOARD_InitPins(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc1);          /* Turn on LPCG: LPCG is ON. */
+    CLOCK_EnableClock(kCLOCK_Iomuxc2);          /* Turn on LPCG: LPCG is ON. */
 
-  IOMUXC_SetPinMux(
-      IOMUXC_GPIO_AON_08_LPUART1_TX,
-      0U);
-  IOMUXC_SetPinMux(
-      IOMUXC_GPIO_AON_09_LPUART1_RX,
-      0U);
-  IOMUXC_SetPinConfig(
-      IOMUXC_GPIO_AON_08_LPUART1_TX,
-      0x02U);
-  IOMUXC_SetPinConfig(
-      IOMUXC_GPIO_AON_09_LPUART1_RX,
-      0x02U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_08_LPUART1_TX,
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_09_LPUART1_RX,
+        0U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_08_LPUART1_TX,
+        0x02U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_09_LPUART1_RX,
+        0x02U);
 
-  IOMUXC_SetPinMux(
-      IOMUXC_GPIO_AD_32_LPUART10_TX,
-      0U);
-  IOMUXC_SetPinMux(
-      IOMUXC_GPIO_AD_33_LPUART10_RX,
-      0U);
-  IOMUXC_SetPinConfig(
-      IOMUXC_GPIO_AD_32_LPUART10_TX,
-      0x02U);
-      IOMUXC_GPIO_AD_33_LPUART10_RX,
-      0x02U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_32_LPUART10_TX,
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_33_LPUART10_RX,
+        0U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_32_LPUART10_TX,
+        0x02U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_33_LPUART10_RX,
+        0x02U);
 
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AON_19_LPUART12_TX,
-          0U);
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AON_20_LPUART12_RX,
-          0U);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AON_19_LPUART12_TX,
-          0x02U);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AON_20_LPUART12_RX,
-          0x02U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_19_LPUART12_TX,
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_20_LPUART12_RX,
+        0U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_19_LPUART12_TX,
+        0x02U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_20_LPUART12_RX,
+        0x02U);
 
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AON_16_LPI2C2_SCL,
-          1U);
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AON_15_LPI2C2_SDA,
-          1U);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AON_16_LPI2C2_SCL,
-          0x1DU);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AON_15_LPI2C2_SDA,
-          0x1DU);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_16_LPI2C2_SCL,
+        1U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AON_15_LPI2C2_SDA,
+        1U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_16_LPI2C2_SCL,
+        0x1DU);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AON_15_LPI2C2_SDA,
+        0x1DU);
 
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AD_18_LPI2C3_SCL,
-          0U);
-      IOMUXC_SetPinMux(
-          IOMUXC_GPIO_AD_19_LPI2C3_SDA,
-          0U);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AD_18_LPI2C3_SCL,
-          0x1DU);
-      IOMUXC_SetPinConfig(
-          IOMUXC_GPIO_AD_19_LPI2C3_SDA,
-          0x1DU);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_18_LPI2C3_SCL,
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_19_LPI2C3_SDA,
+        0U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_18_LPI2C3_SCL,
+        0x1DU);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_19_LPI2C3_SDA,
+        0x1DU);
 }
 
-void BOARD_InitLeds(void) {
-  CLOCK_EnableClock(kCLOCK_Iomuxc1);          /* Turn on LPCG: LPCG is ON. */
-  CLOCK_EnableClock(kCLOCK_Iomuxc2);          /* Turn on LPCG: LPCG is ON. */
+void BOARD_InitLeds(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iomuxc1);          /* Turn on LPCG: LPCG is ON. */
+    CLOCK_EnableClock(kCLOCK_Iomuxc2);          /* Turn on LPCG: LPCG is ON. */
 
   /* GPIO configuration on GPIO_AD_27 (pin M16) */
-  rgpio_pin_config_t gpio4_pinM16_config = {
-      .pinDirection = kRGPIO_DigitalOutput,
-      .outputLogic = 1U,
-  };
+    rgpio_pin_config_t gpio4_pinM16_config = {
+        .pinDirection = kRGPIO_DigitalOutput,
+        .outputLogic = 1U,
+    };
   /* Initialize GPIO functionality on GPIO_AD_27 (pin M16) */
-  RGPIO_PinInit(RGPIO4, 27U, &gpio4_pinM16_config);
+    RGPIO_PinInit(RGPIO4, 27U, &gpio4_pinM16_config);
 
-  IOMUXC_SetPinMux(
-      IOMUXC_GPIO_AD_27_GPIO4_IO27,           /* GPIO_AD_27 is configured as GPIO4_IO27 */
-      0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_27_GPIO4_IO27,           /* GPIO_AD_27 is configured as GPIO4_IO27 */
+        0U);
 }
 
 
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/SConscript b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/SConscript
index 09cc252053..55443c4c38 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/SConscript
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/SConscript
@@ -19,6 +19,7 @@ else:
     board.c
     MCUX_Config/clock_config.c
     MCUX_Config/pin_mux.c
+    MCUX_Config/peripherals.c
     """)
 
 if GetDepend(['BSP_USING_QSPI_FLASH_FS']):
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/rtconfig.h b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/rtconfig.h
index baecd2a65b..c09fa5d163 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/rtconfig.h
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/rtconfig.h
@@ -61,12 +61,12 @@
 
 /* end of rt_strnlen options */
 /* end of klibc options */
-#define RT_NAME_MAX 12
-#define RT_CPUS_NR 1
+#define RT_NAME_MAX   12
+#define RT_CPUS_NR    1
 #define RT_ALIGN_SIZE 8
 #define RT_THREAD_PRIORITY_32
 #define RT_THREAD_PRIORITY_MAX 32
-#define RT_TICK_PER_SECOND 100
+#define RT_TICK_PER_SECOND     100
 #define RT_USING_OVERFLOW_CHECK
 #define RT_USING_HOOK
 #define RT_HOOK_USING_FUNC_PTR
@@ -101,10 +101,10 @@
 /* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLEBUF_SIZE     128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_USING_CONSOLE_OUTPUT_CTL
-#define RT_VER_NUM 0x50300
+#define RT_VER_NUM                0x50300
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 #define RT_USING_HW_ATOMIC
@@ -122,12 +122,12 @@
 #define RT_USING_COMPONENTS_INIT
 #define RT_USING_USER_MAIN
 #define RT_MAIN_THREAD_STACK_SIZE 4096
-#define RT_MAIN_THREAD_PRIORITY 10
+#define RT_MAIN_THREAD_PRIORITY   10
 #define RT_USING_MSH
 #define RT_USING_FINSH
 #define FINSH_USING_MSH
-#define FINSH_THREAD_NAME "tshell"
-#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_NAME       "tshell"
+#define FINSH_THREAD_PRIORITY   20
 #define FINSH_THREAD_STACK_SIZE 4096
 #define FINSH_USING_HISTORY
 #define FINSH_HISTORY_LINES 5
@@ -149,8 +149,6 @@
 #define RT_USING_SERIAL
 #define RT_USING_SERIAL_V2
 #define RT_SERIAL_BUF_STRATEGY_OVERWRITE
-#define RT_SERIAL_USING_DMA
-#define RT_USING_ADC
 #define RT_USING_PIN
 /* end of Device Drivers */
 
@@ -162,8 +160,8 @@
 
 #define RT_LIBC_USING_LIGHT_TZ_DST
 #define RT_LIBC_TZ_DEFAULT_HOUR 8
-#define RT_LIBC_TZ_DEFAULT_MIN 0
-#define RT_LIBC_TZ_DEFAULT_SEC 0
+#define RT_LIBC_TZ_DEFAULT_MIN  0
+#define RT_LIBC_TZ_DEFAULT_SEC  0
 /* end of Timezone and Daylight Saving Time */
 /* end of ISO-ANSI C layer */
 
@@ -428,17 +426,9 @@
 
 /* On-chip Peripheral Drivers */
 
-#define BSP_USING_DMA
-#define BSP_USING_LPADC
-#define BSP_USING_LPADC1
-#define BSP_LPADC1_USING_DMA
 #define BSP_USING_GPIO
 #define BSP_USING_LPUART
 #define BSP_USING_LPUART1
-#define BSP_LPUART1_RX_USING_DMA
-#define BSP_LPUART1_RX_DMA_CHANNEL 0
-#define BSP_LPUART1_TX_USING_DMA
-#define BSP_LPUART1_TX_DMA_CHANNEL 1
 /* end of On-chip Peripheral Drivers */
 
 /* Onboard Peripheral Drivers */
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.config b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.config
index c78e44a8db..628682e781 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.config
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.config
@@ -244,11 +244,11 @@ CONFIG_RT_USING_SERIAL_V1=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_CLOCK_TIME is not set
 # CONFIG_RT_USING_I2C is not set
 # CONFIG_RT_USING_PHY is not set
 # CONFIG_RT_USING_PHY_V2 is not set
-# CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
@@ -1467,8 +1467,8 @@ CONFIG_SOC_MIMXRT1189CVM8C_CM7=y
 #
 # On-chip Peripheral Drivers
 #
-CONFIG_BSP_USING_DMA=y
-# CONFIG_BSP_USING_GPIO is not set
+# CONFIG_BSP_USING_DMA is not set
+CONFIG_BSP_USING_GPIO=y
 # CONFIG_BSP_USING_RTC is not set
 # CONFIG_BSP_USING_USB is not set
 # CONFIG_BSP_USING_SDIO is not set
@@ -1477,16 +1477,15 @@ CONFIG_BSP_USING_LPUART1=y
 # CONFIG_BSP_LPUART1_RX_USING_DMA is not set
 # CONFIG_BSP_LPUART1_TX_USING_DMA is not set
 # CONFIG_BSP_USING_LPUART3 is not set
+# CONFIG_BSP_USING_I2C is not set
 # CONFIG_BSP_USING_CAN is not set
-CONFIG_BSP_USING_FLEXSPI=y
-CONFIG_BSP_USING_FLEXSPI1=y
-# CONFIG_BSP_USING_FLEXSPI2 is not set
+# CONFIG_BSP_USING_FLEXSPI is not set
+# CONFIG_BSP_USING_CLOCK_TIMER is not set
 # end of On-chip Peripheral Drivers
 
 #
 # Onboard Peripheral Drivers
 #
-CONFIG_BSP_USING_OSPI_FLASH=y
 # CONFIG_BSP_USING_SDRAM is not set
 # CONFIG_BSP_USING_ETH is not set
 # CONFIG_BSP_USING_FS is not set
diff --git a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/rtconfig.h b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/rtconfig.h
index 84a578d54f..17bd2f87ac 100644
--- a/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/rtconfig.h
+++ b/bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/rtconfig.h
@@ -61,12 +61,12 @@
 
 /* end of rt_strnlen options */
 /* end of klibc options */
-#define RT_NAME_MAX 12
-#define RT_CPUS_NR 1
+#define RT_NAME_MAX   12
+#define RT_CPUS_NR    1
 #define RT_ALIGN_SIZE 8
 #define RT_THREAD_PRIORITY_32
 #define RT_THREAD_PRIORITY_MAX 32
-#define RT_TICK_PER_SECOND 1000
+#define RT_TICK_PER_SECOND     1000
 #define RT_USING_OVERFLOW_CHECK
 #define RT_USING_HOOK
 #define RT_HOOK_USING_FUNC_PTR
@@ -100,10 +100,10 @@
 /* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLEBUF_SIZE     128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
 #define RT_USING_CONSOLE_OUTPUT_CTL
-#define RT_VER_NUM 0x50300
+#define RT_VER_NUM                0x50300
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 #define RT_USING_CACHE
@@ -121,12 +121,12 @@
 #define RT_USING_COMPONENTS_INIT
 #define RT_USING_USER_MAIN
 #define RT_MAIN_THREAD_STACK_SIZE 4096
-#define RT_MAIN_THREAD_PRIORITY 10
+#define RT_MAIN_THREAD_PRIORITY   10
 #define RT_USING_MSH
 #define RT_USING_FINSH
 #define FINSH_USING_MSH
-#define FINSH_THREAD_NAME "tshell"
-#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_NAME       "tshell"
+#define FINSH_THREAD_PRIORITY   20
 #define FINSH_THREAD_STACK_SIZE 4096
 #define FINSH_USING_HISTORY
 #define FINSH_HISTORY_LINES 5
@@ -159,8 +159,8 @@
 
 #define RT_LIBC_USING_LIGHT_TZ_DST
 #define RT_LIBC_TZ_DEFAULT_HOUR 8
-#define RT_LIBC_TZ_DEFAULT_MIN 0
-#define RT_LIBC_TZ_DEFAULT_SEC 0
+#define RT_LIBC_TZ_DEFAULT_MIN  0
+#define RT_LIBC_TZ_DEFAULT_SEC  0
 /* end of Timezone and Daylight Saving Time */
 /* end of ISO-ANSI C layer */
 
@@ -425,16 +425,13 @@
 
 /* On-chip Peripheral Drivers */
 
-#define BSP_USING_DMA
+#define BSP_USING_GPIO
 #define BSP_USING_LPUART
 #define BSP_USING_LPUART1
-#define BSP_USING_FLEXSPI
-#define BSP_USING_FLEXSPI1
 /* end of On-chip Peripheral Drivers */
 
 /* Onboard Peripheral Drivers */
 
-#define BSP_USING_OSPI_FLASH
 /* end of Onboard Peripheral Drivers */
 
 /* Board extended module Drivers */