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authorfanhuanji <[email protected]>2021-12-08 22:33:23 +0800
committerfanhuanji <[email protected]>2021-12-08 22:33:23 +0800
commit2d6791d59234966a1d2c311eaae458c5657cb6ff (patch)
tree64f048afaeb1564a4e0de9c6e26c3060558b55b3
parentfd9eea2f7ff88862d61687e0376ad8b884693db9 (diff)
BugFix: Raspi3 GPIO driver write bug
-rw-r--r--bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c2
-rw-r--r--bsp/raspberry-pi/raspi3-32/driver/raspi.h24
-rw-r--r--bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c2
-rw-r--r--bsp/raspberry-pi/raspi3-64/driver/raspi.h24
4 files changed, 26 insertions, 26 deletions
diff --git a/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c b/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
index 721643f515..95f266905e 100644
--- a/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
+++ b/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c
@@ -137,7 +137,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu
if (value)
BCM283X_GPIO_GPSET(pin / 32) |= (1 << (pin %32));
else
- BCM283X_GPIO_GPCLR(pin / 32) |= (0 << (pin %32));
+ BCM283X_GPIO_GPCLR(pin / 32) |= (1 << (pin %32));
}
diff --git a/bsp/raspberry-pi/raspi3-32/driver/raspi.h b/bsp/raspberry-pi/raspi3-32/driver/raspi.h
index fedf4bcff8..367aa707a9 100644
--- a/bsp/raspberry-pi/raspi3-32/driver/raspi.h
+++ b/bsp/raspberry-pi/raspi3-32/driver/raspi.h
@@ -172,19 +172,19 @@ typedef enum
/* Defines for GPIO */
#define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET)
-#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * n) /* GPIO Function Select 32bit R/W */
-#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * n) /* GPIO Pin Output Set */
-#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * n) /* GPIO Pin Output Clear */
-#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * n) /* GPIO Pin Level */
-#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * n) /* GPIO Pin Event Detect Status */
-#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * n) /* GPIO Pin Rising Edge Detect Enable */
-#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * n) /* GPIO Pin Falling Edge Detect Enable */
-#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * n) /* GPIO Pin High Detect Enable */
-#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * n) /* GPIO Pin Low Detect Enable */
-#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * n) /* GPIO Pin Async. Rising Edge Detect */
-#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * n) /* GPIO Pin Async. Falling Edge Detect */
+#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * (n)) /* GPIO Function Select 32bit R/W */
+#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * (n)) /* GPIO Pin Output Set */
+#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * (n)) /* GPIO Pin Output Clear */
+#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * (n)) /* GPIO Pin Level */
+#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * (n)) /* GPIO Pin Event Detect Status */
+#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * (n)) /* GPIO Pin Rising Edge Detect Enable */
+#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * (n)) /* GPIO Pin Falling Edge Detect Enable */
+#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * (n)) /* GPIO Pin High Detect Enable */
+#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * (n)) /* GPIO Pin Low Detect Enable */
+#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * (n)) /* GPIO Pin Async. Rising Edge Detect */
+#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * (n)) /* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPPUD HWREG32(BCM283X_GPIO_BASE + 0x0094) /* GPIO Pin Pull-up/down Enable */
-#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * n) /* GPIO Pin Pull-up/down Enable Clock */
+#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * (n)) /* GPIO Pin Pull-up/down Enable Clock */
#define GPIO_FSEL_NUM(pin) (pin/10)
#define GPIO_FSEL_SHIFT(pin) ((pin%10)*3)
diff --git a/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c b/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
index 04b5cdf162..1cf70ece24 100644
--- a/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
+++ b/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c
@@ -138,7 +138,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu
if (value)
BCM283X_GPIO_GPSET(pin / 32) |= (1 << (pin %32));
else
- BCM283X_GPIO_GPCLR(pin / 32) |= (0 << (pin %32));
+ BCM283X_GPIO_GPCLR(pin / 32) |= (1 << (pin %32));
}
diff --git a/bsp/raspberry-pi/raspi3-64/driver/raspi.h b/bsp/raspberry-pi/raspi3-64/driver/raspi.h
index 8e77f1f701..3a95e5ecbd 100644
--- a/bsp/raspberry-pi/raspi3-64/driver/raspi.h
+++ b/bsp/raspberry-pi/raspi3-64/driver/raspi.h
@@ -176,19 +176,19 @@ typedef enum
/* Defines for GPIO */
#define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET)
-#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * n) /* GPIO Function Select 32bit R/W */
-#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * n) /* GPIO Pin Output Set */
-#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * n) /* GPIO Pin Output Clear */
-#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * n) /* GPIO Pin Level */
-#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * n) /* GPIO Pin Event Detect Status */
-#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * n) /* GPIO Pin Rising Edge Detect Enable */
-#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * n) /* GPIO Pin Falling Edge Detect Enable */
-#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * n) /* GPIO Pin High Detect Enable */
-#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * n) /* GPIO Pin Low Detect Enable */
-#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * n) /* GPIO Pin Async. Rising Edge Detect */
-#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * n) /* GPIO Pin Async. Falling Edge Detect */
+#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * (n)) /* GPIO Function Select 32bit R/W */
+#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * (n)) /* GPIO Pin Output Set */
+#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * (n)) /* GPIO Pin Output Clear */
+#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * (n)) /* GPIO Pin Level */
+#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * (n)) /* GPIO Pin Event Detect Status */
+#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * (n)) /* GPIO Pin Rising Edge Detect Enable */
+#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * (n)) /* GPIO Pin Falling Edge Detect Enable */
+#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * (n)) /* GPIO Pin High Detect Enable */
+#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * (n)) /* GPIO Pin Low Detect Enable */
+#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * (n)) /* GPIO Pin Async. Rising Edge Detect */
+#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * (n)) /* GPIO Pin Async. Falling Edge Detect */
#define BCM283X_GPIO_GPPUD __REG32(BCM283X_GPIO_BASE + 0x0094) /* GPIO Pin Pull-up/down Enable */
-#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * n) /* GPIO Pin Pull-up/down Enable Clock */
+#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * (n)) /* GPIO Pin Pull-up/down Enable Clock */
#define GPIO_FSEL_NUM(pin) (pin/10)
#define GPIO_FSEL_SHIFT(pin) ((pin%10)*3)