diff options
| author | Ouxiaolong <[email protected]> | 2021-08-01 15:34:29 +0800 |
|---|---|---|
| committer | Ouxiaolong <[email protected]> | 2021-08-01 15:34:29 +0800 |
| commit | 3c858e256acecf36ec2c4861e2998963b4ba3f4f (patch) | |
| tree | 08129402e067fd5418d8d0f4512cf50328455684 | |
| parent | 5b2a7f5ed69eb8eac7151144e58dbc18395f94b3 (diff) | |
add stm32f746-st-nucleo
| -rw-r--r-- | bsp/stm32/libraries/HAL_Drivers/drv_eth.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_eth.h b/bsp/stm32/libraries/HAL_Drivers/drv_eth.h index 44eb75bbb8..12909d3779 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_eth.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_eth.h @@ -53,6 +53,24 @@ #define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK) #endif /* PHY_USING_LAN8720A */ +#ifdef PHY_USING_LAN8742A +/* The PHY interrupt source flag register. */ +#define PHY_INTERRUPT_FLAG_REG 0x1DU +/* The PHY interrupt mask register. */ +#define PHY_INTERRUPT_MASK_REG 0x1EU +#define PHY_LINK_DOWN_MASK (1<<4) +#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6) + +/* The PHY status register. */ +#define PHY_Status_REG 0x1FU +#define PHY_10M_MASK (1<<2) +#define PHY_100M_MASK (1<<3) +#define PHY_FULL_DUPLEX_MASK (1<<4) +#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK) +#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK) +#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK) +#endif /* PHY_USING_LAN8742A */ + #ifdef PHY_USING_DM9161CEP #define PHY_Status_REG 0x11U #define PHY_10M_MASK ((1<<12) || (1<<13)) |