diff options
| author | Jingbao Qiu <[email protected]> | 2024-03-18 20:04:03 +0800 |
|---|---|---|
| committer | Meco Man <[email protected]> | 2024-03-18 20:46:43 -0400 |
| commit | 42e8191b3446d0907968fd11230f21ab9459edf5 (patch) | |
| tree | 35841516e3268a70349fda4e40c82cfcebc80fa0 | |
| parent | 90f86c2b71d9cac9d99115934d9438d72a4f4389 (diff) | |
[bsp][CV1800B] fix cv1800b polarity reversal error
Signed-off-by: Jingbao Qiu <[email protected]>
| -rw-r--r-- | bsp/cvitek/drivers/drv_pwm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bsp/cvitek/drivers/drv_pwm.c b/bsp/cvitek/drivers/drv_pwm.c index 98db8d8eeb..27f8a8bce9 100644 --- a/bsp/cvitek/drivers/drv_pwm.c +++ b/bsp/cvitek/drivers/drv_pwm.c @@ -31,7 +31,7 @@ static void cvi_pwm_set_config(rt_ubase_t reg_base, struct rt_pwm_configuration { unsigned long long duty_clk, period_clk; - cvi_pwm_set_polarity_low_ch(reg_base, (cfg->channel & PWM_MAX_CH)); + cvi_pwm_set_polarity_high_ch(reg_base, (cfg->channel & PWM_MAX_CH)); duty_clk = (cfg->pulse * count_unit) / NSEC_COUNT; cvi_pwm_set_high_period_ch(reg_base, (cfg->channel & PWM_MAX_CH), duty_clk); |