[bsp][rockchip] fixup rk3500 build and run

Linker: https://github.com/RT-Thread/rt-thread/issues/11150

Signed-off-by: GuEe-GUI <[email protected]>

6 files changed, 305 insertions, 53 deletions

diff --git a/bsp/rockchip/dm/Kconfig b/bsp/rockchip/dm/Kconfig
index 53eca977c9..976548e8eb 100755
--- a/bsp/rockchip/dm/Kconfig
+++ b/bsp/rockchip/dm/Kconfig
@@ -3,7 +3,7 @@ SOC_DM_CAN_DIR          = $(SOC_DM_DIR)/can
 SOC_DM_CLK_DIR          = $(SOC_DM_DIR)/clk
 SOC_DM_HWCRYPTO_DIR     = $(SOC_DM_DIR)/hwcrypto
 SOC_DM_HWSPINLOCK_DIR   = $(SOC_DM_DIR)/hwspinlock
-SOC_DM_HWTIMER_DIR      = $(SOC_DM_DIR)/hwtimer
+SOC_DM_CLOCK_TIME_DIR   = $(SOC_DM_DIR)/hwtimer
 SOC_DM_I2C_DIR          = $(SOC_DM_DIR)/i2c
 SOC_DM_INPUT_MISC_DIR   = $(SOC_DM_DIR)/input/misc
 SOC_DM_MBOX_DIR         = $(SOC_DM_DIR)/mailbox
diff --git a/bsp/rockchip/rk3500/.config b/bsp/rockchip/rk3500/.config
index fc4a8cde21..2a186892fa 100644
--- a/bsp/rockchip/rk3500/.config
+++ b/bsp/rockchip/rk3500/.config
@@ -116,7 +116,7 @@ CONFIG_RT_KLIBC_USING_VSNPRINTF_LOG10_TAYLOR_TERMS=4
 # end of rt_strnlen options
 # end of klibc options
 
-CONFIG_RT_NAME_MAX=12
+CONFIG_RT_NAME_MAX=24
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_NANO is not set
 CONFIG_RT_USING_SMART=y
@@ -266,7 +266,7 @@ CONFIG_RT_USING_DFS_DEVFS=y
 # CONFIG_RT_USING_DFS_ROMFS is not set
 CONFIG_RT_USING_DFS_PTYFS=y
 CONFIG_RT_USING_DFS_PROCFS=y
-CONFIG_RT_USING_DFS_CROMFS=y
+# CONFIG_RT_USING_DFS_CROMFS is not set
 CONFIG_RT_USING_DFS_TMPFS=y
 CONFIG_RT_USING_DFS_MQUEUE=y
 CONFIG_RT_USING_PAGECACHE=y
@@ -304,28 +304,59 @@ CONFIG_RT_USING_SERIAL_BYPASS=y
 # CONFIG_RT_SERIAL_EARLY_HVC is not set
 # CONFIG_RT_SERIAL_PL011 is not set
 CONFIG_RT_SERIAL_8250=y
-# CONFIG_RT_SERIAL_8250_DW is not set
-# CONFIG_RT_USING_CAN is not set
-# CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_SERIAL_8250_DW=y
+# CONFIG_RT_SERIAL_8250_PCI is not set
+CONFIG_RT_USING_CAN=y
+# CONFIG_RT_CAN_USING_HDR is not set
+CONFIG_RT_CAN_USING_CANFD=y
+CONFIG_RT_CANMSG_BOX_SZ=16
+CONFIG_RT_CANSND_BOX_NUM=1
+CONFIG_RT_CANSND_MSG_TIMEOUT=100
+CONFIG_RT_CAN_NB_TX_FIFO_SIZE=256
+# CONFIG_RT_CAN_MALLOC_NB_TX_BUFFER is not set
+CONFIG_RT_CAN_CANFD_ROCKCHIP=y
+CONFIG_RT_USING_CLOCK_TIME=y
+CONFIG_RT_CLOCK_TIME_ARM_ARCH=y
+CONFIG_RT_CLOCK_TIMER_ROCKCHIP=y
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
+CONFIG_RT_I2C_RK3X=y
 # CONFIG_RT_USING_PHY is not set
 # CONFIG_RT_USING_PHY_V2 is not set
-# CONFIG_RT_USING_ADC is not set
+CONFIG_RT_USING_ADC=y
+CONFIG_RT_ADC_ROCKCHIP_SARADC=y
 # CONFIG_RT_USING_DAC is not set
 CONFIG_RT_USING_NULL=y
 CONFIG_RT_USING_ZERO=y
 CONFIG_RT_USING_RANDOM=y
-# CONFIG_RT_USING_PWM is not set
+CONFIG_RT_USING_PWM=y
+CONFIG_RT_PWM_ROCKCHIP=y
 # CONFIG_RT_USING_PULSE_ENCODER is not set
 # CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_MTD_NOR is not set
+CONFIG_RT_USING_MTD_NOR=y
+# CONFIG_RT_USING_MTD_NOR_CFI is not set
+CONFIG_RT_USING_MTD_NOR_SPI=y
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
 CONFIG_RT_USING_RTC=y
-# CONFIG_RT_USING_ALARM is not set
+CONFIG_RT_USING_ALARM=y
+CONFIG_RT_ALARM_STACK_SIZE=16384
+CONFIG_RT_ALARM_TIMESLICE=5
+CONFIG_RT_ALARM_PRIORITY=10
+# CONFIG_RT_ALARM_USING_LOCAL_TIME is not set
 CONFIG_RT_USING_SOFT_RTC=y
+# CONFIG_RT_RTC_DS1302 is not set
+# CONFIG_RT_RTC_DS1307 is not set
 # CONFIG_RT_RTC_GOLDFISH is not set
+CONFIG_RT_RTC_HYM8563=y
+CONFIG_RT_RTC_PCF8523=y
+CONFIG_RT_RTC_PCF8563=y
 # CONFIG_RT_RTC_PL031 is not set
+CONFIG_RT_RTC_RX8010=y
+CONFIG_RT_RTC_RK8XX=y
 # CONFIG_RT_RTC_RK_TIMER is not set
 CONFIG_RT_USING_SDIO=y
 CONFIG_RT_SDIO_STACK_SIZE=16384
@@ -335,19 +366,77 @@ CONFIG_RT_MMCSD_THREAD_PRIORITY=22
 CONFIG_RT_MMCSD_MAX_PARTITION=16
 # CONFIG_RT_SDIO_DEBUG is not set
 # CONFIG_RT_USING_SDHCI is not set
-# CONFIG_RT_USING_SPI is not set
-# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_SDIO_SDHCI_PCI is not set
+CONFIG_RT_SDIO_DW_MMC=y
+# CONFIG_RT_SDIO_DW_MMC_PCI is not set
+CONFIG_RT_SDIO_DW_MMC_ROCKCHIP=y
+CONFIG_RT_USING_SPI=y
+CONFIG_RT_USING_SPI_ISR=y
+# CONFIG_RT_USING_SPI_BITOPS is not set
+# CONFIG_RT_USING_SOFT_SPI is not set
+CONFIG_RT_USING_QSPI=y
+# CONFIG_RT_USING_SPI_MSD is not set
+CONFIG_RT_USING_SFUD=y
+CONFIG_RT_SFUD_USING_SFDP=y
+CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
+# CONFIG_RT_SFUD_USING_QSPI is not set
+CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
+# CONFIG_RT_DEBUG_SFUD is not set
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
+# CONFIG_RT_SPI_ROCKCHIP_SFC is not set
+CONFIG_RT_SPI_ROCKCHIP=y
+CONFIG_RT_USING_WDT=y
+CONFIG_RT_WDT_DW=y
+# CONFIG_RT_WDT_I6300ESB is not set
+CONFIG_RT_WDT_RK8XX=y
 # CONFIG_RT_USING_AUDIO is not set
 # CONFIG_RT_USING_SENSOR is not set
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_GRAPHIC is not set
-# CONFIG_RT_USING_HWCRYPTO is not set
+CONFIG_RT_USING_HWCRYPTO=y
+CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto"
+CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16
+CONFIG_RT_HWCRYPTO_KEYBIT_MAX_SIZE=256
+# CONFIG_RT_HWCRYPTO_USING_GCM is not set
+# CONFIG_RT_HWCRYPTO_USING_AES is not set
+# CONFIG_RT_HWCRYPTO_USING_DES is not set
+# CONFIG_RT_HWCRYPTO_USING_3DES is not set
+# CONFIG_RT_HWCRYPTO_USING_RC4 is not set
+# CONFIG_RT_HWCRYPTO_USING_MD5 is not set
+# CONFIG_RT_HWCRYPTO_USING_SHA1 is not set
+# CONFIG_RT_HWCRYPTO_USING_SHA2 is not set
+CONFIG_RT_HWCRYPTO_USING_RNG=y
+# CONFIG_RT_HWCRYPTO_USING_CRC is not set
+# CONFIG_RT_HWCRYPTO_USING_BIGNUM is not set
+CONFIG_RT_HWCRYPTO_RNG_ROCKCHIP=y
 # CONFIG_RT_USING_WIFI is not set
-# CONFIG_RT_USING_LED is not set
-# CONFIG_RT_USING_INPUT is not set
-# CONFIG_RT_USING_MBOX is not set
-# CONFIG_RT_USING_HWSPINLOCK is not set
-# CONFIG_RT_USING_PHYE is not set
+CONFIG_RT_USING_LED=y
+CONFIG_RT_LED_GPIO=y
+# CONFIG_RT_LED_PWM is not set
+# CONFIG_RT_LED_SYSCON is not set
+CONFIG_RT_USING_INPUT=y
+CONFIG_RT_INPUT_POWER=y
+# CONFIG_RT_INPUT_UAPI is not set
+# CONFIG_RT_INPUT_JOYSTICK is not set
+# CONFIG_RT_INPUT_KEYBOARD is not set
+CONFIG_RT_INPUT_MISC=y
+# CONFIG_RT_INPUT_MISC_BUTTON_E3X0 is not set
+CONFIG_RT_INPUT_MISC_PWRKEY_RK8XX=y
+# CONFIG_RT_INPUT_TOUCHSCREEN is not set
+CONFIG_RT_USING_MBOX=y
+CONFIG_RT_MBOX_PIC=y
+CONFIG_RT_MBOX_ROCKCHIP=y
+CONFIG_RT_USING_HWSPINLOCK=y
+CONFIG_RT_HWSPINLOCK_ROCKCHIP=y
+CONFIG_RT_USING_PHYE=y
+# CONFIG_RT_PHYE_GENERIC_USB is not set
+CONFIG_RT_PHYE_ROCKCHIP_NANENG_COMBO=y
+CONFIG_RT_PHYE_ROCKCHIP_SNPS_PCIE3=y
+# CONFIG_RT_USING_ATA is not set
+CONFIG_RT_USING_NVME=y
+CONFIG_RT_USING_NVME_IO_QUEUE=4
+CONFIG_RT_NVME_PCI=y
 CONFIG_RT_USING_BLK=y
 
 #
@@ -358,51 +447,104 @@ CONFIG_RT_BLK_PARTITION_EFI=y
 # end of Partition Types
 
 # CONFIG_RT_USING_SCSI is not set
-# CONFIG_RT_USING_FIRMWARE is not set
+CONFIG_RT_USING_FIRMWARE=y
+CONFIG_RT_FIRMWARE_ARM_SCMI=y
+CONFIG_RT_FIRMWARE_ARM_SCMI_TRANSPORT_MAILBOX=y
+CONFIG_RT_FIRMWARE_ARM_SCMI_TRANSPORT_SMC=y
 # CONFIG_RT_USING_HWCACHE is not set
-# CONFIG_RT_USING_REGULATOR is not set
+CONFIG_RT_USING_REGULATOR=y
+CONFIG_RT_REGULATOR_FIXED=y
+CONFIG_RT_REGULATOR_GPIO=y
+CONFIG_RT_REGULATOR_SCMI=y
+CONFIG_RT_REGULATOR_RK8XX=y
 CONFIG_RT_USING_RESET=y
+CONFIG_RT_RESET_SCMI=y
 # CONFIG_RT_RESET_SIMPLE is not set
 
 #
 # Power Management (PM) Domains device drivers
 #
+CONFIG_RT_PMDOMAIN_SCMI=y
+CONFIG_RT_PMDOMAIN_ROCKCHIP=y
 # end of Power Management (PM) Domains device drivers
 
 # CONFIG_RT_USING_POWER_RESET is not set
 # CONFIG_RT_USING_POWER_SUPPLY is not set
-# CONFIG_RT_USING_THERMAL is not set
+CONFIG_RT_USING_THERMAL=y
+
+#
+# Thermal Sensors Drivers
+#
+# CONFIG_RT_THERMAL_SCMI is not set
+CONFIG_RT_THERMAL_ROCKCHIP_TSADC=y
+
+#
+# Thermal Cool Drivers
+#
+CONFIG_RT_THERMAL_COOL_PWM_FAN=y
 # CONFIG_RT_USING_VIRTIO is not set
-# CONFIG_RT_USING_NVMEM is not set
-# CONFIG_RT_USING_DMA is not set
+CONFIG_RT_USING_NVMEM=y
+CONFIG_RT_NVMEM_ROCKCHIP_OTP=y
+CONFIG_RT_USING_DMA=y
+CONFIG_RT_DMA_PL330=y
 CONFIG_RT_USING_MFD=y
+# CONFIG_RT_MFD_EDU is not set
 CONFIG_RT_MFD_SYSCON=y
+CONFIG_RT_MFD_RK8XX=y
+CONFIG_RT_MFD_RK8XX_I2C=y
+CONFIG_RT_MFD_RK8XX_SPI=y
 CONFIG_RT_USING_OFW=y
 # CONFIG_RT_USING_BUILTIN_FDT is not set
 CONFIG_RT_FDT_EARLYCON_MSG_SIZE=128
 CONFIG_RT_USING_OFW_BUS_RANGES_NUMBER=8
-# CONFIG_RT_USING_PCI is not set
+CONFIG_RT_USING_PCI=y
+CONFIG_RT_PCI_MSI=y
+CONFIG_RT_PCI_ENDPOINT=y
+CONFIG_RT_PCI_SYS_64BIT=y
+CONFIG_RT_PCI_CACHE_LINE_SIZE=8
+# CONFIG_RT_PCI_LOCKLESS is not set
+
+#
+# PCI Device Drivers
+#
+# CONFIG_RT_PCI_ECAM is not set
+CONFIG_RT_PCI_DW=y
+CONFIG_RT_PCI_DW_HOST=y
+CONFIG_RT_PCI_DW_EP=y
+CONFIG_RT_PCI_DW_ROCKCHIP=y
 CONFIG_RT_USING_PIC=y
-CONFIG_MAX_HANDLERS=1024
+CONFIG_MAX_HANDLERS=2048
 # CONFIG_RT_PIC_ARM_GIC is not set
 CONFIG_RT_PIC_ARM_GIC_V3=y
+CONFIG_RT_PIC_ARM_GIC_V3_ITS=y
+CONFIG_RT_PIC_ARM_GIC_V3_ITS_IRQ_MAX=256
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_PIN_PL061 is not set
 CONFIG_RT_PIN_ROCKCHIP=y
 CONFIG_RT_USING_PINCTRL=y
+# CONFIG_RT_PINCTRL_SCMI is not set
 # CONFIG_RT_PINCTRL_SINGLE is not set
+CONFIG_RT_PINCTRL_ROCKCHIP_RK8XX=y
 CONFIG_RT_PINCTRL_ROCKCHIP=y
-CONFIG_RT_USING_CLOCK_TIME=y
-CONFIG_RT_CLOCK_TIME_ARM_ARCH=y
 CONFIG_RT_USING_CLK=y
+CONFIG_RT_CLK_SCMI=y
+CONFIG_RT_CLK_ROCKCHIP_RK8XX_CLKOUT=y
 CONFIG_RT_CLK_ROCKCHIP_LINK=y
 CONFIG_RT_CLK_ROCKCHIP=y
 # CONFIG_RT_CLK_ROCKCHIP_RK3308 is not set
 CONFIG_RT_CLK_ROCKCHIP_RK3568=y
-# CONFIG_RT_CLK_ROCKCHIP_RK3576 is not set
+CONFIG_RT_CLK_ROCKCHIP_RK3576=y
 CONFIG_RT_CLK_ROCKCHIP_RK3588=y
-CONFIG_RT_CLOCK_TIMER_ROCKCHIP=y
 # CONFIG_RT_USING_CHERRYUSB is not set
+
+#
+# SoC (System on Chip) Drivers
+#
+CONFIG_RT_SOC_ROCKCHIP_FIQ_DEBUGGER=y
+CONFIG_RT_SOC_ROCKCHIP_GRF=y
+CONFIG_RT_SOC_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_RT_SOC_ROCKCHIP_IODOMAIN=y
+# end of SoC (System on Chip) Drivers
 # end of Device Drivers
 
 #
@@ -999,7 +1141,6 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y
 # CONFIG_PKG_USING_RVBACKTRACE is not set
 # CONFIG_PKG_USING_HPATCHLITE is not set
 # CONFIG_PKG_USING_THREAD_METRIC is not set
-# CONFIG_PKG_USING_UORB is not set
 # end of tools packages
 
 #
@@ -1094,7 +1235,6 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
 # CONFIG_PKG_USING_HEARTBEAT is not set
 # CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set
-# CONFIG_PKG_USING_CHERRYECAT is not set
 # end of system packages
 
 #
@@ -1251,12 +1391,6 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y
 # CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set
 # end of GD32 Drivers
-
-#
-# HPMicro SDK
-#
-# CONFIG_PKG_USING_HPM_SDK is not set
-# end of HPMicro SDK
 # end of HAL & SDK Drivers
 
 #
@@ -1305,7 +1439,6 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y
 # CONFIG_PKG_USING_MLX90393 is not set
 # CONFIG_PKG_USING_MLX90392 is not set
 # CONFIG_PKG_USING_MLX90394 is not set
-# CONFIG_PKG_USING_MLX90396 is not set
 # CONFIG_PKG_USING_MLX90397 is not set
 # CONFIG_PKG_USING_MS5611 is not set
 # CONFIG_PKG_USING_MAX31865 is not set
@@ -1776,4 +1909,3 @@ CONFIG_PKG_ZLIB_VER="latest"
 # end of RT-Thread online packages
 
 CONFIG_SOC_RK3500=y
-CONFIG_SOC_RK3568=y
diff --git a/bsp/rockchip/rk3500/rtconfig.h b/bsp/rockchip/rk3500/rtconfig.h
index 0518bc0e16..54ff974a0c 100644
--- a/bsp/rockchip/rk3500/rtconfig.h
+++ b/bsp/rockchip/rk3500/rtconfig.h
@@ -72,7 +72,7 @@
 
 /* end of rt_strnlen options */
 /* end of klibc options */
-#define RT_NAME_MAX 12
+#define RT_NAME_MAX 24
 #define RT_USING_SMART
 #define RT_USING_SMP
 #define RT_CPUS_NR 4
@@ -182,7 +182,6 @@
 #define RT_USING_DFS_DEVFS
 #define RT_USING_DFS_PTYFS
 #define RT_USING_DFS_PROCFS
-#define RT_USING_DFS_CROMFS
 #define RT_USING_DFS_TMPFS
 #define RT_USING_DFS_MQUEUE
 #define RT_USING_PAGECACHE
@@ -212,17 +211,82 @@
 #define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_SERIAL_BYPASS
 #define RT_SERIAL_8250
+#define RT_SERIAL_8250_DW
+#define RT_USING_CAN
+#define RT_CAN_USING_CANFD
+#define RT_CANMSG_BOX_SZ 16
+#define RT_CANSND_BOX_NUM 1
+#define RT_CANSND_MSG_TIMEOUT 100
+#define RT_CAN_NB_TX_FIFO_SIZE 256
+#define RT_CAN_CANFD_ROCKCHIP
+#define RT_USING_CLOCK_TIME
+#define RT_CLOCK_TIME_ARM_ARCH
+#define RT_CLOCK_TIMER_ROCKCHIP
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
+#define RT_I2C_RK3X
+#define RT_USING_ADC
+#define RT_ADC_ROCKCHIP_SARADC
 #define RT_USING_NULL
 #define RT_USING_ZERO
 #define RT_USING_RANDOM
+#define RT_USING_PWM
+#define RT_PWM_ROCKCHIP
+#define RT_USING_MTD_NOR
+#define RT_USING_MTD_NOR_SPI
 #define RT_USING_RTC
+#define RT_USING_ALARM
+#define RT_ALARM_STACK_SIZE 16384
+#define RT_ALARM_TIMESLICE 5
+#define RT_ALARM_PRIORITY 10
 #define RT_USING_SOFT_RTC
+#define RT_RTC_HYM8563
+#define RT_RTC_PCF8523
+#define RT_RTC_PCF8563
+#define RT_RTC_RX8010
+#define RT_RTC_RK8XX
 #define RT_USING_SDIO
 #define RT_SDIO_STACK_SIZE 16384
 #define RT_SDIO_THREAD_PRIORITY 15
 #define RT_MMCSD_STACK_SIZE 16384
 #define RT_MMCSD_THREAD_PRIORITY 22
 #define RT_MMCSD_MAX_PARTITION 16
+#define RT_SDIO_DW_MMC
+#define RT_SDIO_DW_MMC_ROCKCHIP
+#define RT_USING_SPI
+#define RT_USING_SPI_ISR
+#define RT_USING_QSPI
+#define RT_USING_SFUD
+#define RT_SFUD_USING_SFDP
+#define RT_SFUD_USING_FLASH_INFO_TABLE
+#define RT_SFUD_SPI_MAX_HZ 50000000
+#define RT_SPI_ROCKCHIP
+#define RT_USING_WDT
+#define RT_WDT_DW
+#define RT_WDT_RK8XX
+#define RT_USING_HWCRYPTO
+#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
+#define RT_HWCRYPTO_IV_MAX_SIZE 16
+#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
+#define RT_HWCRYPTO_USING_RNG
+#define RT_HWCRYPTO_RNG_ROCKCHIP
+#define RT_USING_LED
+#define RT_LED_GPIO
+#define RT_USING_INPUT
+#define RT_INPUT_POWER
+#define RT_INPUT_MISC
+#define RT_INPUT_MISC_PWRKEY_RK8XX
+#define RT_USING_MBOX
+#define RT_MBOX_PIC
+#define RT_MBOX_ROCKCHIP
+#define RT_USING_HWSPINLOCK
+#define RT_HWSPINLOCK_ROCKCHIP
+#define RT_USING_PHYE
+#define RT_PHYE_ROCKCHIP_NANENG_COMBO
+#define RT_PHYE_ROCKCHIP_SNPS_PCIE3
+#define RT_USING_NVME
+#define RT_USING_NVME_IO_QUEUE 4
+#define RT_NVME_PCI
 #define RT_USING_BLK
 
 /* Partition Types */
@@ -230,31 +294,82 @@
 #define RT_BLK_PARTITION_DFS
 #define RT_BLK_PARTITION_EFI
 /* end of Partition Types */
+#define RT_USING_FIRMWARE
+#define RT_FIRMWARE_ARM_SCMI
+#define RT_FIRMWARE_ARM_SCMI_TRANSPORT_MAILBOX
+#define RT_FIRMWARE_ARM_SCMI_TRANSPORT_SMC
+#define RT_USING_REGULATOR
+#define RT_REGULATOR_FIXED
+#define RT_REGULATOR_GPIO
+#define RT_REGULATOR_SCMI
+#define RT_REGULATOR_RK8XX
 #define RT_USING_RESET
+#define RT_RESET_SCMI
 
 /* Power Management (PM) Domains device drivers */
 
+#define RT_PMDOMAIN_SCMI
+#define RT_PMDOMAIN_ROCKCHIP
 /* end of Power Management (PM) Domains device drivers */
+#define RT_USING_THERMAL
+
+/* Thermal Sensors Drivers */
+
+#define RT_THERMAL_ROCKCHIP_TSADC
+
+/* Thermal Cool Drivers */
+
+#define RT_THERMAL_COOL_PWM_FAN
+#define RT_USING_NVMEM
+#define RT_NVMEM_ROCKCHIP_OTP
+#define RT_USING_DMA
+#define RT_DMA_PL330
 #define RT_USING_MFD
 #define RT_MFD_SYSCON
+#define RT_MFD_RK8XX
+#define RT_MFD_RK8XX_I2C
+#define RT_MFD_RK8XX_SPI
 #define RT_USING_OFW
 #define RT_FDT_EARLYCON_MSG_SIZE 128
 #define RT_USING_OFW_BUS_RANGES_NUMBER 8
+#define RT_USING_PCI
+#define RT_PCI_MSI
+#define RT_PCI_ENDPOINT
+#define RT_PCI_SYS_64BIT
+#define RT_PCI_CACHE_LINE_SIZE 8
+
+/* PCI Device Drivers */
+
+#define RT_PCI_DW
+#define RT_PCI_DW_HOST
+#define RT_PCI_DW_EP
+#define RT_PCI_DW_ROCKCHIP
 #define RT_USING_PIC
-#define MAX_HANDLERS 1024
+#define MAX_HANDLERS 2048
 #define RT_PIC_ARM_GIC_V3
+#define RT_PIC_ARM_GIC_V3_ITS
+#define RT_PIC_ARM_GIC_V3_ITS_IRQ_MAX 256
 #define RT_USING_PIN
 #define RT_PIN_ROCKCHIP
 #define RT_USING_PINCTRL
+#define RT_PINCTRL_ROCKCHIP_RK8XX
 #define RT_PINCTRL_ROCKCHIP
-#define RT_USING_CLOCK_TIME
 #define RT_USING_CLK
+#define RT_CLK_SCMI
+#define RT_CLK_ROCKCHIP_RK8XX_CLKOUT
 #define RT_CLK_ROCKCHIP_LINK
 #define RT_CLK_ROCKCHIP
 #define RT_CLK_ROCKCHIP_RK3568
+#define RT_CLK_ROCKCHIP_RK3576
 #define RT_CLK_ROCKCHIP_RK3588
-#define RT_CLOCK_TIME_ARM_ARCH
-#define RT_CLOCK_TIMER_ROCKCHIP
+
+/* SoC (System on Chip) Drivers */
+
+#define RT_SOC_ROCKCHIP_FIQ_DEBUGGER
+#define RT_SOC_ROCKCHIP_GRF
+#define RT_SOC_ROCKCHIP_HW_DECOMPRESS
+#define RT_SOC_ROCKCHIP_IODOMAIN
+/* end of SoC (System on Chip) Drivers */
 /* end of Device Drivers */
 
 /* C/C++ and POSIX layer */
@@ -594,10 +709,6 @@
 /* GD32 Drivers */
 
 /* end of GD32 Drivers */
-
-/* HPMicro SDK */
-
-/* end of HPMicro SDK */
 /* end of HAL & SDK Drivers */
 
 /* sensors drivers */
@@ -680,6 +791,5 @@
 /* end of Arduino libraries */
 /* end of RT-Thread online packages */
 #define SOC_RK3500
-#define SOC_RK3568
 
 #endif
diff --git a/components/drivers/Kconfig b/components/drivers/Kconfig
index 01539009a2..f04d3c7f48 100755
--- a/components/drivers/Kconfig
+++ b/components/drivers/Kconfig
@@ -49,4 +49,10 @@ rsource "pinctrl/Kconfig"
 rsource "clk/Kconfig"
 rsource "usb/Kconfig"
 
+if RT_USING_DM
+    menu "SoC (System on Chip) Drivers"
+        osource "$(SOC_DM_SOC_DIR)/Kconfig"
+    endmenu
+endif
+
 endmenu
diff --git a/components/drivers/clk/clk-scmi.c b/components/drivers/clk/clk-scmi.c
index ca51ee1ddc..d6240fa406 100755
--- a/components/drivers/clk/clk-scmi.c
+++ b/components/drivers/clk/clk-scmi.c
@@ -47,7 +47,7 @@ struct scmi_clk_data
     } info;
 };
 
-#define cell_to_scmi_clk_data(cell) rt_container_of(cell, struct scmi_clk_data, cell)
+#define cell_to_scmi_clk_data(cell_ptr) rt_container_of(cell_ptr, struct scmi_clk_data, cell)
 
 static rt_err_t scmi_clk_op_gate(struct scmi_clk *sclk, int clk_id, rt_bool_t enable)
 {
@@ -128,7 +128,7 @@ static rt_base_t scmi_clk_round_rate(struct rt_clk_cell *cell, rt_ubase_t drate,
 
     if (clk_data->rate_discrete)
     {
-        return rate;
+        return drate;
     }
 
     fmin = clk_data->info.range.min_rate;
diff --git a/components/drivers/clock_time/Kconfig b/components/drivers/clock_time/Kconfig
index 7da12ac849..d6259617aa 100644
--- a/components/drivers/clock_time/Kconfig
+++ b/components/drivers/clock_time/Kconfig
@@ -15,4 +15,8 @@ if RT_USING_CLOCK_TIME
         depends on RT_USING_DM
         depends on ARCH_ARM_CORTEX_A || ARCH_ARMV8
         default n
+
+if RT_USING_DM
+    osource "$(SOC_DM_CLOCK_TIME_DIR)/Kconfig"
+endif
 endif