bsp: nxp/mcx/mcxa/frdm-mcxa156: Enable SPI driver support.

This patch:
* Enables SPI support
* Adds RW001 driver example
* Increases heap size to 32kB.

Signed-off-by: Yilin Sun <[email protected]>

7 files changed, 224 insertions, 7 deletions

diff --git a/bsp/nxp/mcx/mcxa/Libraries/MCXA156/SConscript b/bsp/nxp/mcx/mcxa/Libraries/MCXA156/SConscript
index 4fd2f5dd8c..87e04045cc 100644
--- a/bsp/nxp/mcx/mcxa/Libraries/MCXA156/SConscript
+++ b/bsp/nxp/mcx/mcxa/Libraries/MCXA156/SConscript
@@ -39,6 +39,8 @@ src += ['MCXA156/drivers/fsl_lpi2c_edma.c']
 src += ['MCXA156/drivers/fsl_lptmr.c']
 src += ['MCXA156/drivers/fsl_lpuart.c']
 src += ['MCXA156/drivers/fsl_lpuart_edma.c']
+src += ['MCXA156/drivers/fsl_lpspi.c']
+src += ['MCXA156/drivers/fsl_lpspi_edma.c']
 src += ['MCXA156/drivers/fsl_ostimer.c']
 src += ['MCXA156/drivers/fsl_pwm.c']
 src += ['MCXA156/drivers/fsl_reset.c']
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig
index 3b56d190ec..caae4c9d42 100644
--- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig
@@ -55,13 +55,9 @@ menu "On-chip Peripheral Drivers"
             default y
 
             if BSP_USING_SPI
-                config BSP_USING_SPI3
-                    bool "Enable Flexcomm3 as SPI"
+                config BSP_USING_SPI1
+                    bool "Enable LPSPI1"
                     default n
-
-                config BSP_USING_SPI8
-                    bool "Enable Flexcomm8 as High Speed SPI"
-                    default y
             endif
 
     menuconfig BSP_USING_ADC
@@ -167,7 +163,32 @@ endmenu
 
 
 menu "Board extended module Drivers"
+    menuconfig BSP_USING_RW007
+        bool "Enable RW007"
+        default n
+        select BSP_USING_SPI
+        select BSP_USING_SPI1
+        select PKG_USING_RW007
+        select RT_USING_MEMPOOL
+        select RW007_NOT_USE_EXAMPLE_DRIVERS
+
+    if BSP_USING_RW007
+        config BOARD_RW007_SPI_BUS_NAME
+            string "RW007 BUS NAME"
+            default "spi1"
+
+        config BOARD_RW007_CS_PIN
+            hex "CS pin index"
+            default 0x46
+
+        config BOARD_RW007_INT_BUSY_PIN
+            hex "INT/BUSY pin index"
+            default 0x71
 
+        config BOARD_RW007_RST_PIN
+            hex "RESET pin index"
+            default 0x2F
+    endif
 endmenu
 
 endmenu
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/clock_config.c b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/clock_config.c
index 11699f77e1..f0d3c7eb56 100644
--- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/clock_config.c
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/clock_config.c
@@ -52,6 +52,19 @@ extern uint32_t SystemCoreClock;
 void BOARD_InitBootClocks(void)
 {
     BOARD_BootClockFRO96M();
+
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 2U);
+
+    CLOCK_EnableClock(kCLOCK_GateLPSPI0);
+    CLOCK_EnableClock(kCLOCK_GateLPSPI1);
+    CLOCK_EnableClock(kCLOCK_GateDMA);
+
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);
+
+    RESET_ReleasePeripheralReset(kLPSPI0_RST_SHIFT_RSTn);
+    RESET_ReleasePeripheralReset(kLPSPI1_RST_SHIFT_RSTn);
+    RESET_ReleasePeripheralReset(kDMA_RST_SHIFT_RSTn);
 }
 
 /*******************************************************************************
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/pin_mux.c b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/pin_mux.c
index d4ed54f469..abe21146b2 100644
--- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/pin_mux.c
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/MCUX_Config/board/pin_mux.c
@@ -22,6 +22,8 @@ processor_version: 0.15.0
  */
 /* clang-format on */
 
+#include "rtconfig.h"
+
 #include "fsl_common.h"
 #include "fsl_port.h"
 #include "pin_mux.h"
@@ -159,6 +161,109 @@ void BOARD_InitPins(void)
                                                      kPORT_UnlockRegister};
     /* PORT3_12 (pin 63) is configured as LED_RED */
     PORT_SetPinConfig(PORT3, 12U, &port3_12_pin63_config);
+
+#ifdef BSP_USING_SPI1
+    const port_pin_config_t port2_12_pin34_config = {/* Internal pull-up/down resistor is disabled */
+                                                     kPORT_PullDisable,
+                                                     /* Low internal pull resistor value is selected. */
+                                                     kPORT_LowPullResistor,
+                                                     /* Fast slew rate is configured */
+                                                     kPORT_FastSlewRate,
+                                                     /* Passive input filter is disabled */
+                                                     kPORT_PassiveFilterDisable,
+                                                     /* Open drain output is disabled */
+                                                     kPORT_OpenDrainDisable,
+                                                     /* Low drive strength is configured */
+                                                     kPORT_LowDriveStrength,
+                                                     /* Normal drive strength is configured */
+                                                     kPORT_NormalDriveStrength,
+                                                     /* Pin is configured as LPSPI1_SCK */
+                                                     kPORT_MuxAlt2,
+                                                     /* Digital input enabled */
+                                                     kPORT_InputBufferEnable,
+                                                     /* Digital input is not inverted */
+                                                     kPORT_InputNormal,
+                                                     /* Pin Control Register fields [15:0] are not locked */
+                                                     kPORT_UnlockRegister};
+    /* PORT2_12 (pin 34) is configured as LPSPI1_SCK */
+    PORT_SetPinConfig(PORT2, 12U, &port2_12_pin34_config);
+
+    const port_pin_config_t port2_13_pin35_config = {/* Internal pull-up/down resistor is disabled */
+                                                     kPORT_PullDisable,
+                                                     /* Low internal pull resistor value is selected. */
+                                                     kPORT_LowPullResistor,
+                                                     /* Fast slew rate is configured */
+                                                     kPORT_FastSlewRate,
+                                                     /* Passive input filter is disabled */
+                                                     kPORT_PassiveFilterDisable,
+                                                     /* Open drain output is disabled */
+                                                     kPORT_OpenDrainDisable,
+                                                     /* Low drive strength is configured */
+                                                     kPORT_LowDriveStrength,
+                                                     /* Normal drive strength is configured */
+                                                     kPORT_NormalDriveStrength,
+                                                     /* Pin is configured as LPSPI1_SDO */
+                                                     kPORT_MuxAlt2,
+                                                     /* Digital input enabled */
+                                                     kPORT_InputBufferEnable,
+                                                     /* Digital input is not inverted */
+                                                     kPORT_InputNormal,
+                                                     /* Pin Control Register fields [15:0] are not locked */
+                                                     kPORT_UnlockRegister};
+    /* PORT2_13 (pin 35) is configured as LPSPI1_SDO */
+    PORT_SetPinConfig(PORT2, 13U, &port2_13_pin35_config);
+
+    const port_pin_config_t port2_16_pin37_config = {/* Internal pull-up/down resistor is disabled */
+                                                     kPORT_PullDisable,
+                                                     /* Low internal pull resistor value is selected. */
+                                                     kPORT_LowPullResistor,
+                                                     /* Fast slew rate is configured */
+                                                     kPORT_FastSlewRate,
+                                                     /* Passive input filter is disabled */
+                                                     kPORT_PassiveFilterDisable,
+                                                     /* Open drain output is disabled */
+                                                     kPORT_OpenDrainDisable,
+                                                     /* Low drive strength is configured */
+                                                     kPORT_LowDriveStrength,
+                                                     /* Normal drive strength is configured */
+                                                     kPORT_NormalDriveStrength,
+                                                     /* Pin is configured as LPSPI1_SDI */
+                                                     kPORT_MuxAlt2,
+                                                     /* Digital input enabled */
+                                                     kPORT_InputBufferEnable,
+                                                     /* Digital input is not inverted */
+                                                     kPORT_InputNormal,
+                                                     /* Pin Control Register fields [15:0] are not locked */
+                                                     kPORT_UnlockRegister};
+    /* PORT2_16 (pin 37) is configured as LPSPI1_SDI */
+    PORT_SetPinConfig(PORT2, 16U, &port2_16_pin37_config);
+
+    const port_pin_config_t port2_6_pin28_config = {/* Internal pull-up/down resistor is disabled */
+                                                    kPORT_PullDisable,
+                                                    /* Low internal pull resistor value is selected. */
+                                                    kPORT_LowPullResistor,
+                                                    /* Fast slew rate is configured */
+                                                    kPORT_FastSlewRate,
+                                                    /* Passive input filter is disabled */
+                                                    kPORT_PassiveFilterDisable,
+                                                    /* Open drain output is disabled */
+                                                    kPORT_OpenDrainDisable,
+                                                    /* Low drive strength is configured */
+                                                    kPORT_LowDriveStrength,
+                                                    /* Normal drive strength is configured */
+                                                    kPORT_NormalDriveStrength,
+                                                    /* Pin is configured as LPSPI1_PCS1 */
+                                                    kPORT_MuxAsGpio,
+                                                    /* Digital input enabled */
+                                                    kPORT_InputBufferEnable,
+                                                    /* Digital input is not inverted */
+                                                    kPORT_InputNormal,
+                                                    /* Pin Control Register fields [15:0] are not locked */
+                                                    kPORT_UnlockRegister};
+    /* PORT2_6 (pin 20) is configured as LPSPI1_PCS1 */
+    PORT_SetPinConfig(PORT2, 6U, &port2_6_pin28_config);
+#endif
+
 }
 /***********************************************************************************************************************
  * EOF
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/SConscript b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/SConscript
index 660c64b385..7895c53be1 100644
--- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/SConscript
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/SConscript
@@ -9,6 +9,9 @@ MCUX_Config/board/clock_config.c
 MCUX_Config/board/pin_mux.c
 """)
 
+if GetDepend(['BSP_USING_RW007']):
+    src += Glob('ports/drv_spi_sample_rw007.c')
+
 CPPPATH = [cwd, cwd + '/MCUX_Config/board']
 CPPDEFINES = ['DEBUG', 'CPU_MCXA156VLL']
 
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/ports/drv_spi_sample_rw007.c b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/ports/drv_spi_sample_rw007.c
new file mode 100644
index 0000000000..85ae966c8a
--- /dev/null
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/ports/drv_spi_sample_rw007.c
@@ -0,0 +1,73 @@
+#include <rtthread.h>
+
+#ifdef BSP_USING_RW007
+#include <rtdbg.h>
+#include <rtdevice.h>
+#include <board.h>
+#include <spi_wifi_rw007.h>
+
+#define BOARD_RW007_DEVICE_NAME "rw007"
+
+extern void spi_wifi_isr(int vector);
+
+static void rw007_gpio_init(void)
+{
+    /* Configure IO */
+    rt_pin_mode(BOARD_RW007_RST_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
+
+    /* Reset rw007 and config mode */
+    rt_pin_write(BOARD_RW007_RST_PIN, PIN_LOW);
+
+    rt_thread_delay(rt_tick_from_millisecond(100));
+    rt_pin_write(BOARD_RW007_RST_PIN, PIN_HIGH);
+
+    /* Wait rw007 ready(exit busy stat) */
+    while (!rt_pin_read(BOARD_RW007_INT_BUSY_PIN))
+    {
+        rt_thread_delay(5);
+    }
+
+    rt_thread_delay(rt_tick_from_millisecond(200));
+    rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
+}
+
+int wifi_spi_device_init(void)
+{
+    int ret = 0;
+    char sn_version[32];
+
+    struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
+    if (!spi_device) return -1;
+
+    rw007_gpio_init();
+    ret = rt_spi_bus_attach_device_cspin(spi_device, BOARD_RW007_DEVICE_NAME, BOARD_RW007_SPI_BUS_NAME, BOARD_RW007_CS_PIN, RT_NULL);
+    if (ret != RT_EOK) return -2;
+
+    rt_hw_wifi_init("rw007");
+
+    rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
+    rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
+
+    rw007_sn_get(sn_version);
+    rt_kprintf("\nrw007  sn: [%s]\n", sn_version);
+    rw007_version_get(sn_version);
+    rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
+
+    return 0;
+}
+INIT_APP_EXPORT(wifi_spi_device_init);
+
+static void int_wifi_irq(void *p)
+{
+    ((void)p);
+    spi_wifi_isr(0);
+}
+
+void spi_wifi_hw_init(void)
+{
+    rt_pin_attach_irq(BOARD_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
+    rt_pin_irq_enable(BOARD_RW007_INT_BUSY_PIN, RT_TRUE);
+}
+
+#endif
\ No newline at end of file
diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/rtconfig.py b/bsp/nxp/mcx/mcxa/frdm-mcxa156/rtconfig.py
index 17f1c83ee6..7c167ff37a 100644
--- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/rtconfig.py
+++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/rtconfig.py
@@ -47,7 +47,7 @@ if PLATFORM == 'gcc':
     DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT'
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__START=entry -D__STARTUP_CLEAR_BSS'
-    LFLAGS = DEVICE + ' -specs=nano.specs -specs=nosys.specs -Wl,--defsym=__heap_size__=0x2000,--gc-sections,-Map=rtthread.map,--print-memory-usage -Tboard/linker_scripts/MCXA156_flash.ld'
+    LFLAGS = DEVICE + ' -specs=nano.specs -specs=nosys.specs -Wl,--defsym=__heap_size__=0x8000,--gc-sections,-Map=rtthread.map,--print-memory-usage -Tboard/linker_scripts/MCXA156_flash.ld'
 
     CPATH = ''
     LPATH = ''