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authorShell <[email protected]>2023-04-26 17:17:42 +0800
committerGitHub <[email protected]>2023-04-26 17:17:42 +0800
commit6e7c5d9bc9f9b5491bd9edd702d20867a92b5ec5 (patch)
tree791723824196a832734e9d5619121ecfb48d3850
parentc34608b4a93256d57bf55f0bef6190e3a871fe7f (diff)
[libcpu/aarch64] fix cache invalidate operation (#7363)
-rw-r--r--components/mm/mm_page.c2
-rw-r--r--libcpu/aarch64/common/cache.h8
2 files changed, 7 insertions, 3 deletions
diff --git a/components/mm/mm_page.c b/components/mm/mm_page.c
index 68193fd13c..9b3fdf74e7 100644
--- a/components/mm/mm_page.c
+++ b/components/mm/mm_page.c
@@ -679,7 +679,7 @@ static void _install_page(rt_page_t mpr_head, rt_region_t region, void *insert_h
shadow.start = region.start & ~shadow_mask;
shadow.end = FLOOR(region.end, shadow_mask + 1);
- if (shadow.end > UINT32_MAX)
+ if (shadow.end + PV_OFFSET > UINT32_MAX)
_high_page_configured = 1;
rt_page_t shad_head = addr_to_page(mpr_head, (void *)shadow.start);
diff --git a/libcpu/aarch64/common/cache.h b/libcpu/aarch64/common/cache.h
index 06a2805c48..ef7b235d0e 100644
--- a/libcpu/aarch64/common/cache.h
+++ b/libcpu/aarch64/common/cache.h
@@ -23,9 +23,13 @@ void rt_hw_cpu_dcache_invalidate(void *start_addr, unsigned long size);
static inline void rt_hw_icache_invalidate_all(void)
{
- /* wait for any modification complete */
+ /* wait for previous modification to complete */
__asm__ volatile ("dsb ishst");
- __asm__ volatile ("ic iallu");
+
+ __asm__ volatile ("ic ialluis");
+ /* wait for ic to retire */
+ __asm__ volatile ("dsb nsh");
+ /* flush instruction pipeline */
__asm__ volatile ("isb");
}