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authorlinyiyang <[email protected]>2020-01-08 22:04:49 +0800
committerlinyiyang <[email protected]>2020-01-08 22:04:49 +0800
commit7e003b2214c1e1581144dc1380dcced9733dc923 (patch)
tree4f06c2ed4d3e10bb8c3cb10482273c4003c846f9
parent8b11bfd3ac6b6623d19c89a52c9e624d31ca80be (diff)
修改相关sram名称为external sram;
-rw-r--r--bsp/stm32/libraries/STM32F1xx_HAL/SConscript2
-rw-r--r--bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig6
-rw-r--r--bsp/stm32/stm32f103-atk-warshipv3/board/SConscript2
-rw-r--r--bsp/stm32/stm32f103-atk-warshipv3/board/ports/drv_sram.c58
-rw-r--r--bsp/stm32/stm32f103-atk-warshipv3/board/ports/include/sram_port.h6
5 files changed, 38 insertions, 36 deletions
diff --git a/bsp/stm32/libraries/STM32F1xx_HAL/SConscript b/bsp/stm32/libraries/STM32F1xx_HAL/SConscript
index 01242a9817..ff87a4aa25 100644
--- a/bsp/stm32/libraries/STM32F1xx_HAL/SConscript
+++ b/bsp/stm32/libraries/STM32F1xx_HAL/SConscript
@@ -74,7 +74,7 @@ if GetDepend(['RT_USING_MTD_NOR']):
if GetDepend(['RT_USING_MTD_NAND']):
src += ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_nand.c']
-if GetDepend(['BSP_USING_SRAM']):
+if GetDepend(['BSP_USING_EXT_SRAM']):
src += ['STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c']
src += ['STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c']
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig
index 548d5641bb..588abe47a2 100644
--- a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig
+++ b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig
@@ -34,9 +34,11 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_ADC1
default n
- config BSP_USING_SRAM
- bool "Enable SRAM. Chip name is IS62WV51216, 1Mbytes static RAMs organized as 512K words by 16bits."
+ config BSP_USING_EXT_SRAM
+ bool "Enable external sram"
default n
+ help
+ Chip name is IS62WV51216, 1Mbytes static RAMs organized as 512K words by 16bits.
endmenu
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript b/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript
index 5df1bbcc7d..545cc5c842 100644
--- a/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript
+++ b/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript
@@ -12,7 +12,7 @@ board.c
CubeMX_Config/Src/stm32f1xx_hal_msp.c
''')
-if GetDepend(['BSP_USING_SRAM']):
+if GetDepend(['BSP_USING_EXT_SRAM']):
src += Glob('ports/drv_sram.c')
path = [cwd]
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/drv_sram.c b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/drv_sram.c
index 224383d3c1..c0b077e600 100644
--- a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/drv_sram.c
+++ b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/drv_sram.c
@@ -12,11 +12,11 @@
#include <rtdevice.h>
#include <board.h>
-#ifdef BSP_USING_SRAM
+#ifdef BSP_USING_EXT_SRAM
#include <sram_port.h>
#define DRV_DEBUG
-#define LOG_TAG "drv.sram"
+#define LOG_TAG "drv.ext_sram"
#include <drv_log.h>
static SRAM_HandleTypeDef hsram1;
@@ -24,7 +24,7 @@ static SRAM_HandleTypeDef hsram1;
static struct rt_memheap system_heap;
#endif
-static int sram_init(void)
+static int external_sram_init(void)
{
int result = RT_EOK;
@@ -39,9 +39,9 @@ static int sram_init(void)
hsram1.Init.NSBank = FSMC_NORSRAM_BANK3;
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
-#if SRAM_DATA_WIDTH == 8
+#if EXTERNAL_SRAM_DATA_WIDTH == 8
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
-#elif SRAM_DATA_WIDTH == 16
+#elif EXTERNAL_SRAM_DATA_WIDTH == 16
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
#else
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_32;
@@ -69,15 +69,15 @@ static int sram_init(void)
/* Initialize the SRAM controller */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
- LOG_E("SRAM init failed!");
+ LOG_E("External SRAM init failed!");
result = -RT_ERROR;
}
else
{
- LOG_D("sram init success, mapped at 0x%X, size is %d bytes, data width is %d", SRAM_BANK_ADDR, SRAM_SIZE, SRAM_DATA_WIDTH);
+ LOG_D("External sram init success, mapped at 0x%X, size is %d bytes, data width is %d", EXTERNAL_SRAM_BANK_ADDR, EXTERNAL_SRAM_SIZE, EXTERNAL_SRAM_DATA_WIDTH);
#ifdef RT_USING_MEMHEAP_AS_HEAP
/* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */
- rt_memheap_init(&system_heap, "sram", (void *)SRAM_BANK_ADDR, SRAM_SIZE);
+ rt_memheap_init(&system_heap, "ext_sram", (void *)EXTERNAL_SRAM_BANK_ADDR, EXTERNAL_SRAM_SIZE);
#endif
}
@@ -88,36 +88,36 @@ static int sram_init(void)
return result;
}
-INIT_BOARD_EXPORT(sram_init);
+INIT_BOARD_EXPORT(external_sram_init);
#ifdef DRV_DEBUG
#ifdef FINSH_USING_MSH
-int sram_test(void)
+int external_sram_test(void)
{
int i = 0;
uint32_t start_time = 0, time_cast = 0;
-#if SRAM_DATA_WIDTH == 8
+#if EXTERNAL_SRAM_DATA_WIDTH == 8
char data_width = 1;
uint8_t data = 0;
- uint8_t *ptr = (uint8_t *)SRAM_BANK_ADDR;
-#elif SRAM_DATA_WIDTH == 16
+ uint8_t *ptr = (uint8_t *)EXTERNAL_SRAM_BANK_ADDR;
+#elif EXTERNAL_SRAM_DATA_WIDTH == 16
char data_width = 2;
uint16_t data = 0;
- uint16_t *ptr = (uint16_t *)SRAM_BANK_ADDR;
+ uint16_t *ptr = (uint16_t *)EXTERNAL_SRAM_BANK_ADDR;
#else
char data_width = 4;
uint32_t data = 0;
- uint32_t *ptr = (uint32_t *)SRAM_BANK_ADDR;
+ uint32_t *ptr = (uint32_t *)EXTERNAL_SRAM_BANK_ADDR;
#endif
/* write data */
- LOG_D("Writing the %ld bytes data, waiting....", SRAM_SIZE);
+ LOG_D("Writing the %ld bytes data, waiting....", EXTERNAL_SRAM_SIZE);
start_time = rt_tick_get();
- for (i = 0; i < SRAM_SIZE / data_width; i++)
+ for (i = 0; i < EXTERNAL_SRAM_SIZE / data_width; i++)
{
-#if SRAM_DATA_WIDTH == 8
+#if EXTERNAL_SRAM_DATA_WIDTH == 8
((__IO uint8_t *)ptr)[i] = (uint8_t)0x55;
-#elif SRAM_DATA_WIDTH == 16
+#elif EXTERNAL_SRAM_DATA_WIDTH == 16
((__IO uint16_t *)ptr)[i] = (uint16_t)0x5555;
#else
((__IO uint32_t *)ptr)[i] = (uint32_t)0x55555555;
@@ -129,40 +129,40 @@ int sram_test(void)
/* read data */
LOG_D("start Reading and verifying data, waiting....");
- for (i = 0; i < SRAM_SIZE / data_width; i++)
+ for (i = 0; i < EXTERNAL_SRAM_SIZE / data_width; i++)
{
-#if SRAM_DATA_WIDTH == 8
+#if EXTERNAL_SRAM_DATA_WIDTH == 8
data = ((__IO uint8_t *)ptr)[i];
if (data != 0x55)
{
- LOG_E("SRAM test failed!");
+ LOG_E("External SRAM test failed!");
break;
}
-#elif SRAM_DATA_WIDTH == 16
+#elif EXTERNAL_SRAM_DATA_WIDTH == 16
data = ((__IO uint16_t *)ptr)[i];
if (data != 0x5555)
{
- LOG_E("SRAM test failed!");
+ LOG_E("External SRAM test failed!");
break;
}
#else
data = ((__IO uint32_t *)ptr)[i];
if (data != 0x55555555)
{
- LOG_E("SRAM test failed!");
+ LOG_E("External SRAM test failed!");
break;
}
#endif
}
- if (i >= SRAM_SIZE / data_width)
+ if (i >= EXTERNAL_SRAM_SIZE / data_width)
{
- LOG_D("SRAM test success!");
+ LOG_D("External SRAM test success!");
}
return RT_EOK;
}
-MSH_CMD_EXPORT(sram_test, sram test);
+MSH_CMD_EXPORT(external_sram_test, sram test);
#endif /* FINSH_USING_MSH */
#endif /* DRV_DEBUG */
-#endif /* BSP_USING_SRAM */
+#endif /* BSP_USING_EXT_SRAM */
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/include/sram_port.h b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/include/sram_port.h
index be8cedc990..06ee47cca2 100644
--- a/bsp/stm32/stm32f103-atk-warshipv3/board/ports/include/sram_port.h
+++ b/bsp/stm32/stm32f103-atk-warshipv3/board/ports/include/sram_port.h
@@ -13,10 +13,10 @@
/* parameters for sdram peripheral */
/* stm32f1 Bank1:0x68000000 */
-#define SRAM_BANK_ADDR ((uint32_t)0x68000000)
+#define EXTERNAL_SRAM_BANK_ADDR ((uint32_t)0x68000000)
/* data width: 8, 16, 32 */
-#define SRAM_DATA_WIDTH 16
+#define EXTERNAL_SRAM_DATA_WIDTH 16
/* sram size */
-#define SRAM_SIZE ((uint32_t)0x100000)
+#define EXTERNAL_SRAM_SIZE ((uint32_t)0x100000)
#endif