[bsp][stm32][artpi]:fix artpi eth

9 files changed, 118 insertions, 13 deletions

diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/SConscript b/bsp/stm32/libraries/HAL_Drivers/drivers/SConscript
index 12fac19061..e72d1d819f 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drivers/SConscript
+++ b/bsp/stm32/libraries/HAL_Drivers/drivers/SConscript
@@ -40,7 +40,7 @@ if GetDepend(['RT_USING_I2C']):
     if GetDepend('BSP_USING_HARD_I2C1') or GetDepend('BSP_USING_HARD_I2C2') or GetDepend('BSP_USING_HARD_I2C3') or GetDepend('BSP_USING_HARD_I2C4'):
         src += ['drv_hard_i2c.c']
 
-if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
+if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']) and not GetDepend(['SOC_STM32H750_ARTPI']):
     src += ['drv_eth.c']
 
 if GetDepend(['RT_USING_ADC']):
diff --git a/bsp/stm32/libraries/STM32H7xx_HAL/SConscript b/bsp/stm32/libraries/STM32H7xx_HAL/SConscript
index 69bbf2ab02..bade5c407a 100644
--- a/bsp/stm32/libraries/STM32H7xx_HAL/SConscript
+++ b/bsp/stm32/libraries/STM32H7xx_HAL/SConscript
@@ -57,8 +57,12 @@ if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']):
     src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_lptim.c']
 
 if GetDepend(['BSP_USING_ETH']) or GetDepend(['BSP_USING_ETH_H750']):
-    src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.c']
-    src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c']
+    if not GetDepend(['SOC_STM32H750_ARTPI']):
+        src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.c']
+        src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c']
+    else :
+        src += ['STM32H7xx_HAL_Driver/Src/Legacy/stm32h7xx_hal_eth.c']
+        src += ['STM32H7xx_HAL_Driver/Src/Legacy/stm32h7xx_hal_eth_ex.c']
 
 if GetDepend(['RT_USING_ADC']):
     src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.c']
@@ -111,6 +115,9 @@ if GetDepend(['BSP_USING_DCMI']):
 path = [cwd + '/STM32H7xx_HAL_Driver/Inc',
     cwd + '/CMSIS/Device/ST/STM32H7xx/Include']
 
+if GetDepend(['SOC_STM32H750_ARTPI']):
+        path += [cwd + '/STM32H7xx_HAL_Driver/Inc/Legacy']
+
 CPPDEFINES = ['USE_HAL_DRIVER']
 group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 
diff --git a/bsp/stm32/libraries/STM32H7xx_HAL/STM32H7xx_HAL_Driver/Inc/Legacy/stm32h7xx_hal_eth_legacy.h b/bsp/stm32/libraries/STM32H7xx_HAL/STM32H7xx_HAL_Driver/Inc/Legacy/stm32h7xx_hal_eth_legacy.h
index 878036dd81..e1b9af9acb 100644
--- a/bsp/stm32/libraries/STM32H7xx_HAL/STM32H7xx_HAL_Driver/Inc/Legacy/stm32h7xx_hal_eth_legacy.h
+++ b/bsp/stm32/libraries/STM32H7xx_HAL/STM32H7xx_HAL_Driver/Inc/Legacy/stm32h7xx_hal_eth_legacy.h
@@ -1558,7 +1558,7 @@ typedef struct{
   */
 
 /* Include ETH HAL Extension module */
-#include "stm32h7xx_hal_eth_ex.h"
+#include "stm32h7xx_hal_eth_ex_legacy.h"
 
 /* Exported functions --------------------------------------------------------*/
 
diff --git a/bsp/stm32/stm32h750-artpi/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h b/bsp/stm32/stm32h750-artpi/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
index 6e60c98fa4..ef887ffb98 100644
--- a/bsp/stm32/stm32h750-artpi/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
+++ b/bsp/stm32/stm32h750-artpi/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
@@ -45,8 +45,8 @@
 /* #define HAL_DAC_MODULE_ENABLED   */
 /* #define HAL_DCMI_MODULE_ENABLED   */
 /* #define HAL_DMA2D_MODULE_ENABLED   */
-#define HAL_ETH_MODULE_ENABLED
-/* #define HAL_ETH_LEGACY_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+#define HAL_ETH_LEGACY_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED   */
 /* #define HAL_NOR_MODULE_ENABLED   */
 /* #define HAL_OTFDEC_MODULE_ENABLED   */
@@ -169,7 +169,7 @@
 #define  TICK_INT_PRIORITY            (0UL) /*!< tick interrupt priority */
 #define  USE_RTOS                     0
 #define  USE_SD_TRANSCEIVER           0U               /*!< use uSD Transceiver */
-#define  USE_SPI_CRC	              0U               /*!< use CRC in SPI */
+#define  USE_SPI_CRC                  0U               /*!< use CRC in SPI */
 
 #define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
 #define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
diff --git a/bsp/stm32/stm32h750-artpi/board/Kconfig b/bsp/stm32/stm32h750-artpi/board/Kconfig
index 62ad2f4922..89a24ecc8c 100644
--- a/bsp/stm32/stm32h750-artpi/board/Kconfig
+++ b/bsp/stm32/stm32h750-artpi/board/Kconfig
@@ -1,5 +1,8 @@
 menu "Hardware Drivers Config"
-
+    config SOC_STM32H750_ARTPI
+        bool 
+        default y
+        
 menu "Board extended module"
 
     menuconfig ART_PI_USING_MEDIA_IO
diff --git a/bsp/stm32/stm32h750-artpi/board/SConscript b/bsp/stm32/stm32h750-artpi/board/SConscript
index 9f56c08d68..05ca23480e 100644
--- a/bsp/stm32/stm32h750-artpi/board/SConscript
+++ b/bsp/stm32/stm32h750-artpi/board/SConscript
@@ -11,7 +11,7 @@ list = os.listdir(cwd)
 # add the general drivers.
 src = Glob('board.c')
 src += Glob('CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c')
-
+src += Glob('port/drv_mpu.c')
 if GetDepend(['BSP_USING_QSPI_FLASH']):
     src += Glob('port/drv_qspi_flash.c')
 
diff --git a/bsp/stm32/stm32h750-artpi/board/port/drv_eth.c b/bsp/stm32/stm32h750-artpi/board/port/drv_eth.c
index ef86af17ca..2b09a65cfd 100644
--- a/bsp/stm32/stm32h750-artpi/board/port/drv_eth.c
+++ b/bsp/stm32/stm32h750-artpi/board/port/drv_eth.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2025 RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -117,7 +117,7 @@ static rt_err_t rt_stm32_eth_init(rt_device_t dev)
 {
     ETH_MACConfigTypeDef MACConf;
     uint32_t regvalue = 0;
-    uint8_t  status = RT_EOK;
+    rt_err_t  status = RT_EOK;
 
     __HAL_RCC_D2SRAM3_CLK_ENABLE();
 
@@ -357,7 +357,7 @@ struct pbuf *rt_stm32_eth_rx(rt_device_t dev)
         {
             for (q = p, l = 0; q != NULL; q = q->next)
             {
-                memcpy((rt_uint8_t *)q->payload, (rt_uint8_t *)&RxBuff.buffer[l], q->len);
+                rt_memcpy((rt_uint8_t *)q->payload, (rt_uint8_t *)&RxBuff.buffer[l], q->len);
                 l = l + q->len;
             }
         }
diff --git a/bsp/stm32/stm32h750-artpi/board/port/drv_eth.h b/bsp/stm32/stm32h750-artpi/board/port/drv_eth.h
index 3304de69a4..4f69cd252f 100644
--- a/bsp/stm32/stm32h750-artpi/board/port/drv_eth.h
+++ b/bsp/stm32/stm32h750-artpi/board/port/drv_eth.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2025 RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
diff --git a/bsp/stm32/stm32h750-artpi/board/port/drv_mpu.c b/bsp/stm32/stm32h750-artpi/board/port/drv_mpu.c
new file mode 100644
index 0000000000..b92483bedd
--- /dev/null
+++ b/bsp/stm32/stm32h750-artpi/board/port/drv_mpu.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2006-2025 RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-04-14     whj4674672   first version
+ */
+#include <rtthread.h>
+#include "stm32h7xx.h"
+#include "board.h"
+int mpu_init(void)
+{
+    MPU_Region_InitTypeDef MPU_InitStruct;
+
+    /* Disable the MPU */
+    HAL_MPU_Disable();
+
+    /* Configure the MPU attributes as WT for AXI SRAM */
+    MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress       = 0x24000000;
+    MPU_InitStruct.Size              = MPU_REGION_SIZE_512KB;
+    MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
+    MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
+    MPU_InitStruct.Number            = MPU_REGION_NUMBER0;
+    MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
+    MPU_InitStruct.SubRegionDisable  = 0X00;
+    MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+
+#ifdef BSP_USING_SDRAM
+    /* Configure the MPU attributes as WT for SDRAM */
+    MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress       = 0xC0000000;
+    MPU_InitStruct.Size              = MPU_REGION_SIZE_32MB;
+    MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
+    MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
+    MPU_InitStruct.Number            = MPU_REGION_NUMBER1;
+    MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
+    MPU_InitStruct.SubRegionDisable  = 0x00;
+    MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+#endif
+
+#ifdef BSP_USING_ETH_H750
+    /* Configure the MPU attributes as Device not cacheable
+       for ETH DMA descriptors and RX Buffers*/
+    MPU_InitStruct.Enable = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress = 0x30040000;
+    MPU_InitStruct.Size = MPU_REGION_SIZE_32KB;
+    MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
+    MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
+    MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
+    MPU_InitStruct.Number = MPU_REGION_NUMBER2;
+    MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
+    MPU_InitStruct.SubRegionDisable = 0x00;
+    MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+#endif
+
+    /* Configure the MPU attributes as WT for QSPI */
+    MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress       = 0x90000000;
+    MPU_InitStruct.Size              = MPU_REGION_SIZE_8MB;
+    MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
+    MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
+    MPU_InitStruct.Number            = MPU_REGION_NUMBER3;
+    MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
+    MPU_InitStruct.SubRegionDisable  = 0X00;
+    MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+
+    /* Enable the MPU */
+    HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
+
+    /* Enable CACHE */
+    SCB_EnableICache();
+    SCB_EnableDCache();
+
+    return RT_EOK;
+
+}
+INIT_BOARD_EXPORT(mpu_init);