diff options
| author | seteiro <[email protected]> | 2026-11-12 14:30:10 +0800 |
|---|---|---|
| committer | Rbb666 <[email protected]> | 2026-11-13 09:36:28 +0800 |
| commit | 84c972c858a35bef13aa5c76736292d8fa433f89 (patch) | |
| tree | 83d720f5ca4416ed6bd391b2d0ef9856feb0afe8 | |
| parent | 4b433918cdeb71ac9af08a47ee1e9923e8a09f85 (diff) | |
[libcpu][m23] skip MSP restore when VTOR is zero
| -rw-r--r-- | libcpu/arm/cortex-m23/context_gcc.S | 3 | ||||
| -rw-r--r-- | libcpu/arm/cortex-m23/context_iar.S | 3 | ||||
| -rw-r--r-- | libcpu/arm/cortex-m23/context_rvds.S | 3 |
3 files changed, 9 insertions, 0 deletions
diff --git a/libcpu/arm/cortex-m23/context_gcc.S b/libcpu/arm/cortex-m23/context_gcc.S index 03757a720b..e9aab94670 100644 --- a/libcpu/arm/cortex-m23/context_gcc.S +++ b/libcpu/arm/cortex-m23/context_gcc.S @@ -174,9 +174,12 @@ rt_hw_context_switch_to: /* restore MSP */ LDR R0, =SCB_VTOR LDR R0, [R0] + CMP R0, #0 + BEQ _restore_msp_done LDR R0, [R0] NOP MSR MSP, R0 +_restore_msp_done: /* enable interrupts at processor level */ CPSIE I diff --git a/libcpu/arm/cortex-m23/context_iar.S b/libcpu/arm/cortex-m23/context_iar.S index fa5d568440..ba58f10aff 100644 --- a/libcpu/arm/cortex-m23/context_iar.S +++ b/libcpu/arm/cortex-m23/context_iar.S @@ -180,9 +180,12 @@ rt_hw_context_switch_to: ; restore MSP LDR r0, =SCB_VTOR LDR r0, [r0] + CMP r0, #0 + BEQ _restore_msp_done LDR r0, [r0] NOP MSR msp, r0 +_restore_msp_done ; enable interrupts at processor level CPSIE I diff --git a/libcpu/arm/cortex-m23/context_rvds.S b/libcpu/arm/cortex-m23/context_rvds.S index 884b16357b..7918477073 100644 --- a/libcpu/arm/cortex-m23/context_rvds.S +++ b/libcpu/arm/cortex-m23/context_rvds.S @@ -184,8 +184,11 @@ rt_hw_context_switch_to PROC ; restore MSP LDR r0, =SCB_VTOR LDR r0, [r0] + CMP r0, #0 + BEQ _restore_msp_done LDR r0, [r0] MSR msp, r0 +_restore_msp_done ; enable interrupts at processor level CPSIE I |