diff options
| author | Bernard Xiong <[email protected]> | 2019-06-12 06:27:46 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2019-06-12 06:27:46 +0800 |
| commit | bcf77abad66aff5c7dfde8fbb601132ab4273697 (patch) | |
| tree | ce75b5db1dfe3f8e1c99010d5e47f7da43652f98 | |
| parent | 97ea1a3b6eb1a1b357acd25775aaac2d43683290 (diff) | |
| parent | 6a9fb353f7ad1234d3032d4c8e933da83bc0b88c (diff) | |
Merge pull request #2762 from SummerGGift/phy_check
[stm32][driver] Fix the problems of PHY status examination mentioned in issue #2756
| -rw-r--r-- | bsp/stm32/libraries/HAL_Drivers/drv_eth.c | 57 |
1 files changed, 37 insertions, 20 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_eth.c b/bsp/stm32/libraries/HAL_Drivers/drv_eth.c index 148a03f45b..ecac596d38 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_eth.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_eth.c @@ -7,6 +7,7 @@ * Date Author Notes * 2018-11-19 SummerGift first version * 2018-12-25 zylx fix some bugs + * 2019-06-10 SummerGift optimize PHY state detection process */ #include "board.h" @@ -382,7 +383,7 @@ void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) rt_err_t result; result = eth_device_ready(&(stm32_eth_device.parent)); if (result != RT_EOK) - LOG_E("RX err = %d", result); + LOG_I("RxCpltCallback err = %d", result); } void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) @@ -468,34 +469,50 @@ static void phy_monitor_thread_entry(void *parameter) while (1) { - HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BASIC_STATUS_REG, (uint32_t *)&status); - LOG_D("PHY BASIC STATUS REG:0x%04X", status); - phy_speed_new = 0; - if (status & (PHY_AUTONEGO_COMPLETE_MASK | PHY_LINKED_STATUS_MASK)) + if(HAL_ETH_ReadPHYRegister(&EthHandle, PHY_BASIC_STATUS_REG, (uint32_t *)&status) == HAL_OK) { - rt_uint32_t SR; + LOG_D("PHY BASIC STATUS REG:0x%04X", status); + + if (status & (PHY_AUTONEGO_COMPLETE_MASK | PHY_LINKED_STATUS_MASK)) + { + rt_uint32_t SR; - phy_speed_new = PHY_LINK_MASK; + phy_speed_new = PHY_LINK_MASK; - SR = HAL_ETH_ReadPHYRegister(&EthHandle, PHY_Status_REG, (uint32_t *)&SR); - LOG_D("PHY Control/Status REG:0x%04X ", SR); + if(HAL_ETH_ReadPHYRegister(&EthHandle, PHY_Status_REG, (uint32_t *)&SR) == HAL_OK) + { + LOG_D("PHY Control/Status REG:0x%04X ", SR); - if (SR & PHY_100M_MASK) - { - phy_speed_new |= PHY_100M_MASK; - } - else if (SR & PHY_10M_MASK) - { - phy_speed_new |= PHY_10M_MASK; - } + if (SR & PHY_100M_MASK) + { + phy_speed_new |= PHY_100M_MASK; + } + else if (SR & PHY_10M_MASK) + { + phy_speed_new |= PHY_10M_MASK; + } - if (SR & PHY_FULL_DUPLEX_MASK) - { - phy_speed_new |= PHY_FULL_DUPLEX_MASK; + if (SR & PHY_FULL_DUPLEX_MASK) + { + phy_speed_new |= PHY_FULL_DUPLEX_MASK; + } + } + else + { + LOG_D("PHY PHY_Status_REG read error."); + rt_thread_mdelay(100); + continue; + } } } + else + { + LOG_D("PHY_BASIC_STATUS_REG read error."); + rt_thread_mdelay(100); + continue; + } /* linkchange */ if (phy_speed_new != phy_speed) |