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authorBright Pan <[email protected]>2014-11-25 01:08:13 +0800
committerBright Pan <[email protected]>2014-11-25 01:08:13 +0800
commitd50ab16e6fe43d236d36893edb8b97d600716fb9 (patch)
tree7152d464461fab4359ff16ff87219136ef74be81
parent9957f94d0b7ebd5ec54a7ea98f91a1b658d9a6b9 (diff)
Port to gcc and fix keil project
-rw-r--r--bsp/nuvoton_m05x/Libraries/CMSIS/Nuvoton/M051Series/Source/GCC/startup_M051Series.s275
-rw-r--r--bsp/nuvoton_m05x/Libraries/SConscript6
-rw-r--r--bsp/nuvoton_m05x/Libraries/StdDriver/src/retarget.c434
-rw-r--r--bsp/nuvoton_m05x/nuvoton_m05x.ld8
-rw-r--r--bsp/nuvoton_m05x/project.uvprojx27
-rw-r--r--bsp/nuvoton_m05x/rtconfig.py13
-rw-r--r--bsp/nuvoton_m05x/template.uvprojx2
7 files changed, 299 insertions, 466 deletions
diff --git a/bsp/nuvoton_m05x/Libraries/CMSIS/Nuvoton/M051Series/Source/GCC/startup_M051Series.s b/bsp/nuvoton_m05x/Libraries/CMSIS/Nuvoton/M051Series/Source/GCC/startup_M051Series.s
new file mode 100644
index 0000000000..d59bf9570f
--- /dev/null
+++ b/bsp/nuvoton_m05x/Libraries/CMSIS/Nuvoton/M051Series/Source/GCC/startup_M051Series.s
@@ -0,0 +1,275 @@
+/**
+ ******************************************************************************
+ * @file startup_M051Series.s
+ * @author RT-Thread Develop Team
+ * @version V1.0.0
+ * @date 2014-11-24
+ * @brief M051Series Devices vector table for GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M0 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+*/
+
+ .syntax unified
+ .cpu cortex-m0
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+ /* Unlock Register */
+ ldr r0, =0x50000100
+ ldr r1, =0x59
+ str r1, [R0]
+ ldr r1, =0x16
+ str r1, [R0]
+ ldr r1, =0x88
+ str r1, [r0]
+
+ /* Init POR */
+ ldr r2, =0x50000024
+ ldr r1, =0x00005AA5
+ str r1, [r2]
+
+ /* Lock register */
+ movs r1, #0
+ str r1, [r0]
+
+ /* Copy the data segment initializers from flash to SRAM */
+ movs r1, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r3, =_sidata
+ ldr r3, [r3, r1]
+ str r3, [r0, r1]
+ adds r1, r1, #4
+
+LoopCopyDataInit:
+ ldr r0, =_sdata
+ ldr r3, =_edata
+ adds r2, r0, r1
+ cmp r2, r3
+ bcc CopyDataInit
+ ldr r2, =_sbss
+ b LoopFillZerobss
+/* Zero fill the bss segment. */
+FillZerobss:
+ movs r3, #0
+ str r3, [r2, #4]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ ldr r3, = _ebss
+ cmp r2, r3
+ bcc FillZerobss
+ /* Call the clock system intitialization function.*/
+ bl SystemInit
+ /* Call the application's entry point.*/
+ bl main
+ bx lr
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/*******************************************************************************
+*
+* The minimal vector table for a Cortex M0. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word 0
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ /* External Interrupts */
+ /* maximum of 32 External Interrupts are possible */
+ .word BOD_IRQHandler
+ .word WDT_IRQHandler
+ .word EINT0_IRQHandler
+ .word EINT1_IRQHandler
+ .word GPIOP0P1_IRQHandler
+ .word GPIOP2P3P4_IRQHandler
+ .word PWMA_IRQHandler
+ .word PWMB_IRQHandler
+ .word TMR0_IRQHandler
+ .word TMR1_IRQHandler
+ .word TMR2_IRQHandler
+ .word TMR3_IRQHandler
+ .word UART0_IRQHandler
+ .word UART1_IRQHandler
+ .word SPI0_IRQHandler
+ .word SPI1_IRQHandler
+ .word 0
+ .word 0
+ .word I2C0_IRQHandler
+ .word I2C1_IRQHandler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word ACMP01_IRQHandler
+ .word ACMP23_IRQHandler
+ .word 0
+ .word PWRWU_IRQHandler
+ .word ADC_IRQHandler
+ .word 0
+ .word RTC_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak BOD_IRQHandler
+ .thumb_set BOD_IRQHandler,Default_Handler
+
+ .weak WDT_IRQHandler
+ .thumb_set WDT_IRQHandler,Default_Handler
+
+ .weak EINT0_IRQHandler
+ .thumb_set EINT0_IRQHandler,Default_Handler
+
+ .weak EINT1_IRQHandler
+ .thumb_set EINT1_IRQHandler,Default_Handler
+
+ .weak GPIOP0P1_IRQHandler
+ .thumb_set GPIOP0P1_IRQHandler,Default_Handler
+
+ .weak GPIOP2P3P4_IRQHandler
+ .thumb_set GPIOP2P3P4_IRQHandler,Default_Handler
+
+ .weak PWMA_IRQHandler
+ .thumb_set PWMA_IRQHandler,Default_Handler
+
+ .weak PWMB_IRQHandler
+ .thumb_set PWMB_IRQHandler,Default_Handler
+
+ .weak TMR0_IRQHandler
+ .thumb_set TMR0_IRQHandler,Default_Handler
+
+ .weak TMR1_IRQHandler
+ .thumb_set TMR1_IRQHandler,Default_Handler
+
+ .weak TMR2_IRQHandler
+ .thumb_set TMR2_IRQHandler,Default_Handler
+
+ .weak TMR3_IRQHandler
+ .thumb_set TMR3_IRQHandler,Default_Handler
+
+ .weak UART0_IRQHandler
+ .thumb_set UART0_IRQHandler,Default_Handler
+
+ .weak UART1_IRQHandler
+ .thumb_set UART1_IRQHandler,Default_Handler
+
+ .weak SPI0_IRQHandler
+ .thumb_set SPI0_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak I2C0_IRQHandler
+ .thumb_set I2C0_IRQHandler,Default_Handler
+
+ .weak I2C1_IRQHandler
+ .thumb_set I2C1_IRQHandler,Default_Handler
+
+ .weak ACMP01_IRQHandler
+ .thumb_set ACMP01_IRQHandler,Default_Handler
+
+ .weak ACMP23_IRQHandler
+ .thumb_set ACMP23_IRQHandler,Default_Handler
+
+ .weak PWRWU_IRQHandler
+ .thumb_set PWRWU_IRQHandler,Default_Handler
+
+ .weak ADC_IRQHandler
+ .thumb_set ADC_IRQHandler,Default_Handler
+
+ .weak RTC_IRQHandler
+ .thumb_set RTC_IRQHandler,Default_Handler
+
+/************************ END OF FILE ***********************/
+
diff --git a/bsp/nuvoton_m05x/Libraries/SConscript b/bsp/nuvoton_m05x/Libraries/SConscript
index af63c0d710..65758b13d8 100644
--- a/bsp/nuvoton_m05x/Libraries/SConscript
+++ b/bsp/nuvoton_m05x/Libraries/SConscript
@@ -17,15 +17,15 @@ if rtconfig.CROSS_TOOL == 'iar':
src = src + ['CMSIS/Nuvoton/M051Series/Source/IAR/startup_M051Series.s']
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['CMSIS/Nuvoton/M051Series/Source/ARM/startup_M051Series.s']
-#elif rtconfig.CROSS_TOOL == 'gcc': // not support gcc
-# src = src + ['CMSIS/ST/STM32F0xx/Source/Templates/gcc_ride7/startup_stm32f0xx.s']
+elif rtconfig.CROSS_TOOL == 'gcc':
+ src = src + ['CMSIS/Nuvoton/M051Series/Source/GCC/startup_M051Series.s']
path = [cwd + '/StdDriver/inc',
cwd + '/CMSIS/Nuvoton/M051Series/Include',
cwd + '/CMSIS/Include']
#CPPDEFINES = ['USE_STDPERIPH_DRIVER', rtconfig.STM32_TYPE]
-CPPDEFINES = ['']
+CPPDEFINES = ['INIT_SYSCLK_AT_BOOTING']
group = DefineGroup('M05X_StdPeriph', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')
diff --git a/bsp/nuvoton_m05x/Libraries/StdDriver/src/retarget.c b/bsp/nuvoton_m05x/Libraries/StdDriver/src/retarget.c
deleted file mode 100644
index e487900e8c..0000000000
--- a/bsp/nuvoton_m05x/Libraries/StdDriver/src/retarget.c
+++ /dev/null
@@ -1,434 +0,0 @@
-/**************************************************************************//**
- * @file retarget.c
- * @version V3.00
- * $Revision: 10 $
- * $Date: 14/01/27 11:41a $
- * @brief M051 Series Debug Port and Semihost Setting Source File
- *
- * @note
- * Copyright (C) 2011 Nuvoton Technology Corp. All rights reserved.
- *
- ******************************************************************************/
-
-
-#include <stdio.h>
-#include "M051Series.h"
-
-#if defined ( __CC_ARM )
-#if (__ARMCC_VERSION < 400000)
-#else
-/* Insist on keeping widthprec, to avoid X propagation by benign code in C-lib */
-#pragma import _printf_widthprec
-#endif
-#endif
-
-/*---------------------------------------------------------------------------------------------------------*/
-/* Global variables */
-/*---------------------------------------------------------------------------------------------------------*/
-#if !(defined(__ICCARM__) && (__VER__ >= 6010000))
-struct __FILE
-{
- int handle; /* Add whatever you need here */
-};
-#endif
-FILE __stdout;
-FILE __stdin;
-
-/*---------------------------------------------------------------------------------------------------------*/
-/* Routine to write a char */
-/*---------------------------------------------------------------------------------------------------------*/
-
-#if defined(DEBUG_ENABLE_SEMIHOST)
-/* The static buffer is used to speed up the semihost */
-static char g_buf[16];
-static char g_buf_len = 0;
-
-# if defined(__ICCARM__)
-
-
-/**
- * @brief This HardFault handler is implemented to support semihost
- *
- * @param None
- *
- * @returns None
- *
- * @details This function is implement to support semihost message print.
- *
- */
-int32_t HardFault_Handler(void)
-{
- asm("MOV R0, lr \n"
- "LSLS R0, #29 \n" //; Check bit 2
- "BMI SP_is_PSP \n" //; previous stack is PSP
- "MRS R0, MSP \n" //; previous stack is MSP, read MSP
- "B SP_Read_Ready \n"
- "SP_is_PSP: \n"
- "MRS R0, PSP \n" //; Read PSP
- "SP_Read_Ready: \n"
- "LDR R1, [R0, #24] \n" //; Get previous PC
- "LDRH R3, [R1] \n" //; Get instruction
- "LDR R2, [pc, #8] \n" //; The specific BKPT instruction
- "CMP R3, R2 \n" //; Test if the instruction at previous PC is BKPT
- "BNE HardFault_Handler_Ret\n" //; Not BKPT
- "ADDS R1, #4 \n" //; Skip BKPT and next line
- "STR R1, [R0, #24] \n" //; Save previous PC
- "BX lr \n" //; Return
- "DCD 0xBEAB \n" //; BKPT instruction code
- "HardFault_Handler_Ret:\n"
- );
-
- /* TODO: Implement your own hard fault handler here. */
- while(1);
-}
-
-/**
- *
- * @brief The function to process semihosted command
- * @param[in] n32In_R0 : semihost register 0
- * @param[in] n32In_R1 : semihost register 1
- * @param[out] pn32Out_R0: semihost register 0
- * @retval 0: No ICE debug
- * @retval 1: ICE debug
- *
- */
-int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0)
-{
- asm("BKPT 0xAB \n" //; This instruction will cause ICE trap or system HardFault
- "B SH_ICE \n"
- "SH_HardFault: \n" //; Captured by HardFault
- "MOVS R0, #0 \n" //; Set return value to 0
- "BX lr \n" //; Return
- "SH_ICE: \n" //; Captured by ICE
- "CMP R2, #0 \n"
- "BEQ SH_End \n"
- "STR R0, [R2]\n" //; Save the return value to *pn32Out_R0
- "SH_End: \n");
-
- return 1; //; Return 1 when it is trap by ICE
-
-}
-
-
-# else
-
-/**
- * @brief This HardFault handler is implemented to support semihost
- *
- * @param None
- *
- * @returns None
- *
- * @details This function is implement to support semihost message print.
- *
- */
-__asm int32_t HardFault_Handler(void)
-{
-
- MOV R0, LR
- LSLS R0, #29 //; Check bit 2
- BMI SP_is_PSP //; previous stack is PSP
- MRS R0, MSP //; previous stack is MSP, read MSP
- B SP_Read_Ready
-SP_is_PSP
- MRS R0, PSP //; Read PSP
-
-SP_Read_Ready
- LDR R1, [R0, #24] //; Get previous PC
- LDRH R3, [R1] //; Get instruction
- LDR R2, = 0xBEAB //; The specific BKPT instruction
- CMP R3, R2 //; Test if the instruction at previous PC is BKPT
- BNE HardFault_Handler_Ret //; Not BKPT
-
- ADDS R1, #4 //; Skip BKPT and next line
- STR R1, [R0, #24] //; Save previous PC
-
- BX LR //; Return
-HardFault_Handler_Ret
-
- /* TODO: Implement your own hard fault handler here. */
- B .
-
- ALIGN
-}
-
-/**
- *
- * @brief The function to process semihosted command
- * @param[in] n32In_R0 : semihost register 0
- * @param[in] n32In_R1 : semihost register 1
- * @param[out] pn32Out_R0: semihost register 0
- * @retval 0: No ICE debug
- * @retval 1: ICE debug
- *
- */
-__asm int32_t SH_DoCommand(int32_t n32In_R0, int32_t n32In_R1, int32_t *pn32Out_R0)
-{
- BKPT 0xAB //; Wait ICE or HardFault
- //; ICE will step over BKPT directly
- //; HardFault will step BKPT and the next line
- B SH_ICE
-
-SH_HardFault //; Captured by HardFault
- MOVS R0, #0 //; Set return value to 0
- BX lr //; Return
-
-SH_ICE //; Captured by ICE
- //; Save return value
- CMP R2, #0
- BEQ SH_End
- STR R0, [R2] //; Save the return value to *pn32Out_R0
-
-SH_End
- MOVS R0, #1 //; Set return value to 1
- BX lr //; Return
-}
-#endif
-#endif
-
-
-/**
- * @brief Routine to send a char
- *
- * @param None
- *
- * @returns Send value from UART debug port
- *
- * @details Send a target char to UART debug port .
- */
-
-void SendChar_ToUART(int ch)
-{
-
- while(DEBUG_PORT->FSR & UART_FSR_TX_FULL_Msk);
- DEBUG_PORT->DATA = ch;
- if(ch == '\n')
- {
- while(DEBUG_PORT->FSR & UART_FSR_TX_FULL_Msk);
- DEBUG_PORT->DATA = '\r';
- }
-}
-
-/**
- * @brief Routine to send a char
- *
- * @param None
- *
- * @returns Send value from UART debug port or semihost
- *
- * @details Send a target char to UART debug port or semihost.
- */
-void SendChar(int ch)
-{
-#if defined(DEBUG_ENABLE_SEMIHOST)
- g_buf[g_buf_len++] = ch;
- g_buf[g_buf_len] = '\0';
- if(g_buf_len + 1 >= sizeof(g_buf) || ch == '\n' || ch == '\0')
- {
- /* Send the char */
- if(SH_DoCommand(0x04, (int)g_buf, NULL) != 0)
- {
- g_buf_len = 0;
- return;
- }
- else
- {
- int i;
-
- for(i = 0; i < g_buf_len; i++)
- SendChar_ToUART(g_buf[i]);
- g_buf_len = 0;
- }
- }
-#else
- SendChar_ToUART(ch);
-#endif
-}
-
-/**
- * @brief Routine to get a char
- *
- * @param None
- *
- * @returns Get value from UART debug port or semihost
- *
- * @details Wait UART debug port or semihost to input a char.
- */
-char GetChar(void)
-{
-#ifdef DEBUG_ENABLE_SEMIHOST
-# if defined (__CC_ARM)
- int nRet;
- while(SH_DoCommand(0x101, 0, &nRet) != 0)
- {
- if(nRet != 0)
- {
- SH_DoCommand(0x07, 0, &nRet);
- return (char)nRet;
- }
- }
-# else
- int nRet;
- while(SH_DoCommand(0x7, 0, &nRet) != 0)
- {
- if(nRet != 0)
- return (char)nRet;
- }
-# endif
- return (0);
-#else
-
- while(1)
- {
- if((DEBUG_PORT->FSR & UART_FSR_RX_EMPTY_Msk) == 0)
- {
- return (DEBUG_PORT->DATA);
- }
- }
-
-#endif
-}
-
-/**
- * @brief Check any char input from UART
- *
- * @param None
- *
- * @retval 1: No any char input
- * @retval 0: Have some char input
- *
- * @details Check UART RSR RX EMPTY or not to determine if any char input from UART
- */
-
-int kbhit(void)
-{
- return !((DEBUG_PORT->FSR & UART_FSR_RX_EMPTY_Msk) == 0);
-}
-/**
- * @brief Check if debug message finished
- *
- * @param None
- *
- * @retval 1: Message is finished
- * @retval 0: Message is transmitting.
- *
- * @details Check if message finished (FIFO empty of debug port)
- */
-
-int IsDebugFifoEmpty(void)
-{
- return ((DEBUG_PORT->FSR & UART_FSR_TE_FLAG_Msk) != 0);
-}
-
-/**
- * @brief C library retargetting
- *
- * @param None
- *
- * @returns None
- *
- * @details Check if message finished (FIFO empty of debug port)
- */
-
-void _ttywrch(int ch)
-{
- SendChar(ch);
- return;
-}
-
-
-/**
- * @brief Write character to stream
- *
- * @param[in] ch Character to be written. The character is passed as its int promotion.
- * @param[in] stream Pointer to a FILE object that identifies the stream where the character is to be written.
- *
- * @returns If there are no errors, the same character that has been written is returned.
- * If an error occurs, EOF is returned and the error indicator is set (see ferror).
- *
- * @details Writes a character to the stream and advances the position indicator.\n
- * The character is written at the current position of the stream as indicated \n
- * by the internal position indicator, which is then advanced one character.
- *
- * @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/fputc/.
- *
- *
- */
-
-int fputc(int ch, FILE *stream)
-{
- SendChar(ch);
- return ch;
-}
-
-
-/**
- * @brief Get character from UART debug port or semihosting input
- *
- * @param[in] stream Pointer to a FILE object that identifies the stream on which the operation is to be performed.
- *
- * @returns The character read from UART debug port or semihosting
- *
- * @details For get message from debug port or semihosting.
- *
- */
-
-int fgetc(FILE *stream)
-{
- return (GetChar());
-}
-
-/**
- * @brief Check error indicator
- *
- * @param[in] stream Pointer to a FILE object that identifies the stream.
- *
- * @returns If the error indicator associated with the stream was set, the function returns a nonzero value.
- * Otherwise, it returns a zero value.
- *
- * @details Checks if the error indicator associated with stream is set, returning a value different
- * from zero if it is. This indicator is generally set by a previous operation on the stream that failed.
- *
- * @note The above descriptions are copied from http://www.cplusplus.com/reference/clibrary/cstdio/ferror/.
- *
- */
-
-int ferror(FILE *stream)
-{
- return EOF;
-}
-
-#ifdef DEBUG_ENABLE_SEMIHOST
-# ifdef __ICCARM__
-void __exit(int return_code)
-{
-
- /* Check if link with ICE */
- if(SH_DoCommand(0x18, 0x20026, NULL) == 0)
- {
- /* Make sure all message is print out */
- while(IsDebugFifoEmpty() == 0);
- }
-label:
- goto label; /* endless loop */
-}
-# else
-void _sys_exit(int return_code)
-{
-
- /* Check if link with ICE */
- if(SH_DoCommand(0x18, 0x20026, NULL) == 0)
- {
- /* Make sure all message is print out */
- while(IsDebugFifoEmpty() == 0);
- }
-label:
- goto label; /* endless loop */
-}
-# endif
-#endif
-
-
-
-
-
diff --git a/bsp/nuvoton_m05x/nuvoton_m05x.ld b/bsp/nuvoton_m05x/nuvoton_m05x.ld
index 6070bf4af6..72cdfe6507 100644
--- a/bsp/nuvoton_m05x/nuvoton_m05x.ld
+++ b/bsp/nuvoton_m05x/nuvoton_m05x.ld
@@ -1,13 +1,13 @@
/*
- * linker script for STM32F0x with GNU ld
- * bernard.xiong 2009-10-14
+ * linker script for M051X with GNU ld
+ * Bright 2014-11-24
*/
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
- CODE (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */
- DATA (rw) : ORIGIN = 0x20000000, LENGTH = 8k /* 8K sram */
+ CODE (rx) : ORIGIN = 0x00000000, LENGTH = 64k /* 64KB flash */
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 4k /* 4K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x100;
diff --git a/bsp/nuvoton_m05x/project.uvprojx b/bsp/nuvoton_m05x/project.uvprojx
index 67cde697ec..8972ab2de9 100644
--- a/bsp/nuvoton_m05x/project.uvprojx
+++ b/bsp/nuvoton_m05x/project.uvprojx
@@ -14,7 +14,7 @@
<TargetCommonOption>
<Device>(Generic) M051 Series</Device>
<Vendor>Nuvoton</Vendor>
- <Cpu>CLOCK(50000000) CPUTYPE("Cortex-M0")</Cpu>
+ <Cpu>IRAM(0x20000000-0x20000FFF) IROM(0-0xFFFF) CLOCK(50000000) CPUTYPE("Cortex-M0")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"Startup\Nuvoton\M051Series\startup_M051Series.s" ("Nuvoton M05X Startup Code")</StartupFile>
<FlashDriverDll></FlashDriverDll>
@@ -29,7 +29,7 @@
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
- <SFDFile>SFD\Nuvoton\M05x_v1.SFR</SFDFile>
+ <SFDFile>SFD\Nuvoton\M051AN_v1.SFR</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
@@ -44,14 +44,14 @@
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
- <OutputDirectory>.\obj\</OutputDirectory>
+ <OutputDirectory>.\build\</OutputDirectory>
<OutputName>rt-thread</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
- <ListingPath>.\lst\</ListingPath>
+ <ListingPath>.\build\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
@@ -207,26 +207,26 @@
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
+ <RvctClst>1</RvctClst>
+ <GenPPlst>1</GenPPlst>
<AdsCpuType>"Cortex-M0"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
- <hadIROM>0</hadIROM>
- <hadIRAM>0</hadIRAM>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
- <StupSel>0</StupSel>
+ <StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
- <RoSelD>0</RoSelD>
- <RwSelD>5</RwSelD>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
@@ -482,11 +482,6 @@
<FilePath>Libraries\StdDriver\src\pwm.c</FilePath>
</File>
<File>
- <FileName>retarget.c</FileName>
- <FileType>1</FileType>
- <FilePath>Libraries\StdDriver\src\retarget.c</FilePath>
- </File>
- <File>
<FileName>spi.c</FileName>
<FileType>1</FileType>
<FilePath>Libraries\StdDriver\src\spi.c</FilePath>
diff --git a/bsp/nuvoton_m05x/rtconfig.py b/bsp/nuvoton_m05x/rtconfig.py
index 7ebee5ade0..f136d42a93 100644
--- a/bsp/nuvoton_m05x/rtconfig.py
+++ b/bsp/nuvoton_m05x/rtconfig.py
@@ -17,16 +17,13 @@ elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil'
elif CROSS_TOOL == 'gcc':
- print '================ERROR============================'
- print 'Not support gcc yet!'
- print '================================================='
- exit(0)
+ PLATFORM = 'gcc'
+ EXEC_PATH = 'C:/GCC'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
-STM32_TYPE = 'STM32F0XX'
if PLATFORM == 'gcc':
# toolchains
@@ -35,13 +32,13 @@ if PLATFORM == 'gcc':
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
- TARGET_EXT = 'axf'
+ TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
- CFLAGS = DEVICE
+ CFLAGS = DEVICE + ' -std=gnu9x'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-nuvoton_m05x.map,-cref,-u,Reset_Handler -T nuvoton_m05x.ld'
@@ -54,7 +51,7 @@ if PLATFORM == 'gcc':
else:
CFLAGS += ' -O2'
- POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread-nuvoton_m05x.bin\n' + SIZE + ' $TARGET \n'
+ POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread-nuvoton_m05x.bin\n' + OBJCPY + ' -O ihex $TARGET rtthread-nuvoton_m05x.hex\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
diff --git a/bsp/nuvoton_m05x/template.uvprojx b/bsp/nuvoton_m05x/template.uvprojx
index cdd969a1e9..27ea8e8f54 100644
--- a/bsp/nuvoton_m05x/template.uvprojx
+++ b/bsp/nuvoton_m05x/template.uvprojx
@@ -361,7 +361,7 @@
<useXO>0</useXO>
<VariousControls>
<MiscControls></MiscControls>
- <Define></Define>
+ <Define>INIT_SYSCLK_AT_BOOTING</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>