diff options
| author | armink <[email protected]> | 2019-03-14 20:37:30 +0800 |
|---|---|---|
| committer | armink <[email protected]> | 2019-03-14 20:37:30 +0800 |
| commit | dba2b47d45d8b46a960110d1d7d0549d40d17abb (patch) | |
| tree | 66b0104ff833d11ed24f1791a0939b6c5ae38527 | |
| parent | 4a34b41dd682b2f3b0132713dff7bd61cc80def9 (diff) | |
Sync from master (fc5cfe0a5e5709878f50b904df7c3355078941dd)
450 files changed, 46787 insertions, 4053 deletions
diff --git a/.travis.yml b/.travis.yml index 5255e49800..78b8ad0dce 100644 --- a/.travis.yml +++ b/.travis.yml @@ -18,9 +18,6 @@ before_script: - export RTT_ROOT=`pwd` - "[ x$RTT_CC == x ] && export RTT_CC='gcc' || true" -script: - - scons -C bsp/$RTT_BSP - env: # - RTT_BSP='simulator' RTT_CC='clang-analyze' RTT_EXEC_PATH=/usr/share/clang/scan-build - RTT_BSP='CME_M7' RTT_TOOL_CHAIN='sourcery-arm' @@ -110,3 +107,7 @@ env: - RTT_BSP='frdm-k64f' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='fh8620' RTT_TOOL_CHAIN='sourcery-arm' - RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips' + +stage: compile +script: + - scons -C bsp/$RTT_BSP diff --git a/bsp/CME_M7/rtconfig.h b/bsp/CME_M7/rtconfig.h index 886c28cb9e..f65f6f7600 100644 --- a/bsp/CME_M7/rtconfig.h +++ b/bsp/CME_M7/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK /* Using Hook */ diff --git a/bsp/allwinner_tina/.config b/bsp/allwinner_tina/.config index de547c5a34..2c39e4435e 100644 --- a/bsp/allwinner_tina/.config +++ b/bsp/allwinner_tina/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/allwinner_tina/drivers/drv_gpio.c b/bsp/allwinner_tina/drivers/drv_gpio.c index 2c3b6e1865..e8d82a3fae 100644 --- a/bsp/allwinner_tina/drivers/drv_gpio.c +++ b/bsp/allwinner_tina/drivers/drv_gpio.c @@ -27,13 +27,10 @@ #include "drv_gpio.h" #include "interrupt.h" -#define DBG_ENABLE #define DBG_SECTION_NAME "GPIO" #define DBG_LEVEL DBG_WARNING -#define DBG_COLOR #include <rtdbg.h> - #define readl(addr) (*(volatile unsigned int *)(addr)) #define writel(value,addr) (*(volatile unsigned int *)(addr) = (value)) diff --git a/bsp/allwinner_tina/drivers/drv_sdio.c b/bsp/allwinner_tina/drivers/drv_sdio.c index 12cb437f42..c1b4bcc41c 100644 --- a/bsp/allwinner_tina/drivers/drv_sdio.c +++ b/bsp/allwinner_tina/drivers/drv_sdio.c @@ -32,13 +32,12 @@ #include "drv_gpio.h" #include "drv_clock.h" -#define DBG_ENABLE + #define DBG_SECTION_NAME "MMC" // #define DBG_LEVEL DBG_LOG // #define DBG_LEVEL DBG_INFO #define DBG_LEVEL DBG_WARNING // #define DBG_LEVEL DBG_ERROR -#define DBG_COLOR #include <rtdbg.h> #ifdef RT_USING_SDIO diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi.c b/bsp/allwinner_tina/drivers/spi/drv_spi.c index 6e76cbec3e..a271c2e7d9 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi.c @@ -35,14 +35,12 @@ //#define DEBUG -#define DBG_ENABLE #define DBG_SECTION_NAME "SPI" #ifdef DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_WARNING #endif /* DEBUG */ -#define DBG_COLOR #include <rtdbg.h> #ifdef RT_USING_SPI diff --git a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c index 6dc1b1b334..0b01200ee8 100644 --- a/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c +++ b/bsp/allwinner_tina/drivers/spi/drv_spi_flash.c @@ -26,10 +26,8 @@ #include <rthw.h> #include <rtdevice.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "FLASH" #define DBG_LEVEL DBG_LOG -#define DBG_COLOR #include <rtdbg.h> #define SPI_FLASH_DEVICE_NAME "spi00" diff --git a/bsp/allwinner_tina/rtconfig.h b/bsp/allwinner_tina/rtconfig.h index 25a1302b1a..b9221509b4 100644 --- a/bsp/allwinner_tina/rtconfig.h +++ b/bsp/allwinner_tina/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/amebaz/.config b/bsp/amebaz/.config index 9412058c8e..ceaafae7a1 100644 --- a/bsp/amebaz/.config +++ b/bsp/amebaz/.config @@ -21,6 +21,7 @@ CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=1024 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/amebaz/drivers/wlan/drv_wifi.c b/bsp/amebaz/drivers/wlan/drv_wifi.c index 7e62ed1acf..753952df43 100644 --- a/bsp/amebaz/drivers/wlan/drv_wifi.c +++ b/bsp/amebaz/drivers/wlan/drv_wifi.c @@ -28,10 +28,8 @@ #include "drv_wlan.h" #include "drv_wifi.h" -#define DBG_ENABLE #define DBG_LEVEL DBG_INFO #define DBG_SECTION_NAME "WIFI" -#define DBG_COLOR #include <rtdbg.h> #define MAX_ADDR_LEN (6) diff --git a/bsp/amebaz/rtconfig.h b/bsp/amebaz/rtconfig.h index 92bac2d294..f018b43d9d 100644 --- a/bsp/amebaz/rtconfig.h +++ b/bsp/amebaz/rtconfig.h @@ -19,6 +19,7 @@ #define RT_TIMER_THREAD_PRIO 4 #define RT_TIMER_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/apollo2/rtconfig.h b/bsp/apollo2/rtconfig.h index dfa458bc4e..d8ac639c86 100644 --- a/bsp/apollo2/rtconfig.h +++ b/bsp/apollo2/rtconfig.h @@ -11,6 +11,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 500 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/asm9260t/.config b/bsp/asm9260t/.config index e634c994c8..04964a8375 100644 --- a/bsp/asm9260t/.config +++ b/bsp/asm9260t/.config @@ -11,6 +11,7 @@ CONFIG_RT_ALIGN_SIZE=4 CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 # CONFIG_RT_DEBUG_THREAD is not set diff --git a/bsp/asm9260t/rtconfig.h b/bsp/asm9260t/rtconfig.h index bf1f76fefb..8ca5daa565 100644 --- a/bsp/asm9260t/rtconfig.h +++ b/bsp/asm9260t/rtconfig.h @@ -11,6 +11,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 /* RT_DEBUG_THREAD is not set */ diff --git a/bsp/at91sam9260/.config b/bsp/at91sam9260/.config index a19ac15d3d..c669ac5fe1 100644 --- a/bsp/at91sam9260/.config +++ b/bsp/at91sam9260/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/at91sam9260/rtconfig.h b/bsp/at91sam9260/rtconfig.h index 816054c3e1..0c6e595e5e 100755 --- a/bsp/at91sam9260/rtconfig.h +++ b/bsp/at91sam9260/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/beaglebone/.config b/bsp/beaglebone/.config index 409e89d18e..784324cf75 100644 --- a/bsp/beaglebone/.config +++ b/bsp/beaglebone/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/beaglebone/rtconfig.h b/bsp/beaglebone/rtconfig.h index c49528049d..00460b5566 100644 --- a/bsp/beaglebone/rtconfig.h +++ b/bsp/beaglebone/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/ck802/.config b/bsp/ck802/.config index e91f93fd0e..3bd8636aae 100644 --- a/bsp/ck802/.config +++ b/bsp/ck802/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/ck802/rtconfig.h b/bsp/ck802/rtconfig.h index 076d48e534..4e3b217f93 100644 --- a/bsp/ck802/rtconfig.h +++ b/bsp/ck802/rtconfig.h @@ -12,6 +12,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/dm365/.config b/bsp/dm365/.config index 6974ff8ae0..761ecf2cf1 100644 --- a/bsp/dm365/.config +++ b/bsp/dm365/.config @@ -21,6 +21,7 @@ CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=8 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/dm365/rtconfig.h b/bsp/dm365/rtconfig.h index 4f3698f124..5fc198c0cf 100644 --- a/bsp/dm365/rtconfig.h +++ b/bsp/dm365/rtconfig.h @@ -21,6 +21,7 @@ #define RT_TIMER_THREAD_PRIO 8 #define RT_TIMER_THREAD_STACK_SIZE 512 #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/efm32/rtconfig.h b/bsp/efm32/rtconfig.h index 882e36f396..4ee9bf1a8e 100644 --- a/bsp/efm32/rtconfig.h +++ b/bsp/efm32/rtconfig.h @@ -35,6 +35,7 @@ /* SECTION: RT_DEBUG */ #define RT_DEBUG +#define RT_DEBUG_COLOR //#define RT_DEBUG_MEM (1) //#define RT_DEBUG_SCHEDULER (1) //#define RT_DEBUG_IPC (1) diff --git a/bsp/fh8620/rtconfig.h b/bsp/fh8620/rtconfig.h index 01a2d2d45c..ea210a4703 100644 --- a/bsp/fh8620/rtconfig.h +++ b/bsp/fh8620/rtconfig.h @@ -24,6 +24,7 @@ #define RT_USING_CPU_FFS // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/frdm-k64f/rtconfig.h b/bsp/frdm-k64f/rtconfig.h index 8d0ad639ce..6338b39edb 100644 --- a/bsp/frdm-k64f/rtconfig.h +++ b/bsp/frdm-k64f/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/gd32303e-eval/.config b/bsp/gd32303e-eval/.config index b61d310f03..40cac74cf7 100644 --- a/bsp/gd32303e-eval/.config +++ b/bsp/gd32303e-eval/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/gd32303e-eval/rtconfig.h b/bsp/gd32303e-eval/rtconfig.h index 479ad99af5..77e9056395 100644 --- a/bsp/gd32303e-eval/rtconfig.h +++ b/bsp/gd32303e-eval/rtconfig.h @@ -12,6 +12,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/gd32450z-eval/.config b/bsp/gd32450z-eval/.config index e2f00a07fc..a8b61c6b69 100644 --- a/bsp/gd32450z-eval/.config +++ b/bsp/gd32450z-eval/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/gd32450z-eval/rtconfig.h b/bsp/gd32450z-eval/rtconfig.h index 500aab6290..42601f4ca9 100644 --- a/bsp/gd32450z-eval/rtconfig.h +++ b/bsp/gd32450z-eval/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/gkipc/.config b/bsp/gkipc/.config index 975b82b5b2..9ef3dadbde 100644 --- a/bsp/gkipc/.config +++ b/bsp/gkipc/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_256=y CONFIG_RT_THREAD_PRIORITY_MAX=256 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/gkipc/rtconfig.h b/bsp/gkipc/rtconfig.h index 2c0233cf29..82262adfd5 100644 --- a/bsp/gkipc/rtconfig.h +++ b/bsp/gkipc/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 256 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/hifive1/.config b/bsp/hifive1/.config index 79ed12a852..a3add71ec5 100644 --- a/bsp/hifive1/.config +++ b/bsp/hifive1/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_256=y CONFIG_RT_THREAD_PRIORITY_MAX=256 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/hifive1/rtconfig.h b/bsp/hifive1/rtconfig.h index a2b2e3f9b9..3b25a4e431 100644 --- a/bsp/hifive1/rtconfig.h +++ b/bsp/hifive1/rtconfig.h @@ -12,6 +12,7 @@ #define RT_THREAD_PRIORITY_MAX 256 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/imx6sx/cortex-a9/.config b/bsp/imx6sx/cortex-a9/.config index ce2e256f2c..a43422d533 100644 --- a/bsp/imx6sx/cortex-a9/.config +++ b/bsp/imx6sx/cortex-a9/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/imx6sx/cortex-a9/rtconfig.h b/bsp/imx6sx/cortex-a9/rtconfig.h index 30de937b05..f11ddac2a1 100644 --- a/bsp/imx6sx/cortex-a9/rtconfig.h +++ b/bsp/imx6sx/cortex-a9/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/imx6ul/rtconfig.h b/bsp/imx6ul/rtconfig.h index ee3857dcb8..2b034ac76b 100644 --- a/bsp/imx6ul/rtconfig.h +++ b/bsp/imx6ul/rtconfig.h @@ -20,6 +20,7 @@ #define IDLE_THREAD_STACK_SIZE 512 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <integer name="RT_DEBUG_SCHEDULER" description="scheduler debug enable" default="0" /> // #define RT_DEBUG_SCHEDULER 1 // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c index 54666a7b1c..f68373b535 100644 --- a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c +++ b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth.c @@ -46,9 +46,7 @@ //#define ETH_RX_DUMP //#define ETH_TX_DUMP -#define DBG_ENABLE #define DBG_SECTION_NAME "ETH" -#define DBG_COLOR #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth_fire.c b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth_fire.c index 30b9e13306..1cae69ba17 100644 --- a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth_fire.c +++ b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_eth_fire.c @@ -37,9 +37,7 @@ //#define ETH_RX_DUMP //#define ETH_TX_DUMP -#define DBG_ENABLE #define DBG_SECTION_NAME "ETH" -#define DBG_COLOR #define DBG_LEVEL DBG_LOG #include <rtdbg.h> diff --git a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_hyper.c b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_hyper.c index aa851f7b39..5ca326070c 100644 --- a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_hyper.c +++ b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_hyper.c @@ -14,10 +14,8 @@ #include <rthw.h> #include "drv_flexspi.h" -#define DBG_ENABLE -#define DBG_SECTION_NAME "[Hyper]" +#define DBG_SECTION_NAME "Hyper" #define DBG_LEVEL DBG_LOG -#define DBG_COLOR #include <rtdbg.h> #define FLEXSPI_CLOCK kCLOCK_FlexSpi diff --git a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_nor.c b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_nor.c index c48e43c2e0..4e9e738b6c 100644 --- a/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_nor.c +++ b/bsp/imxrt/Libraries/imxrt1050/drivers/drv_flexspi_nor.c @@ -12,10 +12,9 @@ #include "board.h" #include <rthw.h> #include "drv_flexspi.h" -#define DBG_ENABLE -#define DBG_SECTION_NAME "[FLEXSPI]" + +#define DBG_SECTION_NAME "FLEXSPI" #define DBG_LEVEL DBG_LOG -#define DBG_COLOR #include <rtdbg.h> #define FLEXSPI_CLOCK kCLOCK_FlexSpi diff --git a/bsp/imxrt/imxrt1050-ArchMix/.config b/bsp/imxrt/imxrt1050-ArchMix/.config index 899b0a2cd2..35624f7169 100644 --- a/bsp/imxrt/imxrt1050-ArchMix/.config +++ b/bsp/imxrt/imxrt1050-ArchMix/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -20,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -61,7 +63,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_FPU=y @@ -233,6 +235,7 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_RT_USING_CMSIS_OS is not set # CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set # # RT-Thread online packages @@ -299,6 +302,7 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_BEEPPLAYER is not set # # tools packages @@ -356,7 +360,6 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -366,7 +369,6 @@ CONFIG_RT_USING_LIBC=y # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set CONFIG_SOC_IMXRT1052=y CONFIG_BOARD_RT1050_ArchMix=y CONFIG_BOARD_USING_QSPIFLASH=y diff --git a/bsp/imxrt/imxrt1050-ArchMix/rtconfig.h b/bsp/imxrt/imxrt1050-ArchMix/rtconfig.h index c7a80daf61..7f82bba585 100644 --- a/bsp/imxrt/imxrt1050-ArchMix/rtconfig.h +++ b/bsp/imxrt/imxrt1050-ArchMix/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -39,7 +40,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_FPU diff --git a/bsp/imxrt/imxrt1050-evk/.config b/bsp/imxrt/imxrt1050-evk/.config index 2be76d2ec3..f89d1573ec 100644 --- a/bsp/imxrt/imxrt1050-evk/.config +++ b/bsp/imxrt/imxrt1050-evk/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -20,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -61,7 +63,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_FPU=y @@ -286,6 +288,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # # CONFIG_RT_USING_CMSIS_OS is not set # CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set # # RT-Thread online packages @@ -352,6 +355,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_BEEPPLAYER is not set # # tools packages @@ -409,7 +413,6 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -419,7 +422,6 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set CONFIG_SOC_IMXRT1052=y CONFIG_BOARD_USING_HYPERFLASH=y # CONFIG_BOARD_USING_QSPIFLASH is not set diff --git a/bsp/imxrt/imxrt1050-evk/rtconfig.h b/bsp/imxrt/imxrt1050-evk/rtconfig.h index 5256a50818..d84cda40ad 100644 --- a/bsp/imxrt/imxrt1050-evk/rtconfig.h +++ b/bsp/imxrt/imxrt1050-evk/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -39,7 +40,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_FPU diff --git a/bsp/lm4f232/rtconfig.h b/bsp/lm4f232/rtconfig.h index 75a826ff4f..52844dc578 100644 --- a/bsp/lm4f232/rtconfig.h +++ b/bsp/lm4f232/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/lpc176x/rtconfig.h b/bsp/lpc176x/rtconfig.h index 726b887047..629d7da08f 100644 --- a/bsp/lpc176x/rtconfig.h +++ b/bsp/lpc176x/rtconfig.h @@ -17,6 +17,7 @@ #define RT_TICK_PER_SECOND 100 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/lpc178x/rtconfig.h b/bsp/lpc178x/rtconfig.h index 13f7759b0b..25f99888f7 100644 --- a/bsp/lpc178x/rtconfig.h +++ b/bsp/lpc178x/rtconfig.h @@ -18,6 +18,7 @@ #define RT_TICK_PER_SECOND 100 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/lpc2148/rtconfig.h b/bsp/lpc2148/rtconfig.h index 6343ce5ce6..70a6ef0325 100644 --- a/bsp/lpc2148/rtconfig.h +++ b/bsp/lpc2148/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* #define RT_THREAD_DEBUG */ #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/lpc408x/.config b/bsp/lpc408x/.config index eed04f9c32..b87d2cd213 100644 --- a/bsp/lpc408x/.config +++ b/bsp/lpc408x/.config @@ -7,19 +7,31 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y # CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 -CONFIG_RT_TICK_PER_SECOND=100 -CONFIG_RT_DEBUG=y +CONFIG_RT_TICK_PER_SECOND=1000 CONFIG_RT_USING_OVERFLOW_CHECK=y -CONFIG_RT_DEBUG_INIT=0 -CONFIG_RT_DEBUG_THREAD=0 CONFIG_RT_USING_HOOK=y -CONFIG_IDLE_THREAD_STACK_SIZE=512 +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set # # Inter-Thread communication @@ -37,29 +49,33 @@ CONFIG_RT_USING_MESSAGEQUEUE=y CONFIG_RT_USING_MEMPOOL=y CONFIG_RT_USING_MEMHEAP=y # CONFIG_RT_USING_NOHEAP is not set -CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SMALL_MEM is not set # CONFIG_RT_USING_SLAB is not set -# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set -# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_MEMHEAP_AS_HEAP=y CONFIG_RT_USING_HEAP=y # # Kernel Device Object # CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -# CONFIG_RT_USING_MODULE is not set +CONFIG_RT_VER_NUM=0x40001 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components # -# CONFIG_RT_USING_COMPONENTS_INIT is not set +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 # # C++ features @@ -75,13 +91,15 @@ CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_USING_SYMTAB=y CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set CONFIG_FINSH_THREAD_PRIORITY=20 CONFIG_FINSH_THREAD_STACK_SIZE=4096 CONFIG_FINSH_CMD_SIZE=80 # CONFIG_FINSH_USING_AUTH is not set CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_USING_MSH_DEFAULT=y -# CONFIG_FINSH_USING_MSH_ONLY is not set +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 # # Device virtual file system @@ -91,6 +109,7 @@ CONFIG_DFS_USING_WORKDIR=y CONFIG_DFS_FILESYSTEMS_MAX=2 CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 CONFIG_DFS_FD_MAX=16 +# CONFIG_RT_USING_DFS_MNTTABLE is not set CONFIG_RT_USING_DFS_ELMFAT=y # @@ -109,30 +128,40 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096 # CONFIG_RT_DFS_ELM_USE_ERASE is not set CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_USING_DFS_DEVFS=y -# CONFIG_RT_USING_DFS_NET is not set # CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set # CONFIG_RT_USING_DFS_UFFS is not set # CONFIG_RT_USING_DFS_JFFS2 is not set -# CONFIG_RT_USING_DFS_NFS is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y -CONFIG_RT_USING_CAN=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_I2C is not set CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set + +# +# Using WiFi +# # CONFIG_RT_USING_WIFI is not set # @@ -144,22 +173,25 @@ CONFIG_RT_USING_PIN=y # # POSIX layer and C standard library # -CONFIG_RT_USING_LIBC=y -CONFIG_RT_USING_PTHREADS=y -CONFIG_RT_USING_POSIX=y -# CONFIG_RT_USING_POSIX_MMAP is not set -# CONFIG_RT_USING_POSIX_TERMIOS is not set -# CONFIG_RT_USING_POSIX_AIO is not set -# CONFIG_HAVE_SYS_SIGNALS is not set +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# # -# Network stack +# Socket abstraction layer # +# CONFIG_RT_USING_SAL is not set # # light weight TCP/IP stack # # CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_LWIP141 is not set +# CONFIG_RT_USING_LWIP202 is not set +# CONFIG_RT_USING_LWIP210 is not set # # Modbus master and slave stack @@ -167,6 +199,11 @@ CONFIG_RT_USING_POSIX=y # CONFIG_RT_USING_MODBUS is not set # +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# # VBUS(Virtual Software BUS) # # CONFIG_RT_USING_VBUS is not set @@ -176,43 +213,33 @@ CONFIG_RT_USING_POSIX=y # # CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set # # ARM CMSIS # # CONFIG_RT_USING_CMSIS_OS is not set # CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set # # RT-Thread online packages # # -# system packages -# - -# -# RT-Thread GUI Engine -# -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_PERSIMMON is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set - -# # IoT - internet of things # # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set # # Wi-Fi @@ -230,6 +257,17 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set # # security packages @@ -241,6 +279,7 @@ CONFIG_RT_USING_POSIX=y # # language packages # +# CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -248,27 +287,99 @@ CONFIG_RT_USING_POSIX=y # multimedia packages # # CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set # # tools packages # # CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set -# CONFIG_PKG_USING_IPERF is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set # # miscellaneous packages # +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # -# example package: hello +# samples: kernel and components samples # +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_VI is not set CONFIG_SOC_LPC4088=y -# CONFIG_RT_USING_UART0 is not set -CONFIG_RT_USING_UART1=y + +# +# Hardware Drivers Config +# + +# +# On-chip Peripheral Drivers +# +# CONFIG_BSP_USING_EMAC is not set +# CONFIG_BSP_USING_HWTIMER0 is not set + +# +# UART Drivers +# +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_USING_UART2 is not set + +# +# Onboard Peripheral Drivers +# +# CONFIG_BSP_USING_SDRAM is not set +# CONFIG_BSP_USING_LED is not set + +# +# Offboard Peripheral Drivers +# diff --git a/bsp/lpc408x/README.md b/bsp/lpc408x/README.md index a7055ec097..7561dcc8f8 100644 --- a/bsp/lpc408x/README.md +++ b/bsp/lpc408x/README.md @@ -1,23 +1,23 @@ -# LPC408x +# LPC408x BSP 使用说明 ## 简介 -LPC408x是RT-Thread推出的一款基于LPC408x系列的评估板，板载资源主要如下： +LPC408x 是 RT-Thread 推出的一款基于 LPC408x 系列的评估板，板载资源主要如下： | 硬件 | 描述 | | --------- | ------------- | | 芯片型号 | LPC4088FET208 | | CPU | ARM Cortex M4 | | 主频 | 120M | -| 片内SRAM | 64K | -| 片外SDRAM | 32M | -| 片内FLASH | 512K | +| 片内 SRAM | 64K | +| 片外 SDRAM | 32M | +| 片内 FLASH | 512K | ## 编译说明 -LPC408x板级包支持MDK4﹑MDK5开发环境和GCC编译器，以下是具体版本信息： +LPC408x 板级包支持 MDK4﹑MDK5 开发环境和 GCC 编译器，以下是具体版本信息： -| IDE/编译器 | 已测试版本 | +| IDE / 编译器 | 已测试版本 | | ---------- | ---------------------------- | | MDK4 | MDK4.74 | | MDK5 | MDK524a | @@ -25,15 +25,15 @@ LPC408x板级包支持MDK4﹑MDK5开发环境和GCC编译器，以下是具体� ## 烧写及执行 -供电方式：使用方口USB 连接电脑和开发板。 +供电方式：使用方口 USB 连接电脑和开发板。 -下载程序：使用JLink/ULink等等仿真器连接到板子上的20Pin仿真口。 +下载程序：使用 JLink/ULink 等等仿真器连接到板子上的 20Pin 仿真口。 -串口连接：板载CP2102，连接了USB后打开相应的串口即可。 +串口连接：板载 CP2102，连接了 USB 后打开相应的串口即可。 ### 运行结果 -如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息： +如果编译 & 烧写无误，当复位设备后，会在串口上看到 RT-Thread 的启动 logo 信息： ```bash \ | / @@ -47,14 +47,14 @@ finsh /> | 驱动 | 支持情况 | 备注 | | ----- | -------- | :------------: | -| UART | 支持 | UART0~4 | +| UART | 支持 | UART0/2 | | ETH | 支持 | | | LCD | 支持 | | | SDRAM | 支持 | | -### IO在板级支持包中的映射情况 +### IO 在板级支持包中的映射情况 -| IO号 | 板级包中的定义 | +| IO 号 | 板级包中的定义 | | ----- | -------------- | | P3_14 | LED1 | | P3_3 | LED2 | diff --git a/bsp/lpc408x/SConscript b/bsp/lpc408x/SConscript index 381b1612c7..858221d5a2 100644 --- a/bsp/lpc408x/SConscript +++ b/bsp/lpc408x/SConscript @@ -1,6 +1,7 @@ from building import * -cwd = str(Dir('#')) +cwd = GetCurrentDir() + objs = [] list = os.listdir(cwd) diff --git a/bsp/lpc408x/SConstruct b/bsp/lpc408x/SConstruct index fb728723bc..22bb73b311 100644 --- a/bsp/lpc408x/SConstruct +++ b/bsp/lpc408x/SConstruct @@ -10,7 +10,7 @@ else: sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] from building import * -TARGET = 'rtthread-%s.%s' % (rtconfig.BOARD_NAME, rtconfig.TARGET_EXT) +TARGET = 'rtthread.' + rtconfig.TARGET_EXT env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, @@ -20,11 +20,16 @@ env = Environment(tools = ['mingw'], LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map') + Export('RTT_ROOT') Export('rtconfig') # prepare building environment -objs = PrepareBuilding(env, RTT_ROOT) +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) # make a building DoBuilding(TARGET, objs) diff --git a/bsp/lpc408x/applications/SConscript b/bsp/lpc408x/applications/SConscript index 01eb940dfb..6452d39145 100644 --- a/bsp/lpc408x/applications/SConscript +++ b/bsp/lpc408x/applications/SConscript @@ -1,10 +1,8 @@ -Import('RTT_ROOT') -Import('rtconfig') from building import * -cwd = os.path.join(str(Dir('#')), 'applications') -src = Glob('*.c') +cwd = GetCurrentDir() CPPPATH = [cwd, str(Dir('#'))] +src = Glob('*.c') group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/lpc408x/applications/application.c b/bsp/lpc408x/applications/application.c deleted file mode 100644 index 29f7c36bba..0000000000 --- a/bsp/lpc408x/applications/application.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2014-01-02 xiaonong the first version for lpc408x - */ - -#include <rtthread.h> - -#ifdef RT_USING_FINSH -#include <shell.h> -#include <finsh.h> -#endif - -/* thread phase init */ -void rt_init_thread_entry(void *parameter) -{ - /* Initialization RT-Thread Components */ -#ifdef RT_USING_COMPONENTS_INIT - rt_components_init(); -#elif defined(RT_USING_FINSH) - finsh_system_init(); -#endif -} - -int rt_application_init(void) -{ - rt_thread_t tid; - tid = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, - 2048, RT_THREAD_PRIORITY_MAX / 3, 20); - if (tid != RT_NULL) rt_thread_startup(tid); - - return 0; -} diff --git a/bsp/lpc408x/applications/board.h b/bsp/lpc408x/applications/board.h deleted file mode 100644 index 654a5bea9e..0000000000 --- a/bsp/lpc408x/applications/board.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2009-09-22 Bernard add board.h to this bsp - * 2010-02-04 Magicoe add board.h to LPC176x bsp - * 2013-12-18 Bernard porting to LPC4088 bsp - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#include "LPC407x_8x_177x_8x.h" -#include <rtthread.h> - -/* SRAM allocation for Peripherals */ -#define USB_RAM_BASE 0x20000000 -#define MCI_RAM_BASE 0x20002000 -#define ETH_RAM_BASE 0x20004000 - -/* use SDRAM in default */ -#define LPC_EXT_SDRAM 1 - -/* disable SDRAM in default */ -#ifndef LPC_EXT_SDRAM -#define LPC_EXT_SDRAM 0 -#endif - -// <RDTConfigurator URL="http://www.rt-thread.com/eclipse"> - -// <integer name="LPC_EXT_SDRAM" description="Begin Address of External SDRAM" default="0xA0000000" /> -#define LPC_EXT_SDRAM_BEGIN 0xA0000000 -// <integer name="LPC_EXT_SDRAM_END" description="End Address of External SDRAM" default="0xA2000000" /> -#define LPC_EXT_SDRAM_END 0xA2000000 - -// <bool name="RT_USING_UART0" description="Using UART0" default="true" /> -#define RT_USING_UART0 -// <bool name="RT_USING_UART1" description="Using UART1" default="true" /> -//#define RT_USING_UART1 -// <bool name="RT_USING_UART2" description="Using UART2" default="true" /> -#define RT_USING_UART2 - -// </RDTConfigurator> - -#ifdef __CC_ARM -extern int Image$$RW_IRAM1$$ZI$$Limit; -#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) -#elif __ICCARM__ -#pragma section="HEAP" -#define HEAP_BEGIN (__segment_end("HEAP")) -#else -extern int __bss_end; -#define HEAP_BEGIN ((void *)&__bss_end) -#endif -#define HEAP_END (void*)(0x10000000 + 0x10000) - -#define FINSH_DEVICE_NAME RT_CONSOLE_DEVICE_NAME -void rt_hw_board_init(void); - -#endif diff --git a/bsp/lpc408x/applications/canapp.c b/bsp/lpc408x/applications/canapp.c deleted file mode 100644 index 96a0ceeb39..0000000000 --- a/bsp/lpc408x/applications/canapp.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2015-05-14 [email protected] first version - */ - -#include <board.h> -#include <rtthread.h> -#include <rtdevice.h> -#ifdef RT_USING_CAN -#include "drv_lpccan.h" -struct can_app_struct -{ - const char* name; - struct rt_can_filter_config * filter; - rt_uint8_t eventopt; - struct rt_semaphore sem; -}; -static struct can_app_struct can_data[1]; -struct rt_can_filter_item filter1item[4] = -{ - LPC_CAN_AF_STD_INIT(1), - LPC_CAN_AF_STD_GRP_INIT(3,5), - LPC_CAN_AF_EXT_INIT(2), - LPC_CAN_AF_EXT_GRP_INIT(4,6), -}; -struct rt_can_filter_config filter1 = -{ - 4, - 1, - filter1item, -}; -static struct can_app_struct can_data[1] = { - { - "lpccan1", - &filter1, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, - }, -}; -static rt_err_t lpccanind(rt_device_t dev, rt_size_t size) -{ - rt_sem_release(&can_data[0].sem); -} -void rt_can_thread_entry(void* parameter) -{ - struct rt_can_msg msg; - struct can_app_struct* canpara = (struct can_app_struct*) parameter; - rt_device_t candev; - - candev = rt_device_find(canpara->name); - RT_ASSERT(candev); - rt_sem_init(&canpara->sem, canpara->name, 0, RT_IPC_FLAG_FIFO); - rt_device_open(candev, (RT_DEVICE_OFLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX)); - rt_device_control(candev,RT_CAN_CMD_SET_FILTER,canpara->filter); - rt_device_set_rx_indicate(candev, lpccanind); - while(1) { - rt_sem_take(&canpara->sem, RT_WAITING_FOREVER); - while (rt_device_read(candev, 0, &msg, sizeof(msg)) == sizeof(msg)) { - rt_device_write(candev, 0, &msg, sizeof(msg)); - } - } -} -int rt_can_app_init(void) -{ - rt_thread_t tid; - - tid = rt_thread_create("canapp1", - rt_can_thread_entry, &can_data[0], - 512, RT_THREAD_PRIORITY_MAX /3 - 1, 20); - if (tid != RT_NULL) rt_thread_startup(tid); - - return 0; -} - -INIT_APP_EXPORT(rt_can_app_init); -#endif /*RT_USING_CAN*/ diff --git a/bsp/lpc408x/applications/main.c b/bsp/lpc408x/applications/main.c new file mode 100644 index 0000000000..7874a25073 --- /dev/null +++ b/bsp/lpc408x/applications/main.c @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2006-2018, Synwit Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-10 armink first version + */ + +#include <rtthread.h> +#include <rtdevice.h> + +int main(void) +{ + rt_kprintf("Hello RT-Thread!\n"); + + return RT_EOK; +} diff --git a/bsp/lpc408x/applications/sram.c b/bsp/lpc408x/applications/sram.c deleted file mode 100644 index 633d3eb6d4..0000000000 --- a/bsp/lpc408x/applications/sram.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * -* Change Logs: -* Date Author Notes -* 2013-05-19 Bernard The first version for LPC40xx -*/ - -#include "sram.h" -#include "board.h" - -#include <rtthread.h> - -#ifdef LPC_EXT_SDRAM -struct rt_memheap system_heap; - -void sram_init(void) -{ - /* initialize the built-in SRAM as a memory heap */ - rt_memheap_init(&system_heap, - "system", - (void *)HEAP_BEGIN, - (rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN); -} - -void *sram_malloc(unsigned long size) -{ - return rt_memheap_alloc(&system_heap, size); -} - -void sram_free(void *ptr) -{ - rt_memheap_free(ptr); -} - -void *sram_realloc(void *ptr, unsigned long size) -{ - return rt_memheap_realloc(&system_heap, ptr, size); -} - -#endif diff --git a/bsp/lpc408x/applications/sram.h b/bsp/lpc408x/applications/sram.h deleted file mode 100644 index 3aee2aab0b..0000000000 --- a/bsp/lpc408x/applications/sram.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2013-05-19 Bernard The first version for LPC40xx - */ - -#ifndef __SRAM_H__ -#define __SRAM_H__ - -void *sram_malloc(unsigned long nbytes); -void sram_free(void *ptr); -void *sram_realloc(void *ptr, unsigned long nbytes); - -#endif diff --git a/bsp/lpc408x/applications/startup.c b/bsp/lpc408x/applications/startup.c deleted file mode 100644 index cb99fc16ff..0000000000 --- a/bsp/lpc408x/applications/startup.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard first implementation - * 2010-03-04 Magicoe for LPC17xx - */ - -#include <rthw.h> -#include <rtthread.h> - -#include "board.h" - -extern int rt_application_init(void); -extern void sram_init(void); -/** - * This function will startup RT-Thread RTOS. - */ -void rtthread_startup(void) -{ - /* initialize board */ - rt_hw_board_init(); - - /* show version */ - rt_show_version(); - -#ifdef RT_USING_HEAP -#if LPC_EXT_SDRAM - rt_system_heap_init((void *)LPC_EXT_SDRAM_BEGIN, (void *)LPC_EXT_SDRAM_END); - sram_init(); -#else - rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); -#endif -#endif - /* initialize scheduler system */ - rt_system_scheduler_init(); - /* initialize system timer*/ - rt_system_timer_init(); - /* initialize application */ - rt_application_init(); - - /* initialize timer thread */ - rt_system_timer_thread_init(); - - /* initialize idle thread */ - rt_thread_idle_init(); - - /* start scheduler */ - rt_system_scheduler_start(); - - /* never reach here */ - return ; -} - -int main(void) -{ - /* disable interrupt first */ - rt_hw_interrupt_disable(); - - /* startup RT-Thread RTOS */ - rtthread_startup(); - - return 0; -} diff --git a/bsp/lpc408x/drivers/Kconfig b/bsp/lpc408x/drivers/Kconfig index 248cbb088f..bf14b67519 100644 --- a/bsp/lpc408x/drivers/Kconfig +++ b/bsp/lpc408x/drivers/Kconfig @@ -1,21 +1,45 @@ -config RT_USING_UART0 - bool "Enable UART0" - default y +menu "Hardware Drivers Config" -config RT_USING_UART2 - bool "Enable UART2" - default n + menu "On-chip Peripheral Drivers" -config RT_USING_UART4 - bool "Enable UART4" - default n + config BSP_USING_EMAC + bool "EMAC driver" + select RT_USING_LWIP + default n -config BSP_DRV_CLCD - bool "CLCD driver" - depends on PKG_USING_GUIENGINE - default y + config BSP_USING_HWTIMER0 + bool "Using timer0" + select RT_USING_HWTIMER + default n -config BSP_DRV_EMAC - bool "EMAC driver" - depends on RT_USING_LWIP - default y + menu "UART Drivers" + config BSP_USING_UART0 + bool "Enable UART0 P0.2/P0.3(T/R)" + select RT_USING_SERIAL + default y + + config BSP_USING_UART2 + bool "Enable UART2 P2.8/P0.11(T/R)" + select RT_USING_SERIAL + default n + + endmenu + + endmenu + + menu "Onboard Peripheral Drivers" + + config BSP_USING_SDRAM + bool "Enable sdram" + default n + + config BSP_USING_LED + bool "Enable LED" + default n + endmenu + + menu "Offboard Peripheral Drivers" + + endmenu + +endmenu diff --git a/bsp/lpc408x/drivers/SConscript b/bsp/lpc408x/drivers/SConscript index e5f4cd4945..8c7c4435b2 100644 --- a/bsp/lpc408x/drivers/SConscript +++ b/bsp/lpc408x/drivers/SConscript @@ -1,13 +1,27 @@ from building import * cwd = GetCurrentDir() -src = Glob('*.c') +CPPPATH = [cwd] -# remove no need file. -if GetDepend('RT_USING_LWIP') == False: - SrcRemove(src, 'drv_emac.c') +# add the general drivers. +src = Split(""" +board.c +""") -CPPPATH = [cwd] +if GetDepend(['BSP_USING_EMAC']): + src += ['drv_emac.c'] + +if GetDepend(['BSP_USING_HWTIMER0']): + src += ['drv_hwtimer.c'] + +if GetDepend(['BSP_USING_LED']): + src += ['drv_led.c'] + +if GetDepend(['BSP_USING_SDRAM']): + src += ['drv_sdram.c'] + +if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART2'): + src += ['drv_uart.c'] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/lpc408x/applications/board.c b/bsp/lpc408x/drivers/board.c index 2deb02d930..8db9473876 100644 --- a/bsp/lpc408x/applications/board.c +++ b/bsp/lpc408x/drivers/board.c @@ -8,19 +8,14 @@ * 2009-01-05 Bernard first implementation */ -#include <rthw.h> -#include <rtthread.h> +#include <board.h> -#include "board.h" -#include "drv_uart.h" -#ifdef LPC_EXT_SDRAM -#include "drv_sdram.h" +#if defined(BSP_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP) + #include "drv_sdram.h" + extern void rt_hw_sdram_init(void); + static struct rt_memheap system_heap; #endif -/** - * This is the timer interrupt service routine. - * - */ void SysTick_Handler(void) { /* enter interrupt */ @@ -52,14 +47,22 @@ void rt_hw_board_init() /* set pend exception priority */ NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1); - /*init uart device*/ - rt_hw_uart_init(); - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#ifdef RT_USING_HEAP -#ifdef LPC_EXT_SDRAM - rt_kprintf("Initialize SDRAM ..."); - lpc_sdram_hw_init(); - rt_kprintf("done!\n"); +#if defined(BSP_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP) + rt_hw_sdram_init(); + rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END); + rt_memheap_init(&system_heap, "sdram", (void *)HEAP_BEGIN, ((rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN)); +#else + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + +#endif /* RT_USING_HEAP */ + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif - // rt_components_board_init(); } diff --git a/bsp/lpc408x/drivers/board.h b/bsp/lpc408x/drivers/board.h new file mode 100644 index 0000000000..1cc74d0fd6 --- /dev/null +++ b/bsp/lpc408x/drivers/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2009-09-22 Bernard add board.h to this bsp + * 2010-02-04 Magicoe add board.h to LPC176x bsp + * 2013-12-18 Bernard porting to LPC4088 bsp + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "LPC407x_8x_177x_8x.h" +#include <rtthread.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* SRAM allocation for Peripherals */ +#define USB_RAM_BASE 0x20000000 +#define MCI_RAM_BASE 0x20002000 +#define ETH_RAM_BASE 0x20004000 + +/* Internal SRAM memory size[Kbytes] <16-256>, Default: 64*/ +#define SRAM_SIZE 64 * 1024 +#define SRAM_END (0x10000000 + SRAM_SIZE) + +#ifdef __CC_ARM + extern int Image$$RW_IRAM1$$ZI$$Limit; + #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ + #pragma section="HEAP" + #define HEAP_BEGIN (__segment_end("HEAP")) +#else + extern int __bss_end; + #define HEAP_BEGIN ((void *)&__bss_end) +#endif +#define HEAP_END SRAM_END + +void rt_hw_board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOARD_H__ */ diff --git a/bsp/lpc408x/drivers/drv_emac.c b/bsp/lpc408x/drivers/drv_emac.c index 7e38830f2c..7ea47d52ed 100644 --- a/bsp/lpc408x/drivers/drv_emac.c +++ b/bsp/lpc408x/drivers/drv_emac.c @@ -459,7 +459,7 @@ struct pbuf *lpc_emac_rx(rt_device_t dev) return p; } -int lpc_emac_hw_init(void) +int rt_hw_emac_init(void) { rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO); rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO); @@ -490,7 +490,7 @@ int lpc_emac_hw_init(void) eth_device_init(&(lpc_emac_device.parent), "e0"); return 0; } -INIT_DEVICE_EXPORT(lpc_emac_hw_init); +INIT_DEVICE_EXPORT(rt_hw_emac_init); #ifdef RT_USING_FINSH #include <finsh.h> diff --git a/bsp/lpc408x/drivers/drv_emac.h b/bsp/lpc408x/drivers/drv_emac.h index efaa0ac8e3..7d67eae178 100644 --- a/bsp/lpc408x/drivers/drv_emac.h +++ b/bsp/lpc408x/drivers/drv_emac.h @@ -8,8 +8,8 @@ * 2013-05-19 Bernard porting from LPC17xx drivers. */ -#ifndef __DRV_EMAC_H__ -#define __DRV_EMAC_H__ +#ifndef DRV_EMAC_H__ +#define DRV_EMAC_H__ #include "board.h" @@ -20,7 +20,6 @@ #define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */ - /* MAC Configuration Register 1 */ #define MAC1_REC_EN 0x00000001 /* Receive Enable */ #define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */ @@ -282,6 +281,6 @@ #define DP83848C_DEF_ADR 0x0F00 /* Default PHY device address */ #define DP83848C_ID 0x20005C90 /* PHY Identifier */ -int lpc_emac_hw_init(void); +int rt_hw_emac_init(void); -#endif +#endif /* DRV_EMAC_H__ */ diff --git a/bsp/lpc408x/drivers/drv_hwtimer.c b/bsp/lpc408x/drivers/drv_hwtimer.c index 7946a7058a..fa09f87d76 100644 --- a/bsp/lpc408x/drivers/drv_hwtimer.c +++ b/bsp/lpc408x/drivers/drv_hwtimer.c @@ -50,7 +50,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ match.MatchChannel = 0; match.IntOnMatch = ENABLE; match.ResetOnMatch = ENABLE; - match.StopOnMatch = (opmode == HWTIMER_MODE_ONESHOT)? ENABLE : DISABLE; + match.StopOnMatch = (opmode == HWTIMER_MODE_ONESHOT) ? ENABLE : DISABLE; match.ExtMatchOutputType = 0; match.MatchValue = t; @@ -84,7 +84,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) uint32_t pre; clk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); - pre = clk / *((uint32_t*)arg) - 1; + pre = clk / *((uint32_t *)arg) - 1; tim->PR = pre; } break; @@ -126,7 +126,7 @@ static const struct rt_hwtimer_ops _ops = static rt_hwtimer_t _timer0; -int lpc_hwtimer_init(void) +int rt_hw_hwtimer_init(void) { _timer0.info = &_info; _timer0.ops = &_ops; @@ -145,5 +145,6 @@ void TIMER0_IRQHandler(void) } } -INIT_BOARD_EXPORT(lpc_hwtimer_init); -#endif +INIT_BOARD_EXPORT(rt_hw_hwtimer_init); + +#endif /* RT_USING_HWTIMER */ diff --git a/bsp/lpc408x/drivers/drv_hwtimer.h b/bsp/lpc408x/drivers/drv_hwtimer.h index b45b27dc06..21c5a25eeb 100644 --- a/bsp/lpc408x/drivers/drv_hwtimer.h +++ b/bsp/lpc408x/drivers/drv_hwtimer.h @@ -1,8 +1,16 @@ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2015-09-02 heyuanjie87 the first version + */ +#ifndef DRV_HWTIMER_H__ +#define DRV_HWTIMER_H__ -int stm32_hwtimer_init(void); +int rt_hw_hwtimer_init(void); - -#endif +#endif /* DRV_HWTIMER_H__ */ diff --git a/bsp/lpc408x/drivers/drv_led.c b/bsp/lpc408x/drivers/drv_led.c index dcbe76a7b8..d7df12ba82 100644 --- a/bsp/lpc408x/drivers/drv_led.c +++ b/bsp/lpc408x/drivers/drv_led.c @@ -122,7 +122,7 @@ static rt_err_t rt_led_control(rt_device_t dev, int cmd, void *args) return RT_EOK; } -int rt_led_hw_init(void) +int rt_hw_led_init(void) { led.parent.type = RT_Device_Class_Char; led.parent.rx_indicate = RT_NULL; @@ -141,7 +141,8 @@ int rt_led_hw_init(void) rt_led_init(&led.parent); return 0; } -INIT_DEVICE_EXPORT(rt_led_hw_init); +INIT_DEVICE_EXPORT(rt_hw_led_init); + #ifdef RT_USING_FINSH #include <finsh.h> void led_test(rt_uint32_t led_num, rt_uint32_t value) diff --git a/bsp/lpc408x/drivers/drv_led.h b/bsp/lpc408x/drivers/drv_led.h index e69de29bb2..f3a958c9b5 100644 --- a/bsp/lpc408x/drivers/drv_led.h +++ b/bsp/lpc408x/drivers/drv_led.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2015-09-02 heyuanjie87 the first version + */ + +#ifndef DRV_LED_H__ +#define DRV_LED_H__ + +int rt_hw_led_init(void); + +#endif diff --git a/bsp/lpc408x/drivers/drv_lpccan.c b/bsp/lpc408x/drivers/drv_lpccan.c deleted file mode 100644 index 85d6511284..0000000000 --- a/bsp/lpc408x/drivers/drv_lpccan.c +++ /dev/null @@ -1,1086 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2015-06-30 [email protected] first version - */ -#include <rthw.h> -#include <rtdevice.h> -#include <board.h> -#include <drv_lpccan.h> - -#ifdef RT_USING_CAN - -#include "lpc_types.h" -#include "lpc_can.h" -#include "lpc_pinsel.h" -#include "lpc_exti.h" -#include "lpc_clkpwr.h" - -struct lpccandata -{ - en_CAN_unitId id; -}; - -static LPC_CAN_TypeDef* lcpcan_get_reg_base(rt_uint32_t id) -{ - LPC_CAN_TypeDef* pCan; - - switch (id) - { - case CAN_ID_1: - pCan = LPC_CAN1; - break; - - case CAN_ID_2: - pCan = LPC_CAN2; - break; - default: - pCan = NULL; - } - return pCan; -} - -static void lpccan_irqstate_init(rt_uint32_t id) -{ - LPC_CAN_TypeDef* pCan = lcpcan_get_reg_base(id); - volatile rt_int32_t i; - - pCan->MOD = 1; // Enter Reset Mode - pCan->IER = 0; // Disable All CAN Interrupts - pCan->GSR = 0; - - /* Request command to release Rx, Tx buffer and clear data overrun */ - //pCan->CMR = CAN_CMR_AT | CAN_CMR_RRB | CAN_CMR_CDO; - pCan->CMR = (1 << 1) | (1 << 2) | (1 << 3); - - /* Read to clear interrupt pending in interrupt capture register */ - i = pCan->ICR; - i = i; - - pCan->MOD = 0;// Return Normal operating -} - -static rt_err_t lpccan_baud_set(rt_uint32_t id, rt_uint32_t baud) -{ - uint32_t result = 0; - uint8_t NT, TSEG1, TSEG2; - uint32_t CANPclk = 0; - uint32_t BRP; - LPC_CAN_TypeDef* pCan = lcpcan_get_reg_base(id); - - CANPclk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER); - result = CANPclk / baud; - - /* Calculate suitable nominal time value - * NT (nominal time) = (TSEG1 + TSEG2 + 3) - * NT <= 24 - * TSEG1 >= 2*TSEG2 - */ - for(NT = 24; NT > 0; NT = NT-2) - { - if ((result % NT) == 0) - { - BRP = result / NT - 1; - NT--; - TSEG2 = (NT/3) - 1; - TSEG1 = NT -(NT/3) - 1; - break; - } - } - - /* Enter reset mode */ - pCan->MOD = 0x01; - /* Set bit timing - * Default: SAM = 0x00; - * SJW = 0x03; - */ - pCan->BTR = (TSEG2 << 20) | (TSEG1 << 16) | (3 << 14) | BRP; - /* Return to normal operating */ - pCan->MOD = 0; - - return RT_EOK; -} - -static void lpccan_init_alut_ram(void) -{ - //Reset CANAF value - LPC_CANAF->AFMR = 0x01; - //clear ALUT RAM - rt_memset((void *)LPC_CANAF_RAM->mask, 0, 2048); - LPC_CANAF->SFF_sa = 0; - LPC_CANAF->SFF_GRP_sa = 0; - LPC_CANAF->EFF_sa = 0; - LPC_CANAF->EFF_GRP_sa = 0; - LPC_CANAF->ENDofTable = 0; - LPC_CANAF->AFMR = 0x00; - // Set AF Mode - CAN_SetAFMode(CAN_NORMAL); -} - -#ifdef RT_USING_LPCCAN1 -static void lpccan1_turnon_clk(void) -{ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, ENABLE); -} - -static void lpccan1_filter_init(struct rt_can_device *can) -{ -} - -static void lpccan1_hw_init(uint32_t baud, CAN_MODE_Type mode) -{ - if(mode != CAN_SELFTEST_MODE) - { -#ifndef LPCCAN1_USEING_GPIO_SECOND - PINSEL_ConfigPin (0, 0, 1); - PINSEL_ConfigPin (0, 1, 1); -#else - PINSEL_ConfigPin (0, 21, 4); - PINSEL_ConfigPin (0, 22, 4); -#endif - } - lpccan1_turnon_clk(); - lpccan_irqstate_init(CAN_1); - lpccan_init_alut_ram(); - lpccan1_turnon_clk(); - lpccan_baud_set(CAN_1, baud); - CAN_ModeConfig(CAN_1, mode, ENABLE); - if(mode == CAN_SELFTEST_MODE) - { - //CAN_ModeConfig(CAN_1, CAN_TEST_MODE, ENABLE); - CAN_SetAFMode(CAN_ACC_BP); - } -} -#endif /*RT_USING_LPCCAN1*/ - -#ifdef RT_USING_LPCCAN2 -static void lpccan2_turnon_clk(void) -{ - CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, ENABLE); -} - -static void lpccan2_filter_init(struct rt_can_device *can) -{ -} - -static void lpccan2_hw_init(uint32_t baud, CAN_MODE_Type mode) -{ - if(mode != CAN_SELFTEST_MODE) - { -#ifndef LPCCAN2_USEING_GPIO_SECOND - PINSEL_ConfigPin (0, 4, 2); - PINSEL_ConfigPin (0, 5, 2); -#else - PINSEL_ConfigPin (2, 7, 1); - PINSEL_ConfigPin (2, 8, 1); -#endif - } - lpccan2_turnon_clk(); - lpccan_irqstate_init(CAN_2); -#ifndef RT_USING_LPCCAN1 - lpccan_init_alut_ram(); -#endif /*RT_USING_LPCCAN1*/ - lpccan_baud_set(CAN_2, baud); - CAN_ModeConfig(CAN_2, mode, ENABLE); - if(mode == CAN_SELFTEST_MODE) - { - CAN_SetAFMode(CAN_ACC_BP); - } -} -#endif /*RT_USING_LPCCAN2*/ - -static rt_err_t configure(struct rt_can_device *can, struct can_configure *cfg) -{ - CAN_MODE_Type mode; - rt_uint32_t canid; - - switch(cfg->mode) - { - case RT_CAN_MODE_NORMAL: - mode = CAN_OPERATING_MODE; - break; - case RT_CAN_MODE_LISEN: - mode = CAN_LISTENONLY_MODE; - break; - case RT_CAN_MODE_LOOPBACKANLISEN: - mode = CAN_SELFTEST_MODE; - break; - default: - return RT_EIO; - } - - canid = ((struct lpccandata *) can->parent.user_data)->id; -#ifdef RT_USING_LPCCAN1 - if(canid == CAN_1) - { - lpccan1_hw_init(cfg->baud_rate, mode); - lpccan1_filter_init(can); - } -#endif /*RT_USING_LPCCAN1*/ -#ifdef RT_USING_LPCCAN2 -#ifdef RT_USING_LPCCAN1 - else -#endif /*RT_USING_LPCCAN1*/ - { - lpccan2_hw_init(cfg->baud_rate, mode); - lpccan2_filter_init(can); - } -#endif /*RT_USING_LPCCAN2*/ - return RT_EOK; -} - -static CAN_ERROR findfilter(struct lpccandata* plpccan, struct rt_can_filter_item* pitem, rt_int32_t* pos) -{ - extern uint16_t CANAF_FullCAN_cnt; - extern uint16_t CANAF_std_cnt; - extern uint16_t CANAF_gstd_cnt; - extern uint16_t CANAF_ext_cnt; - extern uint16_t CANAF_gext_cnt; - - rt_uint32_t buf0 = 0, buf1 = 0; - rt_int16_t cnt1 = 0, cnt2 = 0, bound1 = 0; - CAN_ID_FORMAT_Type format; - *pos = -1; - if(pitem->ide) - { - format = EXT_ID_FORMAT; - } - else - { - format = STD_ID_FORMAT; - } - if(pitem->mode) - { - rt_uint32_t id = pitem->id; - if(format == STD_ID_FORMAT) - { - id &= 0x07FF; - - id |= plpccan->id << 13;/* Add controller number */ - - if (CANAF_std_cnt == 0) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else if (CANAF_std_cnt == 1) - { - cnt2 = (CANAF_FullCAN_cnt + 1) >> 1; - if(id != LPC_CANAF_RAM->mask[cnt2] >> 16) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - } - else - { - cnt1 = (CANAF_FullCAN_cnt+1)>>1; - - bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1); - - while (cnt1 < bound1) - { - /* Loop through standard existing IDs */ - if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) == id) - { - *pos = cnt1 * 2; - return CAN_OK; - } - - if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) == id) - { - *pos = cnt1 * 2 + 1; - return CAN_OK; - } - if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > id) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - - if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > id) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - cnt1++; - } - return CAN_ENTRY_NOT_EXIT_ERROR; - } - } - /*********** Add Explicit Extended Identifier Frame Format entry *********/ - else - { - /* Add controller number */ - id |= plpccan->id << 29; - - cnt1 = ((CANAF_FullCAN_cnt+1) >> 1) + (((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt); - - cnt2 = 0; - - while (cnt2 < CANAF_ext_cnt) - { - /* Loop through extended existing masks*/ - if (LPC_CANAF_RAM->mask[cnt1] == id) - { - *pos = cnt2; - return CAN_OK; - } - if (LPC_CANAF_RAM->mask[cnt1] > id) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - cnt1++; - cnt2++; - } - } - } - else - { - rt_uint32_t lowerID = pitem->id; - rt_uint32_t upperID = pitem->mask; - rt_uint32_t LID,UID; - if(lowerID > upperID) - return CAN_CONFLICT_ID_ERROR; - if(format == STD_ID_FORMAT) - { - lowerID &=0x7FF; //mask ID - upperID &=0x7FF; - cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1); - if(CANAF_gstd_cnt == 0) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt; - while(cnt1 < bound1) - { - //compare controller first - while((LPC_CANAF_RAM->mask[cnt1] >> 29) < (plpccan->id))//increase until meet greater or equal controller - cnt1++; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - if((LPC_CANAF_RAM->mask[cnt1] >> 29) > (plpccan->id)) //meet greater controller - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else //meet equal controller - { - LID = (buf0 >> 16)&0x7FF; - UID = buf0 & 0x7FF; - if (upperID == LID && lowerID == UID) - { - *pos = cnt1; - return CAN_OK; - } - if (upperID < LID) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else if (lowerID >= UID) - { - cnt1 ++; - } - else - return CAN_CONFLICT_ID_ERROR; - } - } - if(cnt1 >= bound1) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - } - } - /*********Add Group of Extended Identifier Frame Format************/ - else - { - lowerID &= 0x1FFFFFFF; //mask ID - upperID &= 0x1FFFFFFF; - cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt + CANAF_ext_cnt; - //if this is the first Group standard ID entry - if(CANAF_gext_cnt == 0) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else - { - bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt \ - + CANAF_ext_cnt + (CANAF_gext_cnt<<1); - while(cnt1 < bound1) - { - while((LPC_CANAF_RAM->mask[cnt1] >>29)< plpccan->id ) //increase until meet greater or equal controller - cnt1++; - buf0 = LPC_CANAF_RAM->mask[cnt1]; - buf1 = LPC_CANAF_RAM->mask[cnt1+1]; - if((LPC_CANAF_RAM->mask[cnt1] >> 29) > plpccan->id ) //meet greater controller - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else //meet equal controller - { - LID = buf0 & 0x1FFFFFFF; //mask ID - UID = buf1 & 0x1FFFFFFF; - if (upperID == LID && lowerID == UID) - { - *pos = cnt1; - return CAN_OK; - } - if (upperID < LID) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - else if (lowerID >= UID) - { - //load next entry to compare - cnt1 +=2; - } - else - return CAN_CONFLICT_ID_ERROR; - } - } - if(cnt1 >= bound1) - { - return CAN_ENTRY_NOT_EXIT_ERROR; - } - } - } - } - return CAN_ENTRY_NOT_EXIT_ERROR; -} - -static rt_err_t setfilter(struct lpccandata* plpccan,struct rt_can_filter_config *pconfig) -{ - struct rt_can_filter_item* pitem = pconfig->items; - rt_uint32_t count = pconfig->count; - rt_int32_t pos; - CAN_ID_FORMAT_Type format; - CAN_ERROR lpccanres; - while(count) - { - if(pitem->ide) - { - format = EXT_ID_FORMAT; - } - else - { - format = STD_ID_FORMAT; - } - lpccanres = findfilter(plpccan, pitem, &pos); - if(pconfig->actived && lpccanres != CAN_OK) - { - if(pitem->mode) - { - lpccanres = CAN_LoadGroupEntry(plpccan->id, pitem->id, pitem->mask, format); - } - else - { - lpccanres = CAN_LoadExplicitEntry(plpccan->id, pitem->id, format); - } - } - else if(!pconfig->actived && lpccanres == CAN_OK) - { - AFLUT_ENTRY_Type type; - if(pitem->mode) - { - if(format == EXT_ID_FORMAT) - { - type = GROUP_EXTEND_ENTRY; - } - else - { - type = GROUP_STANDARD_ENTRY; - } - } - else - { - if(format == EXT_ID_FORMAT) - { - type = EXPLICIT_EXTEND_ENTRY; - } - else - { - type = EXPLICIT_STANDARD_ENTRY; - } - } - lpccanres = CAN_RemoveEntry(type, (rt_uint16_t)(pos)); - } - else if(!pconfig->actived && lpccanres != CAN_OK) - { - lpccanres = CAN_OK; - } - if(lpccanres != CAN_OK) - { - return RT_EIO; - } - pitem++; - count--; - } - return RT_EOK; -} - -static rt_err_t control(struct rt_can_device *can, int cmd, void *arg) -{ - struct lpccandata* plpccan; - rt_uint32_t argval; - CAN_MODE_Type mode; - - plpccan = (struct lpccandata* ) can->parent.user_data; - RT_ASSERT(plpccan != RT_NULL); - - switch (cmd) - { - case RT_DEVICE_CTRL_CLR_INT: - argval = (rt_uint32_t) arg; - if(argval == RT_DEVICE_FLAG_INT_RX) - { - CAN_IRQCmd(plpccan->id, CANINT_RIE, DISABLE); - CAN_IRQCmd(plpccan->id, CANINT_DOIE, DISABLE); - } - else if(argval == RT_DEVICE_FLAG_INT_TX) - { - CAN_IRQCmd(plpccan->id, CANINT_TIE1, DISABLE); - CAN_IRQCmd(plpccan->id, CANINT_TIE2, DISABLE); - CAN_IRQCmd(plpccan->id, CANINT_TIE3, DISABLE); - } - else if(argval == RT_DEVICE_CAN_INT_ERR) - { - CAN_IRQCmd(plpccan->id, CANINT_EIE, DISABLE); - } - break; - - case RT_DEVICE_CTRL_SET_INT: - argval = (rt_uint32_t) arg; - if(argval == RT_DEVICE_FLAG_INT_RX) - { - CAN_IRQCmd(plpccan->id, CANINT_RIE, ENABLE); - CAN_IRQCmd(plpccan->id, CANINT_DOIE, ENABLE); - } - else if(argval == RT_DEVICE_FLAG_INT_TX) - { - CAN_IRQCmd(plpccan->id, CANINT_TIE1, ENABLE); - CAN_IRQCmd(plpccan->id, CANINT_TIE2, ENABLE); - CAN_IRQCmd(plpccan->id, CANINT_TIE3, ENABLE); - } - else if(argval == RT_DEVICE_CAN_INT_ERR) - { - CAN_IRQCmd(plpccan->id, CANINT_EIE, ENABLE); - } - break; - - case RT_CAN_CMD_SET_FILTER: - return setfilter(plpccan, (struct rt_can_filter_config*) arg); - - case RT_CAN_CMD_SET_MODE: - argval = (rt_uint32_t) arg; - if(argval != RT_CAN_MODE_NORMAL || - argval != RT_CAN_MODE_LISEN) - { - return RT_ERROR; - } - if(argval != can->config.mode) - { - can->config.mode = argval; - switch(argval) - { - case RT_CAN_MODE_NORMAL: - mode = CAN_OPERATING_MODE; - break; - case RT_CAN_MODE_LISEN: - mode = CAN_LISTENONLY_MODE; - break; - case RT_CAN_MODE_LOOPBACKANLISEN: - mode = CAN_SELFTEST_MODE; - break; - default: - return RT_EIO; - } - CAN_ModeConfig(plpccan->id, mode, ENABLE); - if(mode == CAN_SELFTEST_MODE) - { - //CAN_ModeConfig(CAN_1, CAN_TEST_MODE, ENABLE); - CAN_SetAFMode(CAN_ACC_BP); - } - } - break; - - case RT_CAN_CMD_SET_BAUD: - argval = (rt_uint32_t) arg; - if(argval != can->config.baud_rate) - { - can->config.baud_rate = argval; - return lpccan_baud_set(plpccan->id, (rt_uint32_t) arg); - } - break; - - case RT_CAN_CMD_SET_PRIV: - argval = (rt_uint32_t) arg; - if(argval != RT_CAN_MODE_PRIV || - argval != RT_CAN_MODE_NOPRIV) - { - return RT_ERROR; - } - if(argval != can->config.privmode) - { - can->config.privmode = argval; - CAN_ModeConfig(plpccan->id, CAN_TXPRIORITY_MODE, ENABLE); - } - break; - - case RT_CAN_CMD_GET_STATUS: - { - can->status.rcverrcnt = 0; - can->status.snderrcnt = 0; - can->status.errcode = 0; - if(arg != &can->status) - { - rt_memcpy(arg,&can->status,sizeof(can->status)); - } - } - break; - - } - return RT_EOK; -} - -static int sendmsg(struct rt_can_device *can, const void* buf, rt_uint32_t boxno) -{ - struct lpccandata* plpccan; - LPC_CAN_TypeDef* pCan; - struct rt_can_msg* pmsg; - rt_uint32_t SR_Mask; - rt_uint32_t CMRMsk; - - plpccan = (struct lpccandata* ) can->parent.user_data; - RT_ASSERT(plpccan != RT_NULL); - - pCan = lcpcan_get_reg_base(plpccan->id); - RT_ASSERT(pCan != RT_NULL); - - pmsg = (struct rt_can_msg*) buf; - - if(boxno > 2) - { - return RT_ERROR; - } - - CMRMsk = 0x01 | (0x01 << (boxno + 5)); - SR_Mask = 0x01 <<(boxno * 8 + 2); - - if(pCan->SR & SR_Mask) - { - volatile unsigned int *pTFI = (&pCan->TFI1 + 0 + 4 * boxno); - volatile unsigned int *pTID = (&pCan->TFI1 + 1 + 4 * boxno); - volatile unsigned int *pTDA = (&pCan->TFI1 + 2 + 4 * boxno); - volatile unsigned int *pTDB = (&pCan->TFI1 + 3 + 4 * boxno); - rt_uint32_t data; - - /* Transmit Channel 1 is available */ - /* Write frame informations and frame data into its CANxTFI1, - * CANxTID1, CANxTDA1, CANxTDB1 register */ - *pTFI &= ~ 0x000F0000; - *pTFI |= (pmsg->len) << 16; - if(pmsg->rtr == REMOTE_FRAME) - { - *pTFI |= (1 << 30); //set bit RTR - } - else - { - *pTFI &= ~(1 << 30); - } - - if(pmsg->ide == EXT_ID_FORMAT) - { - *pTFI |= (((uint32_t)1) << 31); //set bit FF - } - else - { - *pTFI &= ~(((uint32_t)1) << 31); - } - if(can->config.privmode) - { - *pTFI &= ~0x000000FF; - *pTFI |= pmsg->priv; - } - /* Write CAN ID*/ - *pTID = pmsg->id; - /*Write first 4 data bytes*/ - data = (pmsg->data[0]) | (((pmsg->data[1]))<< 8) | ((pmsg->data[2]) << 16) | ((pmsg->data[3]) << 24); - *pTDA = data; - /*Write second 4 data bytes*/ - data = (pmsg->data[4]) | (((pmsg->data[5])) << 8) | ((pmsg->data[6]) << 16) | ((pmsg->data[7]) << 24); - *pTDB = data; - /*Write transmission request*/ - pCan->CMR = CMRMsk; - return RT_EOK; - } - else - { - return RT_ERROR; - } -} - -static int recvmsg(struct rt_can_device *can, void* buf, rt_uint32_t boxno) -{ - struct lpccandata* plpccan; - LPC_CAN_TypeDef* pCan; - - plpccan = (struct lpccandata* ) can->parent.user_data; - RT_ASSERT(plpccan != RT_NULL); - pCan = lcpcan_get_reg_base(plpccan->id); - RT_ASSERT(pCan != RT_NULL); - - //CAN_ReceiveMsg - //check status of Receive Buffer - if((pCan->SR &0x00000001)) - { - uint32_t data; - struct rt_can_msg* pmsg = (struct rt_can_msg*) buf; - - /* Receive message is available */ - /* Read frame informations */ - pmsg->ide = (uint8_t)(((pCan->RFS) & 0x80000000) >> 31); - pmsg->rtr = (uint8_t)(((pCan->RFS) & 0x40000000) >> 30); - pmsg->len = (uint8_t)(((pCan->RFS) & 0x000F0000) >> 16); - /* Read CAN message identifier */ - pmsg->id = pCan->RID; - /* Read the data if received message was DATA FRAME */ - if (!pmsg->rtr) - { - /* Read first 4 data bytes */ - data = pCan->RDA; - pmsg->data[0] = data & 0x000000FF; - pmsg->data[1] = (data & 0x0000FF00) >> 8; - pmsg->data[2] = (data & 0x00FF0000) >> 16; - pmsg->data[3] = (data & 0xFF000000) >> 24; - /* Read second 4 data bytes */ - if(pmsg->len > 4) - { - data = pCan->RDB; - pmsg->data[4] = data & 0x000000FF; - pmsg->data[5] = (data & 0x0000FF00) >> 8; - pmsg->data[6] = (data & 0x00FF0000) >> 16; - pmsg->data[7] = (data & 0xFF000000) >> 24; - } - pmsg->hdr = 0; - /*release receive buffer*/ - pCan->CMR = 0x04; - } - else - { - /* Received Frame is a Remote Frame, not have data, we just receive - * message information only */ - pCan->CMR = 0x04; /*release receive buffer*/ - return SUCCESS; - } - } - else - { - // no receive message available - return ERROR; - } - return RT_EOK; -} - -static const struct rt_can_ops canops = -{ - configure, - control, - sendmsg, - recvmsg, -}; - -#ifdef RT_USING_LPCCAN1 -#ifdef RT_CAN_USING_LED -#endif -static struct lpccandata lpccandata1 = -{ - CAN_ID_1, -}; -static struct rt_can_device lpccan1; -#endif /*RT_USINGLPCCAN1*/ - -#ifdef RT_USING_LPCCAN2 -#ifdef RT_CAN_USING_LED -#endif -static struct lpccandata lpccandata2 = -{ - CAN_ID_2, -}; -static struct rt_can_device lpccan2; -#endif /*RT_USINGLPCCAN2*/ - -/*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/ -/*********************************************************************//** - * @brief Event Router IRQ Handler - * @param[in] None - * @return None - **********************************************************************/ -void CAN_IRQHandler(void) -{ - rt_uint32_t IntStatus; - rt_interrupt_enter(); -#ifdef RT_USING_LPCCAN1 - IntStatus = CAN_IntGetStatus(CAN_1); - //check receive interrupt - if((IntStatus >> 0) & 0x01) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_RX_IND | 0<<8); - } - //check Transmit Interrupt interrupt1 - if((IntStatus >> 1) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_1, CANCTRL_STS); - if(state & (0x01 << 3)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 0<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 0<<8); - } - } - //check Error Warning Interrupt - if((IntStatus >> 2) & 0x01) - { - rt_uint32_t errtype; - rt_uint32_t state; - - errtype = (IntStatus >> 16); - if(errtype & 0x1F && lpccan1.status.lasterrtype == (errtype & 0x1F)) - { - switch((errtype & 0x1F)) - { - case 00011: // Start of Frame - case 00010: // ID28 ... ID21 - case 00110: //ID20 ... ID18 - case 00100: // SRTR Bit - case 00101: // IDE bit - case 00111: // ID17 ... 13 - case 01111: // ID12 ... ID5 - case 01110: // ID4 ... ID0 - case 01100: // RTR Bit - case 01011: // Data Length Code - case 01010: // Data Field - lpccan1.status.formaterrcnt++; - break; - case 01101: // Reserved Bit 1 - case 01001: // Reserved Bit 0 - lpccan1.status.bitpaderrcnt++; - break; - case 01000: // CRC Sequence - case 11000: // CRC Delimiter - lpccan1.status.crcerrcnt++; - break; - case 11001: // Acknowledge Slot - case 11011: // Acknowledge Delimiter - lpccan1.status.ackerrcnt++; - break; - case 11010: // End of Frame - case 10010: // Intermission - lpccan1.status.formaterrcnt++; - break; - } - lpccan1.status.lasterrtype = errtype & 0x1F; - } - - state = CAN_GetCTRLStatus(CAN_1, CANCTRL_GLOBAL_STS); - lpccan1.status.rcverrcnt = (state >> 16) & 0xFF; - lpccan1.status.snderrcnt = (state >> 24) & 0xFF; - lpccan1.status.errcode = (state >> 5) & 0x06; - } - //check Data Overrun Interrupt Interrupt - if((IntStatus >> 3) & 0x01) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_RXOF_IND | 0<<8); - } - //check Transmit Interrupt interrupt2 - if((IntStatus >> 9) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_1, CANCTRL_STS); - if(state & (0x01 << 11)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 1<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 1<<8); - } - } - //check Transmit Interrupt interrupt3 - if((IntStatus >> 10) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_1, CANCTRL_STS); - if(state & (0x01 << 19)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 2<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 2<<8); - } - } -#endif /*RT_USING_LPCCAN1*/ - -#ifdef RT_USING_LPCCAN2 - IntStatus = CAN_IntGetStatus(CAN_2); - //check receive interrupt - if((IntStatus >> 0) & 0x01) - { - rt_hw_can_isr(&lpccan2,RT_CAN_EVENT_RX_IND | 0<<8); - } - //check Transmit Interrupt interrupt1 - if((IntStatus >> 1) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_2, CANCTRL_STS); - if(state & (0x01 << 3)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 0<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 0<<8); - } - } - - //check Error Warning Interrupt - if((IntStatus >> 2) & 0x01) - { - rt_uint32_t errtype; - errtype = (IntStatus >> 16); - if(errtype & 0x1F && lpccan2.status.lasterrtype == (errtype & 0x1F)) - { - switch((errtype & 0x1F)) - { - case 00011: // Start of Frame - case 00010: // ID28 ... ID21 - case 00110: //ID20 ... ID18 - case 00100: // SRTR Bit - case 00101: // IDE bit - case 00111: // ID17 ... 13 - case 01111: // ID12 ... ID5 - case 01110: // ID4 ... ID0 - case 01100: // RTR Bit - case 01011: // Data Length Code - case 01010: // Data Field - lpccan2.status.formaterrcnt++; - break; - case 01101: // Reserved Bit 1 - case 01001: // Reserved Bit 0 - lpccan2.status.bitpaderrcnt++; - break; - case 01000: // CRC Sequence - case 11000: // CRC Delimiter - lpccan2.status.crcerrcnt++; - break; - case 11001: // Acknowledge Slot - case 11011: // Acknowledge Delimiter - lpccan2.status.ackerrcnt++; - break; - case 11010: // End of Frame - case 10010: // Intermission - lpccan2.status.formaterrcnt++; - break; - } - lpccan2.status.lasterrtype = errtype & 0x1F; - } - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_2, CANCTRL_GLOBAL_STS); - lpccan2.status.rcverrcnt = (state >> 16) & 0xFF; - lpccan2.status.snderrcnt = (state >> 24) & 0xFF; - lpccan2.status.errcode = (state >> 5) & 0x06; - } - - //check Data Overrun Interrupt Interrupt - if((IntStatus >> 3) & 0x01) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_RXOF_IND | 0<<8); - } - - //check Transmit Interrupt interrupt2 - if((IntStatus >> 9) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_2, CANCTRL_STS); - if(state & (0x01 << 11)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 1<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 1<<8); - } - } - - //check Transmit Interrupt interrupt3 - if((IntStatus >> 10) & 0x01) - { - rt_uint32_t state = 0; - state = CAN_GetCTRLStatus(CAN_2, CANCTRL_STS); - if(state & (0x01 << 19)) - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_DONE | 2<<8); - } - else - { - rt_hw_can_isr(&lpccan1,RT_CAN_EVENT_TX_FAIL | 2<<8); - } - } -#endif /*RT_USING_LPCCAN2*/ - rt_interrupt_leave(); -} - -int lpc_can_init(void) -{ -#ifdef RT_USING_LPCCAN1 - lpccan1.config.baud_rate=CAN1MBaud; - lpccan1.config.msgboxsz=16; - lpccan1.config.sndboxnumber=3; - lpccan1.config.mode=RT_CAN_MODE_NORMAL; - lpccan1.config.privmode=0; - -#ifdef RT_CAN_USING_LED -#endif - - lpccan1.config.ticks = 50; - -#ifdef RT_CAN_USING_HDR -#endif - - //Enable CAN Interrupt - NVIC_EnableIRQ(CAN_IRQn); - rt_hw_can_register(&lpccan1, "lpccan1", &canops, &lpccandata1); -#endif /*RT_USING_LPCCAN1*/ - -#ifdef RT_USING_LPCCAN2 - lpccan2.config.baud_rate=CAN1MBaud; - lpccan2.config.msgboxsz=16; - lpccan2.config.sndboxnumber=3; - lpccan2.config.mode=RT_CAN_MODE_NORMAL; - lpccan2.config.privmode=0; - -#ifdef RT_CAN_USING_LED -#endif - - lpccan2.config.ticks = 50; - -#ifdef RT_CAN_USING_HDR -#endif - - //Enable CAN Interrupt - NVIC_EnableIRQ(CAN_IRQn); - -#ifdef RT_CAN_USING_HDR -#endif - - rt_hw_can_register(&lpccan2, "lpccan2", &canops, &lpccandata2); -#endif /*RT_USING_LPCCAN2*/ - - return RT_EOK; -} -INIT_BOARD_EXPORT(lpc_can_init); - -#endif /*RT_USING_CAN*/ diff --git a/bsp/lpc408x/drivers/drv_lpccan.h b/bsp/lpc408x/drivers/drv_lpccan.h deleted file mode 100644 index 9dda61a1f6..0000000000 --- a/bsp/lpc408x/drivers/drv_lpccan.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2015-06-30 [email protected] first version - */ - -#ifndef DRV_LPCCAN_H_ -#define DRV_LPCCAN_H_ -#include <rthw.h> -#include <rtdevice.h> - -#define LPC_CAN_AF_STD_INIT(id) \ - RT_CAN_FILTER_ITEM_INIT(id,0,0,0,0xFFFFFFFF) -#define LPC_CAN_AF_EXT_INIT(id) \ - RT_CAN_FILTER_ITEM_INIT(id,1,0,0,0xFFFFFFFF) -#define LPC_CAN_AF_STD_GRP_INIT(id1,id2) \ - RT_CAN_FILTER_ITEM_INIT(id1,0,0,1,id2) -#define LPC_CAN_AF_EXT_GRP_INIT(id1,id2) \ - RT_CAN_FILTER_ITEM_INIT(id1,1,0,1,id2) - -#endif /*DRV_LPCCAN_H_*/ diff --git a/bsp/lpc408x/drivers/drv_sdram.c b/bsp/lpc408x/drivers/drv_sdram.c index 515659f244..0bb9ec6eb3 100644 --- a/bsp/lpc408x/drivers/drv_sdram.c +++ b/bsp/lpc408x/drivers/drv_sdram.c @@ -8,20 +8,14 @@ * 2013-05-19 Bernard The first version for LPC40xx */ +#include <rtthread.h> + +#ifdef BSP_USING_SDRAM #include "drv_sdram.h" #include <lpc_emc.h> #include <lpc_timer.h> -#define SDRAM_BASE_ADDR 0xA0000000 -#define SDRAM_SIZE 0x2000000 - -/******************************************************************************************* -* @��������sdram_gpio_config() -* @���� ��void -* @����ֵ��void -* @���� ��SDRAM�ܽ����ú������ڲ����� -*********************************************************************************************/ static void sdram_gpio_config(void) { LPC_IOCON->P3_0 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D0 @ P3.0 */ @@ -78,7 +72,7 @@ static void sdram_gpio_config(void) LPC_IOCON->P2_29 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* DQM[1] @ P2.29 */ } -void lpc_sdram_hw_init(void) +void rt_hw_sdram_init(void) { volatile uint32_t i; volatile uint32_t dwtemp; @@ -88,7 +82,7 @@ void lpc_sdram_hw_init(void) TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL; TIM_ConfigStruct.PrescaleValue = 1; - // Set configuration for Tim_config and Tim_MatchConfig + /* Set configuration for Tim_config and Tim_MatchConfig */ TIM_Init(LPC_TIM0, TIM_TIMER_MODE, &TIM_ConfigStruct); LPC_SC->PCONP |= 0x00000800; @@ -97,53 +91,55 @@ void lpc_sdram_hw_init(void) LPC_EMC->Config = 0x00000000; sdram_gpio_config(); - //LPC_SC->EMCCLKSEL = 1; //����Ƶ��һ��Ƶ�ʣ�60Mhz - LPC_EMC->DynamicRP = EMC_NS2CLK(20); /* 20ns, */ - LPC_EMC->DynamicRAS = /*EMC_NS2CLK(42, nsPerClk);*/ 15; /* 42ns to 100K ns, */ - LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk, */ - LPC_EMC->DynamicAPR = 2 - 1; /* Not found!!! Estimated as 2clk, */ - LPC_EMC->DynamicDAL = EMC_NS2CLK(20) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */ - LPC_EMC->DynamicWR = 2 - 1; /* 2CLK, */ - LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/ - LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */ - LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active, ��֪������Ϊ��� */ - LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */ - LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */ - LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */ + LPC_EMC->DynamicRP = EMC_NS2CLK(20); /* 20ns */ + LPC_EMC->DynamicRAS = 15; /* EMC_NS2CLK(42, nsPerClk),42ns to 100K ns */ + LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk */ + LPC_EMC->DynamicAPR = 2 - 1; /* Not found!!! Estimated as 2clk */ + LPC_EMC->DynamicDAL = EMC_NS2CLK(20) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */ + LPC_EMC->DynamicWR = 2 - 1; /* 2CLK */ + LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/ + LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */ + LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active */ + LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */ + LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */ + + LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */ /* H57V2562GTR-75C: tCL=3CLK, tRCD=20ns(min), 3 CLK=24ns */ LPC_EMC->DynamicRasCas0 = 0x303; /* For Manley lpc1778 SDRAM: H57V2562GTR-75C, 256Mb, 16Mx16, 4 banks, row=13, column=9 */ #ifdef SDRAM_CONFIG_16BIT - LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */ + LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */ #elif defined SDRAM_CONFIG_32BIT - LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */ + LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */ #endif TIM_Waitms(100); - LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */ - TIM_Waitms(200); /* wait 200ms */ + LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */ + TIM_Waitms(200); /* wait 200ms */ - LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */ + LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */ - LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */ - for (i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */ + LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */ + for (i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */ LPC_EMC->DynamicRefresh = EMC_SDRAM_REFRESH(64); - LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */ + LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */ #ifdef SDRAM_CONFIG_16BIT - wtemp = *((volatile uint16_t *)(SDRAM_BASE | (0x33 << 12))); /* 8 burst, 3 CAS latency */ + wtemp = *((volatile uint16_t *)(EXT_SDRAM_BEGIN | (0x33 << 12))); /* 8 burst, 3 CAS latency */ #elif defined SDRAM_CONFIG_32BIT - dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */ + dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */ #endif - LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */ + LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */ - LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */ + LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */ TIM_Waitms(1); TIM_DeInit(LPC_TIM0); } + +#endif /* BSP_USING_SDRAM */ diff --git a/bsp/lpc408x/drivers/drv_sdram.h b/bsp/lpc408x/drivers/drv_sdram.h index 21c0791f32..74ceab2d18 100644 --- a/bsp/lpc408x/drivers/drv_sdram.h +++ b/bsp/lpc408x/drivers/drv_sdram.h @@ -8,24 +8,25 @@ * 2013-05-19 Bernard The first version for LPC40xx */ -#ifndef __DRV_SDRAM_H__ -#define __DRV_SDRAM_H__ +#ifndef DRV_SDRAM_H__ +#define DRV_SDRAM_H__ #include <board.h> -#define SDRAM_CONFIG_16BIT //use the 16 bitSDRAM -//#define SDRAM_CONFIG_32BIT //use the 32 bitSDRAM +#define SDRAM_CONFIG_16BIT /* use the 16 bitSDRAM */ +//#define SDRAM_CONFIG_32BIT /* use the 32 bitSDRAM */ #ifdef SDRAM_CONFIG_16BIT -#define SDRAM_SIZE 0x2000000 // 256Mbit -#elif defined SDRAM_CONFIG_32BIT // -#define SDRAM_SIZE 0x4000000 // 512Mbit + #define EXT_SDRAM_SIZE 0x2000000 /* 256Mbit */ +#elif defined SDRAM_CONFIG_32BIT + #define EXT_SDRAM_SIZE 0x4000000 /* 512Mbit */ #else -error Wrong SDRAM config, check ex_sdram.h + error Wrong SDRAM config, check ex_sdram.h #endif -#define SDRAM_BASE 0xA0000000 /* CS0 */ +#define EXT_SDRAM_BEGIN 0xA0000000 /* CS0 */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + EXT_SDRAM_SIZE) -void lpc_sdram_hw_init(void); +void rt_hw_sdram_init(void); -#endif +#endif /* DRV_SDRAM_H__ */ diff --git a/bsp/lpc408x/drivers/drv_uart.c b/bsp/lpc408x/drivers/drv_uart.c index 8360ca17c6..09a518f4ab 100644 --- a/bsp/lpc408x/drivers/drv_uart.c +++ b/bsp/lpc408x/drivers/drv_uart.c @@ -8,12 +8,12 @@ * 2013-05-18 Bernard The first version for LPC40xx */ -#include <rthw.h> #include <rtthread.h> #include <rtdevice.h> - #include "board.h" +#ifdef RT_USING_SERIAL + struct lpc_uart { LPC_UART_TypeDef *UART; @@ -48,7 +48,6 @@ static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_con /*enable and reset FIFO*/ uart->UART->FCR = 0x07; - return RT_EOK; } @@ -104,11 +103,7 @@ static const struct rt_uart_ops lpc_uart_ops = lpc_getc, }; -#ifdef RT_USING_UART0 -/* UART0 device driver structure */ -#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */ -struct serial_ringbuffer uart0_int_rx; -#endif +#ifdef BSP_USING_UART0 struct lpc_uart uart0 = { @@ -128,14 +123,9 @@ void UART0_IRQHandler(void) IIR &= 0x0e; switch (IIR) { - case 0x04: case 0x0C: - #if RTTHREAD_VERSION < 20000 - rt_hw_serial_isr(&serial0); - #else rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND); - #endif break; case 0x06: tmp = LPC_UART0->LSR; @@ -148,11 +138,8 @@ void UART0_IRQHandler(void) rt_interrupt_leave(); } #endif -#ifdef RT_USING_UART2 -/* UART2 device driver structure */ -#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */ -struct serial_ringbuffer uart2_int_rx; -#endif + +#ifdef BSP_USING_UART2 struct lpc_uart uart2 = { @@ -174,11 +161,7 @@ void UART2_IRQHandler(void) { case 0x04: case 0x0C: - #if RTTHREAD_VERSION < 20000 - rt_hw_serial_isr(&serial2); - #else rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND); - #endif break; case 0x06: tmp = LPC_UART2->LSR; @@ -193,66 +176,19 @@ void UART2_IRQHandler(void) } #endif -#ifdef RT_USING_UART4 -/* UART4 device driver structure */ -#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */ -struct serial_ringbuffer uart4_int_rx; -#endif - -struct lpc_uart uart4 = -{ - LPC_UART4, - UART4_IRQn, -}; -struct rt_serial_device serial4; - -void UART4_IRQHandler(void) -{ - volatile uint32_t IIR, tmp; - - /* enter interrupt */ - rt_interrupt_enter(); - - IIR = LPC_UART4->IIR; - IIR &= 0x0e; - switch (IIR) - { - case 0x04: - case 0x0C: - #if RTTHREAD_VERSION < 20000 - rt_hw_serial_isr(&serial4); - #else - rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND); - #endif - break; - case 0x06: - tmp = LPC_UART4->LSR; - break; - default : - tmp = LPC_UART4->LSR; - break; - } - - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -void rt_hw_uart_init(void) +int rt_hw_uart_init(void) { + rt_err_t ret = RT_EOK; struct lpc_uart *uart; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; -#ifdef RT_USING_UART0 +#ifdef BSP_USING_UART0 uart = &uart0; serial0.ops = &lpc_uart_ops; serial0.config = config; - #if RTTHREAD_VERSION < 20000 - serial0.int_rx = &uart0_int_rx; - #endif serial0.parent.user_data = uart; - + /* * Initialize UART0 pin connect * P0.2: U0_TXD @@ -273,19 +209,16 @@ void rt_hw_uart_init(void) NVIC_EnableIRQ(uart->UART_IRQn); /* register UART0 device */ - rt_hw_serial_register(&serial0, "uart0", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - uart); + ret = rt_hw_serial_register(&serial0, "uart0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + uart); #endif -#ifdef RT_USING_UART2 +#ifdef BSP_USING_UART2 uart = &uart2; serial2.ops = &lpc_uart_ops; serial2.config = config; - #if RTTHREAD_VERSION < 20000 - serial2.int_rx = &uart2_int_rx; - #endif serial2.parent.user_data = uart; /* @@ -307,42 +240,13 @@ void rt_hw_uart_init(void) NVIC_EnableIRQ(uart->UART_IRQn); /* register UART2 device */ - rt_hw_serial_register(&serial2, "uart2", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - uart); + ret = rt_hw_serial_register(&serial2, "uart2", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, + uart); #endif -#ifdef RT_USING_UART4 - uart = &uart4; - - serial4.ops = &lpc_uart_ops; - serial4.config = config; - #if RTTHREAD_VERSION < 20000 - serial4.int_rx = &uart4_int_rx; - #endif - serial4.parent.user_data = uart; - - /* - * Initialize UART2 pin connect - * P5.4: U2_TXD - * P5.3: U2_RXD - */ - LPC_IOCON->P5_4 &= ~0x07; - LPC_IOCON->P5_3 &= ~0x07; - LPC_IOCON->P5_4 |= 0x04; - LPC_IOCON->P5_3 |= 0x04; - - /* enable the uart4 power and clock */ - LPC_SC->PCONP |= 0x01 << 8; - /* preemption = 1, sub-priority = 1 */ - NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01)); - - /* Enable Interrupt for UART channel */ - NVIC_EnableIRQ(uart->UART_IRQn); - - /* register UART2 device */ - rt_hw_serial_register(&serial4, "uart4", - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, - uart); -#endif + return ret; } +INIT_BOARD_EXPORT(rt_hw_uart_init); + +#endif /* RT_USING_SERIAL */ diff --git a/bsp/lpc408x/drivers/drv_uart.h b/bsp/lpc408x/drivers/drv_uart.h index aee8a379ed..6fbe0535a5 100644 --- a/bsp/lpc408x/drivers/drv_uart.h +++ b/bsp/lpc408x/drivers/drv_uart.h @@ -8,8 +8,8 @@ * 2014-01-05 NongXiaoming The first version for LPC40xx */ -#ifndef __UART_H__ -#define __UART_H__ +#ifndef DRV_UART_H__ +#define DRV_UART_H__ void rt_hw_uart_init(void); diff --git a/bsp/lpc408x/rtthread-lpc408x.ld b/bsp/lpc408x/drivers/linker_scripts/link.lds index 746f3948eb..ddf10a2c20 100644 --- a/bsp/lpc408x/rtthread-lpc408x.ld +++ b/bsp/lpc408x/drivers/linker_scripts/link.lds @@ -6,8 +6,8 @@ /* Program Entry, set to mark it as "used" and avoid gc */ MEMORY { - CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 - DATA (rw) : ORIGIN = 0x10000000, LENGTH = 0x00010000 + CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 512k flash */ + DATA (rw) : ORIGIN = 0x10000000, LENGTH = 64k /* 64k sram */ } ENTRY(Reset_Handler) _system_stack_size = 0x200; @@ -38,6 +38,7 @@ SECTIONS __vsymtab_end = .; . = ALIGN(4); + /* section information for initial. */ . = ALIGN(4); __rt_init_start = .; KEEP(*(SORT(.rti_fn*))) diff --git a/bsp/lpc408x/rtthread-lpc408x.sct b/bsp/lpc408x/drivers/linker_scripts/link.sct index 893f49ce4a..893f49ce4a 100644 --- a/bsp/lpc408x/rtthread-lpc408x.sct +++ b/bsp/lpc408x/drivers/linker_scripts/link.sct diff --git a/bsp/lpc408x/project.uvopt b/bsp/lpc408x/project.uvopt index bfe099d207..b3e8bc92df 100644 --- a/bsp/lpc408x/project.uvopt +++ b/bsp/lpc408x/project.uvopt @@ -21,7 +21,7 @@ </DaveTm> <Target> - <TargetName>RT-Thread LPC408x</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <TargetOption> @@ -43,7 +43,7 @@ <PageWidth>79</PageWidth> <PageLength>66</PageLength> <TabStop>8</TabStop> - <ListingPath>.\build\</ListingPath> + <ListingPath>.\build\keil\List\</ListingPath> </OPTLEX> <ListingPage> <CreateCListing>1</CreateCListing> @@ -75,17 +75,7 @@ <tvExpOptDlg>0</tvExpOptDlg> <IsCurrentTarget>1</IsCurrentTarget> </OPTFL> - <CpuCode>0</CpuCode> - <DllOpt> - <SimDllName>SARMCM3.DLL</SimDllName> - <SimDllArguments>-MPU</SimDllArguments> - <SimDlgDllName>DCM.DLL</SimDlgDllName> - <SimDlgDllArguments>-pCM4</SimDlgDllArguments> - <TargetDllName>SARMCM3.DLL</TargetDllName> - <TargetDllArguments>-MPU</TargetDllArguments> - <TargetDlgDllName>TCM.DLL</TargetDlgDllName> - <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> - </DllOpt> + <CpuCode>8</CpuCode> <DebugOpt> <uSim>0</uSim> <uTrg>1</uTrg> @@ -97,16 +87,19 @@ <sRfunc>1</sRfunc> <sRbox>1</sRbox> <tLdApp>1</tLdApp> - <tGomain>0</tGomain> + <tGomain>1</tGomain> <tRbreak>1</tRbreak> <tRwatch>1</tRwatch> <tRmem>1</tRmem> <tRfunc>0</tRfunc> <tRbox>1</tRbox> <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>0</tPdscDbg> <sRunDeb>0</sRunDeb> <sLrtime>0</sLrtime> - <nTsel>7</nTsel> + <nTsel>6</nTsel> <sDll></sDll> <sDllPa></sDllPa> <sDlgDll></sDlgDll> @@ -123,7 +116,12 @@ <SetRegEntry> <Number>0</Number> <Key>JL2CM3</Key> - <Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name> + <Name>-U30000299 -O4303 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-O4303 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000)</Name> </SetRegEntry> </TargetDriverDllRegistry> <Breakpoint/> diff --git a/bsp/lpc408x/project.uvoptx b/bsp/lpc408x/project.uvoptx new file mode 100644 index 0000000000..9505c2dd20 --- /dev/null +++ b/bsp/lpc408x/project.uvoptx @@ -0,0 +1,177 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rtthread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>8</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>4</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512.FLM -FS00 -FL080000 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FN1 -FCFE0 -FD10000000 -FF0LPC_IAP_512 -FL080000 -FS00 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + +</ProjectOpt> diff --git a/bsp/lpc408x/project.uvproj b/bsp/lpc408x/project.uvproj index 77e8969074..65b2b2c276 100644 --- a/bsp/lpc408x/project.uvproj +++ b/bsp/lpc408x/project.uvproj @@ -4,7 +4,7 @@ <Header>### uVision Project, (C) Keil Software</Header> <Targets> <Target> - <TargetName>RT-Thread LPC408x</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <TargetOption> @@ -27,6 +27,7 @@ <SLE66AMisc /> <SLE66LinkerMisc /> <SFDFile>SFD\NXP\LPC407x_8x_177x_8x\LPC408x_7x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> <BinPath /> <IncludePath /> @@ -40,21 +41,21 @@ <NotGenerated>0</NotGenerated> <InvalidFlash>1</InvalidFlash> </TargetStatus> - <OutputDirectory>.\build\</OutputDirectory> - <OutputName>rtthread-lpc</OutputName> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rtthread</OutputName> <CreateExecutable>1</CreateExecutable> <CreateLib>0</CreateLib> <CreateHexFile>0</CreateHexFile> <DebugInformation>1</DebugInformation> - <BrowseInformation>1</BrowseInformation> - <ListingPath>.\build\</ListingPath> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> <HexFormatSelection>1</HexFormatSelection> <Merge32K>0</Merge32K> <CreateBatchFile>0</CreateBatchFile> <BeforeCompile> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name /> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> @@ -94,6 +95,7 @@ <StopOnExitCode>3</StopOnExitCode> <CustomArgument /> <IncludeLibraryModules /> + <ComprImg>1</ComprImg> </CommonProperty> <DllOption> <SimDllName>SARMCM3.DLL</SimDllName> @@ -123,20 +125,23 @@ <RestoreFunctions>1</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> </Simulator> <Target> <UseTarget>1</UseTarget> <LoadApplicationAtStartup>1</LoadApplicationAtStartup> - <RunToMain>0</RunToMain> + <RunToMain>1</RunToMain> <RestoreBreakpoints>1</RestoreBreakpoints> <RestoreWatchpoints>1</RestoreWatchpoints> <RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreFunctions>0</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + <UsePdscDebugDescription>0</UsePdscDebugDescription> </Target> <RunDebugAfterBuild>0</RunDebugAfterBuild> - <TargetSelection>7</TargetSelection> + <TargetSelection>6</TargetSelection> <SimDlls> <CpuDll /> <CpuDllArguments /> @@ -158,14 +163,18 @@ <UseTargetDll>1</UseTargetDll> <UseExternalTool>0</UseExternalTool> <RunIndependent>0</RunIndependent> - <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> <Capability>1</Capability> <DriverSelection>4099</DriverSelection> </Flash1> - <bUseTDR>0</bUseTDR> + <bUseTDR>1</bUseTDR> <Flash2>Segger\JL2CM3.dll</Flash2> <Flash3>"" ()</Flash3> <Flash4 /> + <pFcarmOut /> + <pFcarmGrp /> + <pFcArmRoot /> + <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> <ArmAdsMisc> @@ -344,11 +353,13 @@ <wLevel>0</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> + <uC99>0</uC99> + <useXO>0</useXO> <VariousControls> <MiscControls /> - <Define>CORE_M4, RT_USING_ARM_LIBC</Define> + <Define>CORE_M4</Define> <Undefine /> - <IncludePath>drivers;applications;.;Libraries/Drivers/include;Libraries/Device/NXP/LPC407x_8x_177x_8x/Include;Libraries/CMSIS/Include;../../include;../../libcpu/arm/cortex-m4;../../libcpu/arm/common;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/libc/pthreads;../../components/libc/time;../../components/libc/compilers/armlibc;../../components/finsh</IncludePath> + <IncludePath>.;..\..\include;applications;.;drivers;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include;Libraries\CMSIS\Include;Libraries\Drivers\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh</IncludePath> </VariousControls> </Cads> <Aads> @@ -360,6 +371,7 @@ <SwStkChk>0</SwStkChk> <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> + <useXO>0</useXO> <VariousControls> <MiscControls /> <Define /> @@ -376,10 +388,11 @@ <useFile>0</useFile> <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x10000000</DataAddressRange> + <pXoBase /> <ScatterFile /> <IncludeLibs /> <IncludeLibsPath /> - <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc> + <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> <LinkerInputFile /> <DisabledWarnings /> </LDads> @@ -387,621 +400,492 @@ </TargetOption> <Groups> <Group> - <GroupName>Drivers</GroupName> - <Files> - <File> - <FileName>drv_hwtimer.c</FileName> - <FileType>1</FileType> - <FilePath>drivers/drv_hwtimer.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>drv_led.c</FileName> - <FileType>1</FileType> - <FilePath>drivers/drv_led.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>drv_lpccan.c</FileName> - <FileType>1</FileType> - <FilePath>drivers/drv_lpccan.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>drv_sdram.c</FileName> - <FileType>1</FileType> - <FilePath>drivers/drv_sdram.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>drv_uart.c</FileName> - <FileType>1</FileType> - <FilePath>drivers/drv_uart.c</FilePath> - </File> - </Files> - </Group> - <Group> - <GroupName>Applications</GroupName> - <Files> - <File> - <FileName>application.c</FileName> - <FileType>1</FileType> - <FilePath>applications/application.c</FilePath> - </File> - </Files> + <GroupName>Kernel</GroupName> <Files> <File> - <FileName>board.c</FileName> + <FileName>clock.c</FileName> <FileType>1</FileType> - <FilePath>applications/board.c</FilePath> + <FilePath>..\..\src\clock.c</FilePath> </File> </Files> <Files> <File> - <FileName>canapp.c</FileName> + <FileName>components.c</FileName> <FileType>1</FileType> - <FilePath>applications/canapp.c</FilePath> + <FilePath>..\..\src\components.c</FilePath> </File> </Files> <Files> <File> - <FileName>sram.c</FileName> + <FileName>cpu.c</FileName> <FileType>1</FileType> - <FilePath>applications/sram.c</FilePath> + <FilePath>..\..\src\cpu.c</FilePath> </File> </Files> <Files> <File> - <FileName>startup.c</FileName> + <FileName>device.c</FileName> <FileType>1</FileType> - <FilePath>applications/startup.c</FilePath> + <FilePath>..\..\src\device.c</FilePath> </File> </Files> - </Group> - <Group> - <GroupName>Libraries</GroupName> <Files> <File> - <FileName>lpc_adc.c</FileName> + <FileName>idle.c</FileName> <FileType>1</FileType> - <FilePath>Libraries/Drivers/source/lpc_adc.c</FilePath> + <FilePath>..\..\src\idle.c</FilePath> </File> </Files> <Files> <File> - <FileName>lpc_bod.c</FileName> + <FileName>ipc.c</FileName> <FileType>1</FileType> - <FilePath>Libraries/Drivers/source/lpc_bod.c</FilePath> + <FilePath>..\..\src\ipc.c</FilePath> </File> </Files> <Files> <File> - <FileName>lpc_can.c</FileName> + <FileName>irq.c</FileName> <FileType>1</FileType> - <FilePath>Libraries/Drivers/source/lpc_can.c</FilePath> + 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<FileType>1</FileType> - <FilePath>../../components/libc/pthreads/pthread_rwlock.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\devfs\devfs.c</FilePath> </File> </Files> <Files> <File> - <FileName>pthread_spin.c</FileName> + <FileName>dfs_elm.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/pthreads/pthread_spin.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath> </File> </Files> <Files> <File> - <FileName>pthread_tls.c</FileName> + <FileName>ff.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/pthreads/pthread_tls.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>sched.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/libc/pthreads/sched.c</FilePath> + <FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath> </File> </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> <Files> <File> - <FileName>semaphore.c</FileName> + <FileName>pin.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/pthreads/semaphore.c</FilePath> + <FilePath>..\..\components\drivers\misc\pin.c</FilePath> </File> </Files> <Files> <File> - <FileName>clock_time.c</FileName> + <FileName>serial.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/time/clock_time.c</FilePath> + <FilePath>..\..\components\drivers\serial\serial.c</FilePath> </File> </Files> <Files> <File> - <FileName>posix_sleep.c</FileName> + <FileName>completion.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/time/posix_sleep.c</FilePath> + <FilePath>..\..\components\drivers\src\completion.c</FilePath> </File> </Files> - </Group> - <Group> - <GroupName>libc</GroupName> <Files> <File> - <FileName>libc.c</FileName> + <FileName>dataqueue.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/libc.c</FilePath> + <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath> </File> </Files> <Files> <File> - <FileName>libc_syms.c</FileName> + <FileName>pipe.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/libc_syms.c</FilePath> + <FilePath>..\..\components\drivers\src\pipe.c</FilePath> </File> </Files> <Files> <File> - <FileName>mem_std.c</FileName> + <FileName>ringblk_buf.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/mem_std.c</FilePath> + <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath> </File> </Files> <Files> <File> - <FileName>stdio.c</FileName> + <FileName>ringbuffer.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/stdio.c</FilePath> + <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath> </File> </Files> <Files> <File> - <FileName>stubs.c</FileName> + <FileName>waitqueue.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/stubs.c</FilePath> + <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath> </File> </Files> <Files> <File> - <FileName>time.c</FileName> + <FileName>workqueue.c</FileName> <FileType>1</FileType> - <FilePath>../../components/libc/compilers/armlibc/time.c</FilePath> + <FilePath>..\..\components\drivers\src\workqueue.c</FilePath> </File> </Files> </Group> @@ -1011,112 +895,42 @@ <File> <FileName>shell.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/shell.c</FilePath> + <FilePath>..\..\components\finsh\shell.c</FilePath> </File> </Files> <Files> <File> <FileName>symbol.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/symbol.c</FilePath> + <FilePath>..\..\components\finsh\symbol.c</FilePath> </File> </Files> <Files> <File> <FileName>cmd.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/cmd.c</FilePath> + <FilePath>..\..\components\finsh\cmd.c</FilePath> </File> </Files> <Files> <File> <FileName>msh.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/msh.c</FilePath> + <FilePath>..\..\components\finsh\msh.c</FilePath> </File> </Files> <Files> <File> <FileName>msh_cmd.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/msh_cmd.c</FilePath> + <FilePath>..\..\components\finsh\msh_cmd.c</FilePath> </File> </Files> <Files> <File> <FileName>msh_file.c</FileName> <FileType>1</FileType> - <FilePath>../../components/finsh/msh_file.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_compiler.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_compiler.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_error.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_error.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_heap.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_heap.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_init.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_init.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_node.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_node.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_ops.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_ops.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_parser.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_parser.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_var.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_var.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_vm.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_vm.c</FilePath> - </File> - </Files> - <Files> - <File> - <FileName>finsh_token.c</FileName> - <FileType>1</FileType> - <FilePath>../../components/finsh/finsh_token.c</FilePath> + <FilePath>..\..\components\finsh\msh_file.c</FilePath> </File> </Files> </Group> diff --git a/bsp/lpc408x/project.uvprojx b/bsp/lpc408x/project.uvprojx index c9a4fc4fbf..2ca6ba93d8 100644 --- a/bsp/lpc408x/project.uvprojx +++ b/bsp/lpc408x/project.uvprojx @@ -1,45 +1,43 @@ <?xml version="1.0" encoding="UTF-8" standalone="no" ?> <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> - <SchemaVersion>2.1</SchemaVersion> - <Header>### uVision Project, (C) Keil Software</Header> - <Targets> <Target> - <TargetName>RT-Thread LPC408X</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> - <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed> + <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed> + <uAC6>0</uAC6> <TargetOption> <TargetCommonOption> - <Device>ARMCM4</Device> - <Vendor>ARM</Vendor> - <PackID>ARM.CMSIS.5.0.0</PackID> + <Device>LPC4088FET208</Device> + <Vendor>NXP</Vendor> + <PackID>Keil.LPC4000_DFP.2.1.0</PackID> <PackURL>http://www.keil.com/pack/</PackURL> - <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu> - <FlashUtilSpec></FlashUtilSpec> - <StartupFile></StartupFile> - <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll> + <Cpu>IRAM(0x10000000,0x10000) IRAM2(0x20000000,0x8000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec /> + <StartupFile /> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM))</FlashDriverDll> <DeviceId>0</DeviceId> - <RegisterFile>$$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h</RegisterFile> - <MemoryEnv></MemoryEnv> - <Cmp></Cmp> - <Asm></Asm> - <Linker></Linker> - <OHString></OHString> - <InfinionOptionDll></InfinionOptionDll> - <SLE66CMisc></SLE66CMisc> - <SLE66AMisc></SLE66AMisc> - <SLE66LinkerMisc></SLE66LinkerMisc> - <SFDFile>$$Device:ARMCM4$Device\ARM\SVD\ARMCM4.svd</SFDFile> + <RegisterFile>$$Device:LPC4088FET208$Device\Include\LPC407x_8x_177x_8x.h</RegisterFile> + <MemoryEnv /> + <Cmp /> + <Asm /> + <Linker /> + <OHString /> + <InfinionOptionDll /> + <SLE66CMisc /> + <SLE66AMisc /> + <SLE66LinkerMisc /> + <SFDFile>$$Device:LPC4088FET208$SVD\LPC408x_7x.svd</SFDFile> <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> - <BinPath></BinPath> - <IncludePath></IncludePath> - <LibPath></LibPath> - <RegisterFilePath></RegisterFilePath> - <DBRegisterFilePath></DBRegisterFilePath> + <BinPath /> + <IncludePath /> + <LibPath /> + <RegisterFilePath /> + <DBRegisterFilePath /> <TargetStatus> <Error>0</Error> <ExitCodeStop>0</ExitCodeStop> @@ -47,22 +45,22 @@ <NotGenerated>0</NotGenerated> <InvalidFlash>1</InvalidFlash> </TargetStatus> - <OutputDirectory>.\build\</OutputDirectory> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> <OutputName>rtthread</OutputName> <CreateExecutable>1</CreateExecutable> <CreateLib>0</CreateLib> <CreateHexFile>0</CreateHexFile> <DebugInformation>1</DebugInformation> <BrowseInformation>0</BrowseInformation> - <ListingPath>.\build\</ListingPath> + <ListingPath>.\build\keil\List\</ListingPath> <HexFormatSelection>1</HexFormatSelection> <Merge32K>0</Merge32K> <CreateBatchFile>0</CreateBatchFile> <BeforeCompile> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg1Name /> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopU1X>0</nStopU1X> @@ -71,8 +69,8 @@ <BeforeMake> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg1Name /> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopB1X>0</nStopB1X> @@ -81,15 +79,15 @@ <AfterMake> <RunUserProg1>1</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name>fromelf --bin !L --output rtthread-mdk.bin</UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopA1X>0</nStopA1X> <nStopA2X>0</nStopA2X> </AfterMake> <SelectedForBatchBuild>0</SelectedForBatchBuild> - <SVCSIdString></SVCSIdString> + <SVCSIdString /> </TargetCommonOption> <CommonProperty> <UseCPPCompiler>0</UseCPPCompiler> @@ -103,8 +101,8 @@ <AssembleAssemblyFile>0</AssembleAssemblyFile> <PublicsOnly>0</PublicsOnly> <StopOnExitCode>3</StopOnExitCode> - <CustomArgument></CustomArgument> - <IncludeLibraryModules></IncludeLibraryModules> + <CustomArgument /> + <IncludeLibraryModules /> <ComprImg>1</ComprImg> </CommonProperty> <DllOption> @@ -138,10 +136,10 @@ <bUseTDR>1</bUseTDR> <Flash2>BIN\UL2CM3.DLL</Flash2> <Flash3>"" ()</Flash3> - <Flash4></Flash4> - <pFcarmOut></pFcarmOut> - <pFcarmGrp></pFcarmGrp> - <pFcArmRoot></pFcArmRoot> + <Flash4 /> + <pFcarmOut /> + <pFcarmGrp /> + <pFcArmRoot /> <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> @@ -174,7 +172,7 @@ <RvctClst>0</RvctClst> <GenPPlst>0</GenPPlst> <AdsCpuType>"Cortex-M4"</AdsCpuType> - <RvctDeviceName></RvctDeviceName> + <RvctDeviceName /> <mOS>0</mOS> <uocRom>0</uocRom> <uocRam>0</uocRam> @@ -182,16 +180,16 @@ <hadIRAM>1</hadIRAM> <hadXRAM>0</hadXRAM> <uocXRam>0</uocXRam> - <RvdsVP>0</RvdsVP> - <hadIRAM2>0</hadIRAM2> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> <hadIROM2>0</hadIROM2> <StupSel>8</StupSel> <useUlib>0</useUlib> - <EndSel>1</EndSel> + <EndSel>0</EndSel> <uLtcg>0</uLtcg> <nSecure>0</nSecure> <RoSelD>3</RoSelD> - <RwSelD>3</RwSelD> + <RwSelD>4</RwSelD> <CodeSel>0</CodeSel> <OptFeed>0</OptFeed> <NoZi1>0</NoZi1> @@ -208,7 +206,7 @@ <Ra2Chk>0</Ra2Chk> <Ra3Chk>0</Ra3Chk> <Im1Chk>1</Im1Chk> - <Im2Chk>0</Im2Chk> + <Im2Chk>1</Im2Chk> <OnChipMemories> <Ocm1> <Type>0</Type> @@ -242,13 +240,13 @@ </Ocm6> <IRAM> <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> </IRAM> <IROM> <Type>1</Type> <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> + <Size>0x80000</Size> </IROM> <XRAM> <Type>0</Type> @@ -302,11 +300,11 @@ </OCR_RVCT9> <OCR_RVCT10> <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> + <StartAddress>0x20000000</StartAddress> + <Size>0x8000</Size> </OCR_RVCT10> </OnChipMemories> - <RvctStartVector></RvctStartVector> + <RvctStartVector /> </ArmAdsMisc> <Cads> <interw>1</interw> @@ -333,9 +331,9 @@ <v6Rtti>0</v6Rtti> <VariousControls> <MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls> - <Define>CORE_M4, RT_USING_ARM_LIBC</Define> - <Undefine></Undefine> - <IncludePath>applications;.;drivers;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include;Libraries\CMSIS\Include;Libraries\Drivers\include;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\pthreads;..\..\components\libc\time</IncludePath> + <Define>CORE_M4</Define> + <Undefine /> + <IncludePath>.;..\..\include;applications;.;drivers;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include;Libraries\CMSIS\Include;Libraries\Drivers\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh</IncludePath> </VariousControls> </Cads> <Aads> @@ -350,10 +348,10 @@ <useXO>0</useXO> <uClangAs>0</uClangAs> <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath></IncludePath> + <MiscControls /> + <Define /> + <Undefine /> + <IncludePath /> </VariousControls> </Aads> <LDads> @@ -365,70 +363,145 @@ <useFile>0</useFile> <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x10000000</DataAddressRange> - <pXoBase></pXoBase> - <ScatterFile>.\rtthread-lpc408x.sct</ScatterFile> - <IncludeLibs></IncludeLibs> - <IncludeLibsPath></IncludeLibsPath> - <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc> - <LinkerInputFile></LinkerInputFile> - <DisabledWarnings></DisabledWarnings> + <pXoBase /> + <ScatterFile>.\drivers\linker_scripts\link.sct</ScatterFile> + <IncludeLibs /> + <IncludeLibsPath /> + <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> + <LinkerInputFile /> + <DisabledWarnings /> </LDads> </TargetArmAds> </TargetOption> <Groups> <Group> - <GroupName>Applications</GroupName> + <GroupName>Kernel</GroupName> <Files> <File> - <FileName>application.c</FileName> + <FileName>clock.c</FileName> <FileType>1</FileType> - <FilePath>applications\application.c</FilePath> + <FilePath>..\..\src\clock.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>board.c</FileName> + <FileName>components.c</FileName> <FileType>1</FileType> - <FilePath>applications\board.c</FilePath> + <FilePath>..\..\src\components.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>canapp.c</FileName> + <FileName>cpu.c</FileName> <FileType>1</FileType> - <FilePath>applications\canapp.c</FilePath> + <FilePath>..\..\src\cpu.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>sram.c</FileName> + <FileName>device.c</FileName> <FileType>1</FileType> - <FilePath>applications\sram.c</FilePath> + <FilePath>..\..\src\device.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>startup.c</FileName> + <FileName>idle.c</FileName> <FileType>1</FileType> - <FilePath>applications\startup.c</FilePath> + <FilePath>..\..\src\idle.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\ipc.c</FilePath> </File> </Files> - </Group> - <Group> - <GroupName>Drivers</GroupName> <Files> <File> - <FileName>drv_hwtimer.c</FileName> + <FileName>irq.c</FileName> <FileType>1</FileType> - <FilePath>drivers\drv_hwtimer.c</FilePath> + <FilePath>..\..\src\irq.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>drv_led.c</FileName> + <FileName>kservice.c</FileName> <FileType>1</FileType> - <FilePath>drivers\drv_led.c</FilePath> + <FilePath>..\..\src\kservice.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>drv_lpccan.c</FileName> + <FileName>memheap.c</FileName> <FileType>1</FileType> - <FilePath>drivers\drv_lpccan.c</FilePath> + <FilePath>..\..\src\memheap.c</FilePath> </File> + </Files> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\mempool.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\object.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\scheduler.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>signal.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\signal.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\thread.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\src\timer.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> <File> - <FileName>drv_sdram.c</FileName> + <FileName>board.c</FileName> <FileType>1</FileType> - <FilePath>drivers\drv_sdram.c</FilePath> + <FilePath>drivers\board.c</FilePath> </File> + </Files> + <Files> <File> <FileName>drv_uart.c</FileName> <FileType>1</FileType> @@ -444,136 +517,190 @@ <FileType>1</FileType> <FilePath>Libraries\Device\NXP\LPC407x_8x_177x_8x\Source\Templates\system_LPC407x_8x_177x_8x.c</FilePath> </File> + </Files> + <Files> <File> <FileName>startup_LPC407x_8x_177x_8x.s</FileName> <FileType>2</FileType> <FilePath>Libraries\Device\NXP\LPC407x_8x_177x_8x\Source\Templates\ARM\startup_LPC407x_8x_177x_8x.s</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_adc.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_adc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_bod.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_bod.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_can.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_can.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_clkpwr.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_clkpwr.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_crc.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_crc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_dac.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_dac.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_eeprom.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_eeprom.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_emc.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_emc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_exti.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_exti.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_gpdma.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_gpdma.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_gpio.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_gpio.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_i2c.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_i2c.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_i2s.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_i2s.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_iap.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_iap.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_lcd.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_lcd.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_mcpwm.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_mcpwm.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_nvic.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_nvic.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_pinsel.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_pinsel.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_pwm.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_pwm.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_qei.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_qei.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_rtc.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_rtc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_ssp.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_ssp.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_systick.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_systick.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_timer.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_timer.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_uart.c</FileName> <FileType>1</FileType> <FilePath>Libraries\Drivers\source\lpc_uart.c</FilePath> </File> + </Files> + <Files> <File> <FileName>lpc_wwdt.c</FileName> <FileType>1</FileType> @@ -582,108 +709,41 @@ </Files> </Group> <Group> - <GroupName>Kernel</GroupName> + <GroupName>cpu</GroupName> <Files> <File> - <FileName>clock.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\clock.c</FilePath> - </File> - <File> - <FileName>device.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\device.c</FilePath> - </File> - <File> - <FileName>idle.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\idle.c</FilePath> - </File> - <File> - <FileName>ipc.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\ipc.c</FilePath> - </File> - <File> - <FileName>irq.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\irq.c</FilePath> - </File> - <File> - <FileName>kservice.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\kservice.c</FilePath> - </File> - <File> - <FileName>mem.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\mem.c</FilePath> - </File> - <File> - <FileName>memheap.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\memheap.c</FilePath> - </File> - <File> - <FileName>mempool.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\mempool.c</FilePath> - </File> - <File> - <FileName>object.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\object.c</FilePath> - </File> - <File> - <FileName>scheduler.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\src\scheduler.c</FilePath> - </File> - <File> - <FileName>signal.c</FileName> + <FileName>backtrace.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\signal.c</FilePath> + <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>thread.c</FileName> + <FileName>div0.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\thread.c</FilePath> + <FilePath>..\..\libcpu\arm\common\div0.c</FilePath> </File> + </Files> + <Files> <File> - <FileName>timer.c</FileName> + <FileName>showmem.c</FileName> <FileType>1</FileType> - <FilePath>..\..\src\timer.c</FilePath> + <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath> </File> </Files> - </Group> - <Group> - <GroupName>CORTEX-M4</GroupName> <Files> <File> <FileName>cpuport.c</FileName> <FileType>1</FileType> <FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath> </File> + </Files> + <Files> <File> <FileName>context_rvds.S</FileName> <FileType>2</FileType> <FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath> </File> - <File> - <FileName>backtrace.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath> - </File> - <File> - <FileName>div0.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\libcpu\arm\common\div0.c</FilePath> - </File> - <File> - <FileName>showmem.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath> - </File> </Files> </Group> <Group> @@ -694,41 +754,43 @@ <FileType>1</FileType> <FilePath>..\..\components\dfs\src\dfs.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dfs_file.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\dfs\src\dfs_file.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dfs_fs.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dfs_posix.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath> </File> - <File> - <FileName>poll.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\dfs\src\poll.c</FilePath> - </File> - <File> - <FileName>select.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\dfs\src\select.c</FilePath> - </File> + </Files> + <Files> <File> <FileName>devfs.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\dfs\filesystems\devfs\devfs.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dfs_elm.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath> </File> + </Files> + <Files> <File> <FileName>ff.c</FileName> <FileType>1</FileType> @@ -740,45 +802,61 @@ <GroupName>DeviceDrivers</GroupName> <Files> <File> - <FileName>can.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\drivers\can\can.c</FilePath> - </File> - <File> <FileName>pin.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\misc\pin.c</FilePath> </File> + </Files> + <Files> <File> <FileName>serial.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\serial\serial.c</FilePath> </File> + </Files> + <Files> <File> <FileName>completion.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\src\completion.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dataqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath> </File> + </Files> + <Files> <File> <FileName>pipe.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\src\pipe.c</FilePath> </File> + </Files> + <Files> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + </Files> + <Files> <File> <FileName>ringbuffer.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath> </File> + </Files> + <Files> <File> <FileName>waitqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath> </File> + </Files> + <Files> <File> <FileName>workqueue.c</FileName> <FileType>1</FileType> @@ -794,198 +872,49 @@ <FileType>1</FileType> <FilePath>..\..\components\finsh\shell.c</FilePath> </File> + </Files> + <Files> <File> <FileName>symbol.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\finsh\symbol.c</FilePath> </File> + </Files> + <Files> <File> <FileName>cmd.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\finsh\cmd.c</FilePath> </File> + </Files> + <Files> <File> <FileName>msh.c</FileName> <FileType>1</FileType> <FilePath>..\..\components\finsh\msh.c</FilePath> </File> - <File> - <FileName>msh_cmd.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\msh_cmd.c</FilePath> - </File> - <File> - <FileName>msh_file.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\msh_file.c</FilePath> - </File> - <File> - <FileName>finsh_compiler.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath> - </File> - <File> - <FileName>finsh_error.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_error.c</FilePath> - </File> - <File> - <FileName>finsh_heap.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_heap.c</FilePath> - </File> - <File> - <FileName>finsh_init.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_init.c</FilePath> - </File> - <File> - <FileName>finsh_node.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_node.c</FilePath> - </File> - <File> - <FileName>finsh_ops.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_ops.c</FilePath> - </File> - <File> - <FileName>finsh_parser.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_parser.c</FilePath> - </File> - <File> - <FileName>finsh_var.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_var.c</FilePath> - </File> - <File> - <FileName>finsh_vm.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_vm.c</FilePath> - </File> - <File> - <FileName>finsh_token.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\finsh\finsh_token.c</FilePath> - </File> </Files> - </Group> - <Group> - <GroupName>libc</GroupName> <Files> <File> - <FileName>libc.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath> - </File> - <File> - <FileName>mem_std.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath> - </File> - <File> - <FileName>stdio.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\stdio.c</FilePath> - </File> - <File> - <FileName>stubs.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath> - </File> - <File> - <FileName>time.c</FileName> + <FileName>msh_cmd.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\libc\compilers\armlibc\time.c</FilePath> + <FilePath>..\..\components\finsh\msh_cmd.c</FilePath> </File> </Files> - </Group> - <Group> - <GroupName>pthreads</GroupName> <Files> <File> - <FileName>mqueue.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\mqueue.c</FilePath> - </File> - <File> - <FileName>pthread.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread.c</FilePath> - </File> - <File> - <FileName>pthread_attr.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_attr.c</FilePath> - </File> - <File> - <FileName>pthread_barrier.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_barrier.c</FilePath> - </File> - <File> - <FileName>pthread_cond.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_cond.c</FilePath> - </File> - <File> - <FileName>pthread_mutex.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_mutex.c</FilePath> - </File> - <File> - <FileName>pthread_rwlock.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_rwlock.c</FilePath> - </File> - <File> - <FileName>pthread_spin.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_spin.c</FilePath> - </File> - <File> - <FileName>pthread_tls.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\pthread_tls.c</FilePath> - </File> - <File> - <FileName>sched.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\sched.c</FilePath> - </File> - <File> - <FileName>semaphore.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\pthreads\semaphore.c</FilePath> - </File> - <File> - <FileName>clock_time.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\components\libc\time\clock_time.c</FilePath> - </File> - <File> - <FileName>posix_sleep.c</FileName> + <FileName>msh_file.c</FileName> <FileType>1</FileType> - <FilePath>..\..\components\libc\time\posix_sleep.c</FilePath> + <FilePath>..\..\components\finsh\msh_file.c</FilePath> </File> </Files> </Group> </Groups> </Target> </Targets> - <RTE> - <apis/> - <components> - <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device"> - <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.0"/> - <targetInfos> - <targetInfo name="RT-Thread IMXRT1052"/> - </targetInfos> - </component> - </components> - <files/> + <apis /> + <components /> + <files /> </RTE> - </Project> diff --git a/bsp/lpc408x/rtconfig.h b/bsp/lpc408x/rtconfig.h index 0d5469786f..4459cfd3a5 100644 --- a/bsp/lpc408x/rtconfig.h +++ b/bsp/lpc408x/rtconfig.h @@ -8,18 +8,16 @@ #define RT_NAME_MAX 8 #define RT_ALIGN_SIZE 4 -/* RT_THREAD_PRIORITY_8 is not set */ #define RT_THREAD_PRIORITY_32 -/* RT_THREAD_PRIORITY_256 is not set */ #define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 100 -#define RT_DEBUG +#define RT_TICK_PER_SECOND 1000 #define RT_USING_OVERFLOW_CHECK -#define RT_DEBUG_INIT 0 -#define RT_DEBUG_THREAD 0 #define RT_USING_HOOK -#define IDLE_THREAD_STACK_SIZE 512 -/* RT_USING_TIMER_SOFT is not set */ +#define RT_USING_IDLE_HOOK +#define RT_IDEL_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -28,38 +26,34 @@ #define RT_USING_EVENT #define RT_USING_MAILBOX #define RT_USING_MESSAGEQUEUE -/* RT_USING_SIGNALS is not set */ /* Memory Management */ #define RT_USING_MEMPOOL #define RT_USING_MEMHEAP -/* RT_USING_NOHEAP is not set */ -#define RT_USING_SMALL_MEM -/* RT_USING_SLAB is not set */ -/* RT_USING_MEMHEAP_AS_HEAP is not set */ -/* RT_USING_MEMTRACE is not set */ +#define RT_USING_MEMHEAP_AS_HEAP #define RT_USING_HEAP /* Kernel Device Object */ #define RT_USING_DEVICE -/* RT_USING_INTERRUPT_INFO is not set */ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -/* RT_USING_MODULE is not set */ +#define RT_VER_NUM 0x40001 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M4 /* RT-Thread Components */ -/* RT_USING_COMPONENTS_INIT is not set */ +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 /* C++ features */ -/* RT_USING_CPLUSPLUS is not set */ /* Command shell */ @@ -72,10 +66,10 @@ #define FINSH_THREAD_PRIORITY 20 #define FINSH_THREAD_STACK_SIZE 4096 #define FINSH_CMD_SIZE 80 -/* FINSH_USING_AUTH is not set */ #define FINSH_USING_MSH #define FINSH_USING_MSH_DEFAULT -/* FINSH_USING_MSH_ONLY is not set */ +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 /* Device virtual file system */ @@ -91,152 +85,108 @@ #define RT_DFS_ELM_CODE_PAGE 936 #define RT_DFS_ELM_WORD_ACCESS #define RT_DFS_ELM_USE_LFN_0 -/* RT_DFS_ELM_USE_LFN_1 is not set */ -/* RT_DFS_ELM_USE_LFN_2 is not set */ -/* RT_DFS_ELM_USE_LFN_3 is not set */ #define RT_DFS_ELM_USE_LFN 0 #define RT_DFS_ELM_MAX_LFN 255 #define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -/* RT_DFS_ELM_USE_ERASE is not set */ #define RT_DFS_ELM_REENTRANT #define RT_USING_DFS_DEVFS -/* RT_USING_DFS_NET is not set */ -/* RT_USING_DFS_ROMFS is not set */ -/* RT_USING_DFS_RAMFS is not set */ -/* RT_USING_DFS_UFFS is not set */ -/* RT_USING_DFS_JFFS2 is not set */ -/* RT_USING_DFS_NFS is not set */ /* Device Drivers */ #define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA -#define RT_USING_CAN -/* RT_USING_HWTIMER is not set */ -/* RT_USING_CPUTIME is not set */ -/* RT_USING_I2C is not set */ +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN -/* RT_USING_MTD_NOR is not set */ -/* RT_USING_MTD_NAND is not set */ -/* RT_USING_RTC is not set */ -/* RT_USING_SDIO is not set */ -/* RT_USING_SPI is not set */ -/* RT_USING_WDT is not set */ -/* RT_USING_WIFI is not set */ + +/* Using WiFi */ + /* Using USB */ -/* RT_USING_USB_HOST is not set */ -/* RT_USING_USB_DEVICE is not set */ /* POSIX layer and C standard library */ -#define RT_USING_LIBC -#define RT_USING_PTHREADS -#define RT_USING_POSIX -/* RT_USING_POSIX_MMAP is not set */ -/* RT_USING_POSIX_TERMIOS is not set */ -/* RT_USING_POSIX_AIO is not set */ -/* HAVE_SYS_SIGNALS is not set */ -/* Network stack */ +/* Network */ + +/* Socket abstraction layer */ + /* light weight TCP/IP stack */ -/* RT_USING_LWIP is not set */ /* Modbus master and slave stack */ -/* RT_USING_MODBUS is not set */ + +/* AT commands */ + /* VBUS(Virtual Software BUS) */ -/* RT_USING_VBUS is not set */ /* Utilities */ -/* RT_USING_LOGTRACE is not set */ -/* RT_USING_RYM is not set */ /* ARM CMSIS */ -/* RT_USING_CMSIS_OS is not set */ -/* RT_USING_RTT_CMSIS is not set */ /* RT-Thread online packages */ -/* system packages */ - -/* RT-Thread GUI Engine */ - -/* PKG_USING_GUIENGINE is not set */ -/* PKG_USING_PERSIMMON is not set */ -/* PKG_USING_LWEXT4 is not set */ -/* PKG_USING_PARTITION is not set */ -/* PKG_USING_SQLITE is not set */ -/* PKG_USING_RTI is not set */ - /* IoT - internet of things */ -/* PKG_USING_PAHOMQTT is not set */ -/* PKG_USING_WEBCLIENT is not set */ -/* PKG_USING_MONGOOSE is not set */ -/* PKG_USING_WEBTERMINAL is not set */ -/* PKG_USING_CJSON is not set */ -/* PKG_USING_LJSON is not set */ -/* PKG_USING_EZXML is not set */ -/* PKG_USING_NANOPB is not set */ -/* PKG_USING_GAGENT_CLOUD is not set */ /* Wi-Fi */ /* Marvell WiFi */ -/* PKG_USING_WLANMARVELL is not set */ /* Wiced WiFi */ -/* PKG_USING_WLAN_WICED is not set */ -/* PKG_USING_COAP is not set */ -/* PKG_USING_NOPOLL is not set */ -/* PKG_USING_NETUTILS is not set */ + +/* IoT Cloud */ + /* security packages */ -/* PKG_USING_MBEDTLS is not set */ -/* PKG_USING_libsodium is not set */ -/* PKG_USING_TINYCRYPT is not set */ /* language packages */ -/* PKG_USING_JERRYSCRIPT is not set */ -/* PKG_USING_MICROPYTHON is not set */ /* multimedia packages */ -/* PKG_USING_OPENMV is not set */ /* tools packages */ -/* PKG_USING_CMBACKTRACE is not set */ -/* PKG_USING_EASYLOGGER is not set */ -/* PKG_USING_SYSTEMVIEW is not set */ -/* PKG_USING_IPERF is not set */ + +/* system packages */ + + +/* peripheral libraries and drivers */ + /* miscellaneous packages */ -/* PKG_USING_FASTLZ is not set */ -/* PKG_USING_MINILZO is not set */ -/* PKG_USING_QUICKLZ is not set */ -/* example package: hello */ +/* samples: kernel and components samples */ -/* PKG_USING_HELLO is not set */ -/* PKG_USING_MULTIBUTTON is not set */ #define SOC_LPC4088 -/* RT_USING_UART0 is not set */ -#define RT_USING_UART1 + +/* Hardware Drivers Config */ + +/* On-chip Peripheral Drivers */ + + +/* UART Drivers */ + +#define BSP_USING_UART0 + +/* Onboard Peripheral Drivers */ + + +/* Offboard Peripheral Drivers */ + #endif diff --git a/bsp/lpc408x/rtconfig.py b/bsp/lpc408x/rtconfig.py index ba797aab63..030719b339 100644 --- a/bsp/lpc408x/rtconfig.py +++ b/bsp/lpc408x/rtconfig.py @@ -4,14 +4,13 @@ import os ARCH='arm' CPU='cortex-m4' CROSS_TOOL='keil' -BOARD_NAME = 'lpc408x' if os.getenv('RTT_CC'): CROSS_TOOL = os.getenv('RTT_CC') if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' - EXEC_PATH = r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin' + EXEC_PATH = r'D:/xxx' elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = 'D:/Keil' @@ -33,17 +32,18 @@ if PLATFORM == 'gcc': CXX = PREFIX + 'g++' AS = PREFIX + 'gcc' AR = PREFIX + 'ar' - LINK = PREFIX + 'g++' + LINK = PREFIX + 'gcc' TARGET_EXT = 'elf' SIZE = PREFIX + 'size' OBJDUMP = PREFIX + 'objdump' OBJCPY = PREFIX + 'objcopy' - DEVICE = ' -mcpu=cortex-m4 -mthumb' + DEVICE = ' -mcpu=' + CPU + ' -mthumb ' CFLAGS = DEVICE AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' - LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-' + BOARD_NAME + '.map,-cref,-u,Reset_Handler -T rtthread-' + BOARD_NAME + '.ld' - + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds' + CXXFLAGS = CFLAGS + CPATH = '' LPATH = '' @@ -53,8 +53,6 @@ if PLATFORM == 'gcc': else: CFLAGS += ' -O2' - CXXFLAGS = CFLAGS - POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' elif PLATFORM == 'armcc': @@ -66,17 +64,16 @@ elif PLATFORM == 'armcc': LINK = 'armlink' TARGET_EXT = 'axf' - DEVICE = ' --cpu Cortex-M4.fp' - CFLAGS = DEVICE + ' --apcs=interwork' - AFLAGS = DEVICE - LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread_' + \ - BOARD_NAME + '.map --scatter rtthread-' + BOARD_NAME + '.sct' + DEVICE = ' --cpu ' + CPU + '.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "drivers/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' - CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC' - LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC' + LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB' CXXFLAGS = CFLAGS - EXEC_PATH += '/arm/bin40/' + EXEC_PATH += '/arm/armcc/bin/' if BUILD == 'debug': CFLAGS += ' -g -O0' diff --git a/bsp/lpc408x/template.uvopt b/bsp/lpc408x/template.uvopt index bfe099d207..b3e8bc92df 100644 --- a/bsp/lpc408x/template.uvopt +++ b/bsp/lpc408x/template.uvopt @@ -21,7 +21,7 @@ </DaveTm> <Target> - <TargetName>RT-Thread LPC408x</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <TargetOption> @@ -43,7 +43,7 @@ <PageWidth>79</PageWidth> <PageLength>66</PageLength> <TabStop>8</TabStop> - <ListingPath>.\build\</ListingPath> + <ListingPath>.\build\keil\List\</ListingPath> </OPTLEX> <ListingPage> <CreateCListing>1</CreateCListing> @@ -75,17 +75,7 @@ <tvExpOptDlg>0</tvExpOptDlg> <IsCurrentTarget>1</IsCurrentTarget> </OPTFL> - <CpuCode>0</CpuCode> - <DllOpt> - <SimDllName>SARMCM3.DLL</SimDllName> - <SimDllArguments>-MPU</SimDllArguments> - <SimDlgDllName>DCM.DLL</SimDlgDllName> - <SimDlgDllArguments>-pCM4</SimDlgDllArguments> - <TargetDllName>SARMCM3.DLL</TargetDllName> - <TargetDllArguments>-MPU</TargetDllArguments> - <TargetDlgDllName>TCM.DLL</TargetDlgDllName> - <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> - </DllOpt> + <CpuCode>8</CpuCode> <DebugOpt> <uSim>0</uSim> <uTrg>1</uTrg> @@ -97,16 +87,19 @@ <sRfunc>1</sRfunc> <sRbox>1</sRbox> <tLdApp>1</tLdApp> - <tGomain>0</tGomain> + <tGomain>1</tGomain> <tRbreak>1</tRbreak> <tRwatch>1</tRwatch> <tRmem>1</tRmem> <tRfunc>0</tRfunc> <tRbox>1</tRbox> <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>0</tPdscDbg> <sRunDeb>0</sRunDeb> <sLrtime>0</sLrtime> - <nTsel>7</nTsel> + <nTsel>6</nTsel> <sDll></sDll> <sDllPa></sDllPa> <sDlgDll></sDlgDll> @@ -123,7 +116,12 @@ <SetRegEntry> <Number>0</Number> <Key>JL2CM3</Key> - <Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name> + <Name>-U30000299 -O4303 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-O4303 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000)</Name> </SetRegEntry> </TargetDriverDllRegistry> <Breakpoint/> diff --git a/bsp/lpc408x/template.uvoptx b/bsp/lpc408x/template.uvoptx new file mode 100644 index 0000000000..9505c2dd20 --- /dev/null +++ b/bsp/lpc408x/template.uvoptx @@ -0,0 +1,177 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rtthread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>8</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>4</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512.FLM -FS00 -FL080000 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 -FN1 -FCFE0 -FD10000000 -FF0LPC_IAP_512 -FL080000 -FS00 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + </TargetOption> + </Target> + +</ProjectOpt> diff --git a/bsp/lpc408x/template.uvproj b/bsp/lpc408x/template.uvproj index 68d0e0934d..ebbbafc7dd 100644 --- a/bsp/lpc408x/template.uvproj +++ b/bsp/lpc408x/template.uvproj @@ -7,7 +7,7 @@ <Targets> <Target> - <TargetName>RT-Thread LPC408x</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <TargetOption> @@ -30,6 +30,7 @@ <SLE66AMisc></SLE66AMisc> <SLE66LinkerMisc></SLE66LinkerMisc> <SFDFile>SFD\NXP\LPC407x_8x_177x_8x\LPC408x_7x.SFR</SFDFile> + <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> <BinPath></BinPath> <IncludePath></IncludePath> @@ -43,21 +44,21 @@ <NotGenerated>0</NotGenerated> <InvalidFlash>1</InvalidFlash> </TargetStatus> - <OutputDirectory>.\build\</OutputDirectory> - <OutputName>rtthread-lpc</OutputName> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rtthread</OutputName> <CreateExecutable>1</CreateExecutable> <CreateLib>0</CreateLib> <CreateHexFile>0</CreateHexFile> <DebugInformation>1</DebugInformation> - <BrowseInformation>1</BrowseInformation> - <ListingPath>.\build\</ListingPath> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> <HexFormatSelection>1</HexFormatSelection> <Merge32K>0</Merge32K> <CreateBatchFile>0</CreateBatchFile> <BeforeCompile> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> @@ -97,6 +98,7 @@ <StopOnExitCode>3</StopOnExitCode> <CustomArgument></CustomArgument> <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> </CommonProperty> <DllOption> <SimDllName>SARMCM3.DLL</SimDllName> @@ -126,20 +128,23 @@ <RestoreFunctions>1</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> </Simulator> <Target> <UseTarget>1</UseTarget> <LoadApplicationAtStartup>1</LoadApplicationAtStartup> - <RunToMain>0</RunToMain> + <RunToMain>1</RunToMain> <RestoreBreakpoints>1</RestoreBreakpoints> <RestoreWatchpoints>1</RestoreWatchpoints> <RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreFunctions>0</RestoreFunctions> <RestoreToolbox>1</RestoreToolbox> <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + <UsePdscDebugDescription>0</UsePdscDebugDescription> </Target> <RunDebugAfterBuild>0</RunDebugAfterBuild> - <TargetSelection>7</TargetSelection> + <TargetSelection>6</TargetSelection> <SimDlls> <CpuDll></CpuDll> <CpuDllArguments></CpuDllArguments> @@ -161,14 +166,18 @@ <UseTargetDll>1</UseTargetDll> <UseExternalTool>0</UseExternalTool> <RunIndependent>0</RunIndependent> - <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> <Capability>1</Capability> <DriverSelection>4099</DriverSelection> </Flash1> - <bUseTDR>0</bUseTDR> + <bUseTDR>1</bUseTDR> <Flash2>Segger\JL2CM3.dll</Flash2> <Flash3>"" ()</Flash3> <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> <ArmAdsMisc> @@ -347,6 +356,8 @@ <wLevel>0</wLevel> <uThumb>0</uThumb> <uSurpInc>0</uSurpInc> + <uC99>0</uC99> + <useXO>0</useXO> <VariousControls> <MiscControls></MiscControls> <Define></Define> @@ -363,6 +374,7 @@ <SwStkChk>0</SwStkChk> <NoWarn>0</NoWarn> <uSurpInc>0</uSurpInc> + <useXO>0</useXO> <VariousControls> <MiscControls></MiscControls> <Define></Define> @@ -379,6 +391,7 @@ <useFile>0</useFile> <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x10000000</DataAddressRange> + <pXoBase></pXoBase> <ScatterFile></ScatterFile> <IncludeLibs></IncludeLibs> <IncludeLibsPath></IncludeLibsPath> diff --git a/bsp/lpc408x/template.uvprojx b/bsp/lpc408x/template.uvprojx index b985d37e18..3367c1d559 100644 --- a/bsp/lpc408x/template.uvprojx +++ b/bsp/lpc408x/template.uvprojx @@ -7,22 +7,23 @@ <Targets> <Target> - <TargetName>RT-Thread LPC408X</TargetName> + <TargetName>rtthread</TargetName> <ToolsetNumber>0x4</ToolsetNumber> <ToolsetName>ARM-ADS</ToolsetName> <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed> + <uAC6>0</uAC6> <TargetOption> <TargetCommonOption> - <Device>ARMCM4</Device> - <Vendor>ARM</Vendor> - <PackID>ARM.CMSIS.5.0.0</PackID> + <Device>LPC4088FET208</Device> + <Vendor>NXP</Vendor> + <PackID>Keil.LPC4000_DFP.2.1.0</PackID> <PackURL>http://www.keil.com/pack/</PackURL> - <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu> + <Cpu>IRAM(0x10000000,0x10000) IRAM2(0x20000000,0x8000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu> <FlashUtilSpec></FlashUtilSpec> <StartupFile></StartupFile> - <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM))</FlashDriverDll> <DeviceId>0</DeviceId> - <RegisterFile>$$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h</RegisterFile> + <RegisterFile>$$Device:LPC4088FET208$Device\Include\LPC407x_8x_177x_8x.h</RegisterFile> <MemoryEnv></MemoryEnv> <Cmp></Cmp> <Asm></Asm> @@ -32,7 +33,7 @@ <SLE66CMisc></SLE66CMisc> <SLE66AMisc></SLE66AMisc> <SLE66LinkerMisc></SLE66LinkerMisc> - <SFDFile>$$Device:ARMCM4$Device\ARM\SVD\ARMCM4.svd</SFDFile> + <SFDFile>$$Device:LPC4088FET208$SVD\LPC408x_7x.svd</SFDFile> <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> <BinPath></BinPath> @@ -47,14 +48,14 @@ <NotGenerated>0</NotGenerated> <InvalidFlash>1</InvalidFlash> </TargetStatus> - <OutputDirectory>.\build\</OutputDirectory> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> <OutputName>rtthread</OutputName> <CreateExecutable>1</CreateExecutable> <CreateLib>0</CreateLib> <CreateHexFile>0</CreateHexFile> <DebugInformation>1</DebugInformation> <BrowseInformation>0</BrowseInformation> - <ListingPath>.\build\</ListingPath> + <ListingPath>.\build\keil\List\</ListingPath> <HexFormatSelection>1</HexFormatSelection> <Merge32K>0</Merge32K> <CreateBatchFile>0</CreateBatchFile> @@ -81,7 +82,7 @@ <AfterMake> <RunUserProg1>1</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name>fromelf --bin !L --output rtthread-mdk.bin</UserProg1Name> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> <UserProg2Name></UserProg2Name> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> @@ -182,16 +183,16 @@ <hadIRAM>1</hadIRAM> <hadXRAM>0</hadXRAM> <uocXRam>0</uocXRam> - <RvdsVP>0</RvdsVP> - <hadIRAM2>0</hadIRAM2> + <RvdsVP>2</RvdsVP> + <hadIRAM2>1</hadIRAM2> <hadIROM2>0</hadIROM2> <StupSel>8</StupSel> <useUlib>0</useUlib> - <EndSel>1</EndSel> + <EndSel>0</EndSel> <uLtcg>0</uLtcg> <nSecure>0</nSecure> <RoSelD>3</RoSelD> - <RwSelD>3</RwSelD> + <RwSelD>4</RwSelD> <CodeSel>0</CodeSel> <OptFeed>0</OptFeed> <NoZi1>0</NoZi1> @@ -208,7 +209,7 @@ <Ra2Chk>0</Ra2Chk> <Ra3Chk>0</Ra3Chk> <Im1Chk>1</Im1Chk> - <Im2Chk>0</Im2Chk> + <Im2Chk>1</Im2Chk> <OnChipMemories> <Ocm1> <Type>0</Type> @@ -242,13 +243,13 @@ </Ocm6> <IRAM> <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> + <StartAddress>0x10000000</StartAddress> + <Size>0x10000</Size> </IRAM> <IROM> <Type>1</Type> <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> + <Size>0x80000</Size> </IROM> <XRAM> <Type>0</Type> @@ -302,8 +303,8 @@ </OCR_RVCT9> <OCR_RVCT10> <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> + <StartAddress>0x20000000</StartAddress> + <Size>0x8000</Size> </OCR_RVCT10> </OnChipMemories> <RvctStartVector></RvctStartVector> @@ -366,7 +367,7 @@ <TextAddressRange>0x00000000</TextAddressRange> <DataAddressRange>0x10000000</DataAddressRange> <pXoBase></pXoBase> - <ScatterFile>.\rtthread-lpc408x.sct</ScatterFile> + <ScatterFile>.\drivers\linker_scripts\link.sct</ScatterFile> <IncludeLibs></IncludeLibs> <IncludeLibsPath></IncludeLibsPath> <Misc></Misc> @@ -380,14 +381,7 @@ <RTE> <apis/> - <components> - <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device"> - <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.1.0"/> - <targetInfos> - <targetInfo name="RT-Thread IMXRT1052"/> - </targetInfos> - </component> - </components> + <components/> <files/> </RTE> diff --git a/bsp/lpc43xx/M0/rtconfig.h b/bsp/lpc43xx/M0/rtconfig.h index 90531287dd..a4aef7f151 100644 --- a/bsp/lpc43xx/M0/rtconfig.h +++ b/bsp/lpc43xx/M0/rtconfig.h @@ -22,6 +22,7 @@ //#define RT_USING_MODULE // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_DEBUG_INIT" description="debug init enable" default=0 /> #define RT_DEBUG_INIT 0 //#define RT_DEBUG_SCHEDULER 1 diff --git a/bsp/lpc43xx/M4/rtconfig.h b/bsp/lpc43xx/M4/rtconfig.h index 0b30998cc0..5e41344165 100644 --- a/bsp/lpc43xx/M4/rtconfig.h +++ b/bsp/lpc43xx/M4/rtconfig.h @@ -22,6 +22,7 @@ //#define RT_USING_MODULE // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_DEBUG_INIT" description="debug init enable" default=0 /> #define RT_DEBUG_INIT 0 // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> diff --git a/bsp/lpc5410x/rtconfig.h b/bsp/lpc5410x/rtconfig.h index c054bfabba..387f1e75e6 100644 --- a/bsp/lpc5410x/rtconfig.h +++ b/bsp/lpc5410x/rtconfig.h @@ -18,6 +18,7 @@ #define RT_TICK_PER_SECOND 100 // <section name="RT_DEBUG" description="Kernel Debug Configuration, enable it to open assertions for run-time checking" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/lpc54114-lite/.config b/bsp/lpc54114-lite/.config index 2ff4f2a87b..acdb890f05 100644 --- a/bsp/lpc54114-lite/.config +++ b/bsp/lpc54114-lite/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -20,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -61,7 +63,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y @@ -224,7 +226,6 @@ CONFIG_RT_USING_POSIX=y # CONFIG_RT_USING_LOGTRACE is not set # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set -# CONFIG_RT_USING_UTEST is not set # # ARM CMSIS @@ -324,7 +325,6 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set -# CONFIG_PKG_USING_LITTLEFS is not set # # peripheral libraries and drivers @@ -338,8 +338,6 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_MPU6XXX is not set -# CONFIG_PKG_USING_PCF8574 is not set -# CONFIG_PKG_USING_KENDRYTE_SDK is not set # # miscellaneous packages @@ -354,7 +352,10 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# sample package +# # # samples: kernel and components samples @@ -363,8 +364,42 @@ CONFIG_RT_USING_POSIX=y # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# example package: hello +# # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set + +# +# Privated Packages of RealThread +# +# CONFIG_PKG_USING_CODEC is not set +# CONFIG_PKG_USING_PLAYER is not set +# CONFIG_PKG_USING_PERSIMMON_SRC is not set + +# +# Network Utilities +# +# CONFIG_PKG_USING_WICED is not set +# CONFIG_PKG_USING_CLOUDSDK is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_POWER_MANAGER is not set +# CONFIG_PKG_USING_RT_OTA is not set +# CONFIG_PKG_USING_RDBD_SRC is not set +# CONFIG_PKG_USING_RTINSIGHT is not set +# CONFIG_PKG_USING_SMARTCONFIG is not set + +# +# rtpkgs online packages +# +# CONFIG_PKG_USING_CSTRING is not set +# CONFIG_PKG_USING_ARGPARSE is not set +# CONFIG_PKG_USING_LIBBMPREAD is not set +# CONFIG_PKG_USING_LIBUTILS is not set +# CONFIG_PKG_USING_SAM is not set +# CONFIG_PKG_USING_LIBCALLBACK is not set +# CONFIG_PKG_USING_Z_EVENT is not set +# CONFIG_PKG_USING_LIBSTM32HAL is not set CONFIG_SOC_LPC54114=y # diff --git a/bsp/lpc54114-lite/rtconfig.h b/bsp/lpc54114-lite/rtconfig.h index 289c80163c..2d833b3e4d 100644 --- a/bsp/lpc54114-lite/rtconfig.h +++ b/bsp/lpc54114-lite/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -38,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M4 @@ -175,8 +176,22 @@ /* miscellaneous packages */ +/* sample package */ + /* samples: kernel and components samples */ + +/* example package: hello */ + + +/* Privated Packages of RealThread */ + + +/* Network Utilities */ + + +/* rtpkgs online packages */ + #define SOC_LPC54114 /* LPC54110 Bsp Config */ diff --git a/bsp/lpc54608-LPCXpresso/.config b/bsp/lpc54608-LPCXpresso/.config index 85046e050d..f793185bda 100644 --- a/bsp/lpc54608-LPCXpresso/.config +++ b/bsp/lpc54608-LPCXpresso/.config @@ -21,6 +21,7 @@ CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/lpc54608-LPCXpresso/rtconfig.h b/bsp/lpc54608-LPCXpresso/rtconfig.h index 46855f7713..987439e331 100644 --- a/bsp/lpc54608-LPCXpresso/rtconfig.h +++ b/bsp/lpc54608-LPCXpresso/rtconfig.h @@ -19,6 +19,7 @@ #define RT_TIMER_THREAD_PRIO 4 #define RT_TIMER_THREAD_STACK_SIZE 512 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/ls1bdev/rtconfig.h b/bsp/ls1bdev/rtconfig.h index 67bba7fc68..4135268111 100644 --- a/bsp/ls1bdev/rtconfig.h +++ b/bsp/ls1bdev/rtconfig.h @@ -17,6 +17,7 @@ #define RT_TICK_PER_SECOND 100 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/ls1cdev/.config b/bsp/ls1cdev/.config index 30d3540c58..dd1327ddc8 100644 --- a/bsp/ls1cdev/.config +++ b/bsp/ls1cdev/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/ls1cdev/rtconfig.h b/bsp/ls1cdev/rtconfig.h index 7e140a731c..98ac15d730 100644 --- a/bsp/ls1cdev/rtconfig.h +++ b/bsp/ls1cdev/rtconfig.h @@ -19,6 +19,7 @@ #define IDLE_THREAD_STACK_SIZE 1024 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/m16c62p/rtconfig.h b/bsp/m16c62p/rtconfig.h index 978fe7af50..adcf67e748 100644 --- a/bsp/m16c62p/rtconfig.h +++ b/bsp/m16c62p/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR ///#define SCHEDULER_DEBUG #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/mb9bf568r/rtconfig.h b/bsp/mb9bf568r/rtconfig.h index dc4c61b148..1982028ce7 100644 --- a/bsp/mb9bf568r/rtconfig.h +++ b/bsp/mb9bf568r/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK /* Using Hook */ diff --git a/bsp/mb9bf618s/rtconfig.h b/bsp/mb9bf618s/rtconfig.h index 85c8719d36..1b647a7a30 100644 --- a/bsp/mb9bf618s/rtconfig.h +++ b/bsp/mb9bf618s/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK /* Using Hook */ diff --git a/bsp/mini4020/rtconfig.h b/bsp/mini4020/rtconfig.h index bef31bc1a7..c35134731b 100644 --- a/bsp/mini4020/rtconfig.h +++ b/bsp/mini4020/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* #define RT_THREAD_DEBUG */ #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/nios_ii/rtconfig.h b/bsp/nios_ii/rtconfig.h index 700907e986..fcd3799846 100644 --- a/bsp/nios_ii/rtconfig.h +++ b/bsp/nios_ii/rtconfig.h @@ -21,6 +21,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR //#define THREAD_DEBUG //#define SCHEDULER_DEBUG //#define IRQ_DEBUG diff --git a/bsp/nrf51822/rtconfig.h b/bsp/nrf51822/rtconfig.h index b41bbdadfa..ee7cb6b2f4 100644 --- a/bsp/nrf51822/rtconfig.h +++ b/bsp/nrf51822/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR //#define RT_DEBUG_INIT 1 #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/nuvoton_m05x/.config b/bsp/nuvoton_m05x/.config index 07830e5c36..e86503da27 100644 --- a/bsp/nuvoton_m05x/.config +++ b/bsp/nuvoton_m05x/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/nuvoton_m05x/rtconfig.h b/bsp/nuvoton_m05x/rtconfig.h index db3cc679c8..618084a0af 100644 --- a/bsp/nuvoton_m05x/rtconfig.h +++ b/bsp/nuvoton_m05x/rtconfig.h @@ -19,6 +19,7 @@ #define IDLE_THREAD_STACK_SIZE 256 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/nuvoton_m451/rtconfig.h b/bsp/nuvoton_m451/rtconfig.h index cb4868725c..b47eb84c59 100644 --- a/bsp/nuvoton_m451/rtconfig.h +++ b/bsp/nuvoton_m451/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_DEBUG_INIT 1 #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/nuvoton_m487/.config b/bsp/nuvoton_m487/.config index 2e12793338..6fc68de8e5 100644 --- a/bsp/nuvoton_m487/.config +++ b/bsp/nuvoton_m487/.config @@ -20,6 +20,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/nuvoton_m487/rtconfig.h b/bsp/nuvoton_m487/rtconfig.h index 5eb9dca57e..0fa34764be 100644 --- a/bsp/nuvoton_m487/rtconfig.h +++ b/bsp/nuvoton_m487/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -36,6 +37,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x40000 /* RT-Thread Components */ @@ -147,11 +149,6 @@ /* RT-Thread online packages */ -/* system packages */ - -/* RT-Thread GUI Engine */ - - /* IoT - internet of things */ @@ -163,6 +160,9 @@ /* Wiced WiFi */ +/* IoT Cloud */ + + /* security packages */ @@ -175,10 +175,16 @@ /* tools packages */ +/* system packages */ + + +/* peripheral libraries and drivers */ + + /* miscellaneous packages */ -/* example package: hello */ +/* samples: kernel and components samples */ #endif diff --git a/bsp/nuvoton_nuc472/rtconfig.h b/bsp/nuvoton_nuc472/rtconfig.h index 9d1268a7ff..af9eacbef5 100644 --- a/bsp/nuvoton_nuc472/rtconfig.h +++ b/bsp/nuvoton_nuc472/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_THREAD_DEBUG #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/pic32ethernet/rtconfig.h b/bsp/pic32ethernet/rtconfig.h index 6bd11bfe2e..5d329788bc 100644 --- a/bsp/pic32ethernet/rtconfig.h +++ b/bsp/pic32ethernet/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR //#define THREAD_DEBUG #define SCHEDULER_DEBUG //#define IRQ_DEBUG diff --git a/bsp/qemu-vexpress-a9/.config b/bsp/qemu-vexpress-a9/.config index f5d2fcdd76..5848d809a9 100644 --- a/bsp/qemu-vexpress-a9/.config +++ b/bsp/qemu-vexpress-a9/.config @@ -22,6 +22,7 @@ CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=1024 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -64,7 +65,7 @@ CONFIG_RT_USING_INTERRUPT_INFO=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x30103 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_A=y CONFIG_ARCH_ARM_CORTEX_A9=y @@ -142,6 +143,7 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set @@ -178,6 +180,7 @@ CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y # CONFIG_RT_USING_SPI_WIFI is not set CONFIG_RT_USING_WDT=y # CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set # # Using WiFi @@ -316,6 +319,7 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set @@ -333,6 +337,7 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # Wiced WiFi # # CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set @@ -347,6 +352,8 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_AZURE is not set # CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set # # security packages @@ -378,6 +385,7 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set # # system packages @@ -399,6 +407,18 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # # peripheral libraries and drivers # + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_AHT10 is not set @@ -409,6 +429,7 @@ CONFIG_LOG_TRACE_USING_LEVEL_INFO=y # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_MPU6XXX is not set # CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # diff --git a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c index 55ac034ab9..68f8f09c10 100644 --- a/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c +++ b/bsp/qemu-vexpress-a9/drivers/audio/drv_pl041.c @@ -28,13 +28,11 @@ #include "drv_ac97.h" #include "realview.h" -#define DBG_ENABLE #define DBG_SECTION_NAME "PL041" // #define DBG_LEVEL DBG_LOG // #define DBG_LEVEL DBG_INFO #define DBG_LEVEL DBG_WARNING // #define DBG_LEVEL DBG_ERROR -#define DBG_COLOR #include <rtdbg.h> #define FRAME_PERIOD_US (50) diff --git a/bsp/qemu-vexpress-a9/drivers/drv_keyboard.c b/bsp/qemu-vexpress-a9/drivers/drv_keyboard.c index 7b1a49db55..4948f46117 100644 --- a/bsp/qemu-vexpress-a9/drivers/drv_keyboard.c +++ b/bsp/qemu-vexpress-a9/drivers/drv_keyboard.c @@ -6,10 +6,7 @@ #include "interrupt.h" #include "drv_keyboard.h" -#define DBG_LEVEL DBG_LOG -// #define DBG_ENABLE -#define DBG_COLOR - +#define DBG_LEVEL DBG_INFO #include "rtdbg.h" #define KEYBOARD_ADDRESS (0x10006000) @@ -442,7 +439,7 @@ int rt_hw_keyboard_init(void) pdat = rt_malloc(sizeof(struct keyboard_pl050_pdata_t)); if(!pdat) { - LOG_E("malloc memory", id); + LOG_E("malloc memory failed"); return RT_ERROR; } rt_memset(pdat, 0, sizeof(struct keyboard_pl050_pdata_t)); diff --git a/bsp/qemu-vexpress-a9/drivers/drv_mouse.c b/bsp/qemu-vexpress-a9/drivers/drv_mouse.c index 5fc1434166..852cc56129 100644 --- a/bsp/qemu-vexpress-a9/drivers/drv_mouse.c +++ b/bsp/qemu-vexpress-a9/drivers/drv_mouse.c @@ -7,10 +7,8 @@ #include "drv_mouse.h" #include "drv_clcd.h" -#define DBG_LEVEL DBG_LOG -// #define DBG_ENABLE -#define DBG_COLOR - +#define DBG_SECTION_NAME "drv.mouse" +#define DBG_LEVEL DBG_INFO #include "rtdbg.h" #define MOUSE_ADDRESS (0x10007000) @@ -246,7 +244,7 @@ int rt_hw_mouse_init(void) pdat = rt_malloc(sizeof(struct mouse_pl050_pdata_t)); if(!pdat) { - LOG_E("malloc memory", id); + LOG_E("malloc memory failed"); return RT_ERROR; } rt_memset(pdat, 0, sizeof(struct mouse_pl050_pdata_t)); diff --git a/bsp/qemu-vexpress-a9/drivers/drv_sdio.c b/bsp/qemu-vexpress-a9/drivers/drv_sdio.c index 5f2470f83d..c031011e51 100644 --- a/bsp/qemu-vexpress-a9/drivers/drv_sdio.c +++ b/bsp/qemu-vexpress-a9/drivers/drv_sdio.c @@ -77,10 +77,8 @@ #define PL180_CLR_DAT_END (1 << 8) #define PL180_CLR_DAT_BLK_END (1 << 10) -#define DBG_LEVEL DBG_LOG -// #define DBG_ENABLE -#define DBG_COLOR - +#define DBG_SECTION_NAME "drv.sdio" +#define DBG_LEVEL DBG_INFO #include "rtdbg.h" struct sdhci_pl180_pdata_t @@ -344,10 +342,10 @@ static void mmc_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *re req->cmd->err = sdhci_pl180_transfer(sdhci, &cmd, RT_NULL); } - LOG_I("cmdarg:%d", cmd.cmdarg); - LOG_I("cmdidx:%d", cmd.cmdidx); + LOG_D("cmdarg:%d", cmd.cmdarg); + LOG_D("cmdidx:%d", cmd.cmdidx); - LOG_I("[0]:0x%08x [1]:0x%08x [2]:0x%08x [3]:0x%08x", cmd.response[0], cmd.response[1], cmd.response[2], cmd.response[3]); + LOG_D("[0]:0x%08x [1]:0x%08x [2]:0x%08x [3]:0x%08x", cmd.response[0], cmd.response[1], cmd.response[2], cmd.response[3]); req->cmd->resp[3] = cmd.response[3]; req->cmd->resp[2] = cmd.response[2]; req->cmd->resp[1] = cmd.response[1]; @@ -381,7 +379,7 @@ static void mmc_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io sdhci_pl180_setclock(sdhci, io_cfg->clock); sdhci_pl180_setwidth(sdhci, io_cfg->bus_width); - LOG_I("clock:%d bus_width:%d", io_cfg->clock, io_cfg->bus_width); + LOG_D("clock:%d bus_width:%d", io_cfg->clock, io_cfg->bus_width); } static const struct rt_mmcsd_host_ops ops = diff --git a/bsp/qemu-vexpress-a9/rtconfig.h b/bsp/qemu-vexpress-a9/rtconfig.h index bf53cedf40..3da7b8f976 100644 --- a/bsp/qemu-vexpress-a9/rtconfig.h +++ b/bsp/qemu-vexpress-a9/rtconfig.h @@ -20,6 +20,7 @@ #define RT_TIMER_THREAD_PRIO 4 #define RT_TIMER_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -45,7 +46,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x30103 #define ARCH_ARM #define ARCH_ARM_CORTEX_A #define ARCH_ARM_CORTEX_A9 @@ -105,6 +106,7 @@ #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_I2C #define RT_USING_I2C_BITOPS #define RT_USING_PIN @@ -241,6 +243,8 @@ /* peripheral libraries and drivers */ +/* sensors drivers */ + /* miscellaneous packages */ diff --git a/bsp/qemu-vexpress-gemini/.config b/bsp/qemu-vexpress-gemini/.config index 425f9a1eae..b7610b6c5e 100644 --- a/bsp/qemu-vexpress-gemini/.config +++ b/bsp/qemu-vexpress-gemini/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=512 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/qemu-vexpress-gemini/rtconfig.h b/bsp/qemu-vexpress-gemini/rtconfig.h index 7218fedca1..acb00aadda 100644 --- a/bsp/qemu-vexpress-gemini/rtconfig.h +++ b/bsp/qemu-vexpress-gemini/rtconfig.h @@ -19,6 +19,7 @@ #define IDLE_THREAD_STACK_SIZE 512 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/raspi2/.config b/bsp/raspi2/.config index 7db26a7cb1..5821005c0c 100644 --- a/bsp/raspi2/.config +++ b/bsp/raspi2/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/raspi2/rtconfig.h b/bsp/raspi2/rtconfig.h index d0b692f9ab..b2e6349ad0 100644 --- a/bsp/raspi2/rtconfig.h +++ b/bsp/raspi2/rtconfig.h @@ -19,6 +19,7 @@ #define IDLE_THREAD_STACK_SIZE 256 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/realview-a8/rtconfig.h b/bsp/realview-a8/rtconfig.h index d06e81a0e1..68d28bcd93 100644 --- a/bsp/realview-a8/rtconfig.h +++ b/bsp/realview-a8/rtconfig.h @@ -20,6 +20,7 @@ #define IDLE_THREAD_STACK_SIZE 512 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/bsp/rx/rtconfig.h b/bsp/rx/rtconfig.h index 364204696f..6f055dce1a 100644 --- a/bsp/rx/rtconfig.h +++ b/bsp/rx/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_THREAD_DEBUG #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/samd21/rtconfig.h b/bsp/samd21/rtconfig.h index c22a5496e7..99fe288e3a 100644 --- a/bsp/samd21/rtconfig.h +++ b/bsp/samd21/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR //#define RT_DEBUG_INIT 1 #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/sep6200/rtconfig.h b/bsp/sep6200/rtconfig.h index e2ca52cc5c..c078a6b5a2 100644 --- a/bsp/sep6200/rtconfig.h +++ b/bsp/sep6200/rtconfig.h @@ -2,7 +2,6 @@ #ifndef __RTTHREAD_CFG_H__ #define __RTTHREAD_CFG_H__ -#define RT_DEBUG /* #define RT_DEBUG_IRQ 1 */ /* #define RT_DEBUG_TIMER 1 */ @@ -29,6 +28,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* #define RT_THREAD_DEBUG */ #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/simulator/.config b/bsp/simulator/.config index dbb69fd390..479f5658d1 100644 --- a/bsp/simulator/.config +++ b/bsp/simulator/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/simulator/rtconfig.h b/bsp/simulator/rtconfig.h index 4955172df7..22f9d2a5b4 100755 --- a/bsp/simulator/rtconfig.h +++ b/bsp/simulator/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32/README.md b/bsp/stm32/README.md index c64158b70f..e005fce598 100644 --- a/bsp/stm32/README.md +++ b/bsp/stm32/README.md @@ -7,7 +7,9 @@ STM32 系列 BSP 目前支持情况如下表所示： | **F0 系列** | | | [stm32f091-st-nucleo](stm32f091-st-nucleo) | ST 官方 STM32F091-nucleo 开发板 | | **F1 系列** | | +| [stm32f103-mini-system](stm32f103-mini-system) | STM32F103C8T6最小系统板 | | [stm32f103-atk-nano](stm32f103-atk-nano) | 正点原子 F103 NANO 开发板 | +| [stm32f103-atk-warshipv3](stm32f103-atk-warshipv3) | 正点原子 F103 战舰V3 开发板 | | [stm32f103-dofly-lyc8](stm32f103-dofly-lyc8) | 德飞莱 STM32F103 开发板 | | [stm32f103-fire-arbitrary](stm32f103-fire-arbitrary/) | 野火 F103 霸道开发板 | | [stm32f103-hw100k-ibox](stm32f103-hw100k-ibox) | 硬件十万个为什么 STM32F103 iBox 开发板 | diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h index 938d291ee9..0c16ccd066 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h @@ -36,6 +36,12 @@ extern "C" { #define SPI1_TX_DMA_INSTANCE DMA1_Channel3 #define SPI1_TX_DMA_REQUEST DMA_REQUEST_1 #define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn +#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) +#define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler +#define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART3_RX_DMA_INSTANCE DMA1_Channel3 +#define UART3_RX_DMA_REQUEST DMA_REQUEST_2 +#define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn #endif /* DMA1 channel4 */ @@ -45,6 +51,12 @@ extern "C" { #define UART1_TX_DMA_INSTANCE DMA1_Channel4 #define UART1_TX_DMA_REQUEST DMA_REQUEST_2 #define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn +#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE) +#define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler +#define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define SPI2_RX_DMA_INSTANCE DMA1_Channel4 +#define SPI2_RX_DMA_REQUEST DMA_REQUEST_1 +#define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn #endif /* DMA1 channel5 */ @@ -60,9 +72,22 @@ extern "C" { #define QSPI_DMA_INSTANCE DMA1_Channel5 #define QSPI_DMA_REQUEST DMA_REQUEST_5 #define QSPI_DMA_IRQ DMA1_Channel5_IRQn +#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE) +#define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler +#define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define SPI2_TX_DMA_INSTANCE DMA1_Channel5 +#define SPI2_TX_DMA_REQUEST DMA_REQUEST_1 +#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn #endif /* DMA1 channel6 */ +#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Channel6 +#define UART2_RX_DMA_REQUEST DMA_REQUEST_2 +#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn +#endif /* DMA1 channel7 */ @@ -126,6 +151,12 @@ extern "C" { #define QSPI_DMA_INSTANCE DMA2_Channel7 #define QSPI_DMA_REQUEST DMA_REQUEST_3 #define QSPI_DMA_IRQ DMA2_Channel7_IRQn +#elif defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE) +#define LPUART1_DMA_RX_IRQHandler DMA2_Channel7_IRQHandler +#define LPUART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN +#define LPUART1_RX_DMA_INSTANCE DMA2_Channel7 +#define LPUART1_RX_DMA_REQUEST DMA_REQUEST_4 +#define LPUART1_RX_DMA_IRQ DMA2_Channel7_IRQn #endif #ifdef __cplusplus diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h new file mode 100644 index 0000000000..71811dba84 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-13 BalanceTWK first version + */ + +#ifndef __SDIO_CONFIG_H__ +#define __SDIO_CONFIG_H__ + +#include <rtthread.h> +#include "stm32l4xx_hal.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_SDIO +#define SDIO_BUS_CONFIG \ + { \ + .Instance = SDMMC1, \ + .dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \ + .dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \ + .dma_rx.Instance = DMA2_Channel4, \ + .dma_rx.request = DMA_REQUEST_7, \ + .dma_rx.dma_irq = DMA2_Channel4_IRQn, \ + .dma_tx.Instance = DMA2_Channel5, \ + .dma_tx.request = DMA_REQUEST_7, \ + .dma_tx.dma_irq = DMA2_Channel5_IRQn, \ + } + +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*__SDIO_CONFIG_H__ */ + + + diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h index c9c248d6d4..72f28404bd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h @@ -52,21 +52,38 @@ extern "C" { #endif /* BSP_SPI1_RX_USING_DMA */ #ifdef BSP_USING_SPI2 +#ifndef SPI2_BUS_CONFIG #define SPI2_BUS_CONFIG \ { \ .Instance = SPI2, \ .bus_name = "spi2", \ - .dma_rx.dma_rcc = RCC_AHB1ENR_DMA1EN, \ - .dma_tx.dma_rcc = RCC_AHB1ENR_DMA1EN, \ - .dma_rx.Instance = DMA1_Channel4, \ - .dma_rx.request = DMA_REQUEST_1, \ - .dma_rx.dma_irq = DMA1_Channel4_IRQn, \ - .dma_tx.Instance = DMA1_Channel5, \ - .dma_tx.request = DMA_REQUEST_1, \ - .dma_tx.dma_irq = DMA1_Channel5_IRQn, \ } +#endif /* SPI2_BUS_CONFIG */ +#endif /* BSP_USING_SPI2 */ -#endif +#ifdef BSP_SPI2_TX_USING_DMA +#ifndef SPI2_TX_DMA_CONFIG +#define SPI2_TX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_TX_DMA_RCC, \ + .Instance = SPI2_TX_DMA_INSTANCE, \ + .request = SPI2_TX_DMA_REQUEST, \ + .dma_irq = SPI2_TX_DMA_IRQ, \ + } +#endif /* SPI2_TX_DMA_CONFIG */ +#endif /* BSP_SPI2_TX_USING_DMA */ + +#ifdef BSP_SPI2_RX_USING_DMA +#ifndef SPI2_RX_DMA_CONFIG +#define SPI2_RX_DMA_CONFIG \ + { \ + .dma_rcc = SPI2_RX_DMA_RCC, \ + .Instance = SPI2_RX_DMA_INSTANCE, \ + .request = SPI2_RX_DMA_REQUEST, \ + .dma_irq = SPI2_RX_DMA_IRQ, \ + } +#endif /* SPI2_RX_DMA_CONFIG */ +#endif /* BSP_SPI2_RX_USING_DMA */ #ifdef BSP_USING_SPI3 #define SPI3_BUS_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h index 3abb984371..71d61065c9 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h @@ -17,6 +17,28 @@ extern "C" { #endif +#if defined(BSP_USING_LPUART1) +#ifndef LPUART1_CONFIG +#define LPUART1_CONFIG \ + { \ + .name = "lpuart1", \ + .Instance = LPUART1, \ + .irq_type = LPUART1_IRQn, \ + } +#endif /* LPUART1_CONFIG */ +#if defined(BSP_LPUART1_RX_USING_DMA) +#ifndef LPUART1_DMA_CONFIG +#define LPUART1_DMA_CONFIG \ + { \ + .Instance = LPUART1_RX_DMA_INSTANCE, \ + .request = LPUART1_RX_DMA_REQUEST, \ + .dma_rcc = LPUART1_RX_DMA_RCC, \ + .dma_irq = LPUART1_RX_DMA_IRQ, \ + } +#endif /* LPUART1_DMA_CONFIG */ +#endif /* BSP_LPUART1_RX_USING_DMA */ +#endif /* BSP_USING_LPUART1 */ + #if defined(BSP_USING_UART1) #ifndef UART1_CONFIG #define UART1_CONFIG \ @@ -63,6 +85,29 @@ extern "C" { #endif /* UART2_DMA_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_IRQn, \ + } +#endif /* UART3_CONFIG */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_UART3_RX_USING_DMA) +#ifndef UART3_DMA_CONFIG +#define UART3_DMA_CONFIG \ + { \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .request = UART3_RX_DMA_REQUEST, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ + } +#endif /* UART3_DMA_CONFIG */ +#endif /* BSP_UART3_RX_USING_DMA */ + #ifdef __cplusplus } #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index e267b94b24..350c3fab40 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -87,6 +87,41 @@ void _Error_Handler(char *s, int num) } /** + * This function will delay for some us. + * + * @param us the delay time of us + */ +void rt_hw_us_delay(rt_uint32_t us) +{ + rt_uint32_t ticks; + rt_uint32_t told, tnow, tcnt = 0; + rt_uint32_t reload = SysTick->LOAD; + + ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); + told = SysTick->VAL; + while (1) + { + tnow = SysTick->VAL; + if (tnow != told) + { + if (tnow < told) + { + tcnt += told - tnow; + } + else + { + tcnt += reload - tnow + told; + } + told = tnow; + if (tcnt >= ticks) + { + break; + } + } + } +} + +/** * This function will initial STM32 board. */ RT_WEAK void rt_hw_board_init() diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index d11118b865..e497f496af 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -60,6 +60,7 @@ extern "C" { #include "l4/qspi_config.h" #include "l4/adc_config.h" #include "l4/tim_config.h" +#include "l4/sdio_config.h" #include "l4/pwm_config.h" #elif defined(SOC_SERIES_STM32G0) #include "g0/dma_config.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c index d92e11b583..58f3d2029b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2018-12-5 SummerGift first version + * 2019-3-2 jinsheng add Macro judgment */ #include "board.h" @@ -21,7 +22,32 @@ //#define DRV_DEBUG #define LOG_TAG "drv.flash" #include <drv_log.h> - +#if defined (FLASH_OPTCR_nDBANK) +#define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08004000) /* Base address of Sector 1, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08008000) /* Base address of Sector 2, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_3 ((rt_uint32_t)0x0800C000) /* Base address of Sector 3, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_4 ((rt_uint32_t)0x08010000) /* Base address of Sector 4, 64 Kbytes */ +#define ADDR_FLASH_SECTOR_5 ((rt_uint32_t)0x08020000) /* Base address of Sector 5, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_6 ((rt_uint32_t)0x08040000) /* Base address of Sector 6, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_7 ((rt_uint32_t)0x08060000) /* Base address of Sector 7, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_8 ((rt_uint32_t)0x08080000) /* Base address of Sector 8, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_9 ((rt_uint32_t)0x080A0000) /* Base address of Sector 9, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_10 ((rt_uint32_t)0x080C0000) /* Base address of Sector 10, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_11 ((rt_uint32_t)0x080E0000) /* Base address of Sector 11, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_12 ((rt_uint32_t)0x08100000) /* Base address of Sector 12, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_13 ((rt_uint32_t)0x08104000) /* Base address of Sector 13, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_14 ((rt_uint32_t)0x08108000) /* Base address of Sector 14, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_15 ((rt_uint32_t)0x0810C000) /* Base address of Sector 15, 16 Kbytes */ +#define ADDR_FLASH_SECTOR_16 ((rt_uint32_t)0x08110000) /* Base address of Sector 16, 64 Kbytes */ +#define ADDR_FLASH_SECTOR_17 ((rt_uint32_t)0x08120000) /* Base address of Sector 17, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_18 ((rt_uint32_t)0x08140000) /* Base address of Sector 18, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_19 ((rt_uint32_t)0x08160000) /* Base address of Sector 19, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_20 ((rt_uint32_t)0x08180000) /* Base address of Sector 20, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_21 ((rt_uint32_t)0x081A0000) /* Base address of Sector 21, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_22 ((rt_uint32_t)0x081C0000) /* Base address of Sector 22, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_23 ((rt_uint32_t)0x081E0000) /* Base address of Sector 23, 128 Kbytes */ +#else #define ADDR_FLASH_SECTOR_0 ((rt_uint32_t)0x08000000) /* Base address of Sector 0, 32 Kbytes */ #define ADDR_FLASH_SECTOR_1 ((rt_uint32_t)0x08008000) /* Base address of Sector 1, 32 Kbytes */ #define ADDR_FLASH_SECTOR_2 ((rt_uint32_t)0x08010000) /* Base address of Sector 2, 32 Kbytes */ @@ -34,7 +60,7 @@ #define ADDR_FLASH_SECTOR_9 ((rt_uint32_t)0x08140000) /* Base address of Sector 9, 256 Kbytes */ #define ADDR_FLASH_SECTOR_10 ((rt_uint32_t)0x08180000) /* Base address of Sector 10, 256 Kbytes */ #define ADDR_FLASH_SECTOR_11 ((rt_uint32_t)0x081C0000) /* Base address of Sector 11, 256 Kbytes */ - +#endif /** * @brief Gets the sector of a given address * @param None @@ -43,7 +69,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { rt_uint32_t sector = 0; - +#if defined (FLASH_OPTCR_nDBANK) if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0)) { sector = FLASH_SECTOR_0; @@ -52,6 +78,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_1; } +#if (FLASH_SECTOR_TOTAL >= 4) else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2)) { sector = FLASH_SECTOR_2; @@ -60,6 +87,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_3; } +#elif (FLASH_SECTOR_TOTAL >= 8) else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4)) { sector = FLASH_SECTOR_4; @@ -76,6 +104,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_7; } +#elif (FLASH_SECTOR_TOTAL >= 24) else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8)) { sector = FLASH_SECTOR_8; @@ -88,10 +117,127 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_10; } - else /* (Address < FLASH_END_ADDR) && (Address >= ADDR_FLASH_SECTOR_11) */ + else if ((Address < ADDR_FLASH_SECTOR_12) && (Address >= ADDR_FLASH_SECTOR_11)) { sector = FLASH_SECTOR_11; } + else if ((Address < ADDR_FLASH_SECTOR_13) && (Address >= ADDR_FLASH_SECTOR_12)) + { + sector = FLASH_SECTOR_12; + } + else if ((Address < ADDR_FLASH_SECTOR_14) && (Address >= ADDR_FLASH_SECTOR_13)) + { + sector = FLASH_SECTOR_13; + } + else if ((Address < ADDR_FLASH_SECTOR_15) && (Address >= ADDR_FLASH_SECTOR_14)) + { + sector = FLASH_SECTOR_14; + } + else if ((Address < ADDR_FLASH_SECTOR_16) && (Address >= ADDR_FLASH_SECTOR_15)) + { + sector = FLASH_SECTOR_15; + } + else if ((Address < ADDR_FLASH_SECTOR_17) && (Address >= ADDR_FLASH_SECTOR_16)) + { + sector = FLASH_SECTOR_16; + } + else if ((Address < ADDR_FLASH_SECTOR_18) && (Address >= ADDR_FLASH_SECTOR_17)) + { + sector = FLASH_SECTOR_17; + } + else if ((Address < ADDR_FLASH_SECTOR_19) && (Address >= ADDR_FLASH_SECTOR_18)) + { + sector = FLASH_SECTOR_18; + } + else if ((Address < ADDR_FLASH_SECTOR_20) && (Address >= ADDR_FLASH_SECTOR_19)) + { + sector = FLASH_SECTOR_19; + } + else if ((Address < ADDR_FLASH_SECTOR_21) && (Address >= ADDR_FLASH_SECTOR_20)) + { + sector = FLASH_SECTOR_20; + } + else if ((Address < ADDR_FLASH_SECTOR_22) && (Address >= ADDR_FLASH_SECTOR_21)) + { + sector = FLASH_SECTOR_21; + } + else if ((Address < ADDR_FLASH_SECTOR_23) && (Address >= ADDR_FLASH_SECTOR_22)) + { + sector = FLASH_SECTOR_22; + } +#else + else + { +#if (FLASH_SECTOR_TOTAL == 4) + sector = FLASH_SECTOR_4; +#elif (FLASH_SECTOR_TOTAL == 8) + sector = FLASH_SECTOR_8; +#elif (FLASH_SECTOR_TOTAL == 24) + sector = FLASH_SECTOR_23; +#endif + } +#endif +#else + if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0)) + { + sector = FLASH_SECTOR_0; + } + else if ((Address < ADDR_FLASH_SECTOR_2) && (Address >= ADDR_FLASH_SECTOR_1)) + { + sector = FLASH_SECTOR_1; + } +#if (FLASH_SECTOR_TOTAL >= 4) + else if ((Address < ADDR_FLASH_SECTOR_3) && (Address >= ADDR_FLASH_SECTOR_2)) + { + sector = FLASH_SECTOR_2; + } + else if ((Address < ADDR_FLASH_SECTOR_4) && (Address >= ADDR_FLASH_SECTOR_3)) + { + sector = FLASH_SECTOR_3; + } +#elif (FLASH_SECTOR_TOTAL >= 8) + else if ((Address < ADDR_FLASH_SECTOR_5) && (Address >= ADDR_FLASH_SECTOR_4)) + { + sector = FLASH_SECTOR_4; + } + else if ((Address < ADDR_FLASH_SECTOR_6) && (Address >= ADDR_FLASH_SECTOR_5)) + { + sector = FLASH_SECTOR_5; + } + else if ((Address < ADDR_FLASH_SECTOR_7) && (Address >= ADDR_FLASH_SECTOR_6)) + { + sector = FLASH_SECTOR_6; + } + else if ((Address < ADDR_FLASH_SECTOR_8) && (Address >= ADDR_FLASH_SECTOR_7)) + { + sector = FLASH_SECTOR_7; + } +#elif (FLASH_SECTOR_TOTAL >= 24) + else if ((Address < ADDR_FLASH_SECTOR_9) && (Address >= ADDR_FLASH_SECTOR_8)) + { + sector = FLASH_SECTOR_8; + } + else if ((Address < ADDR_FLASH_SECTOR_10) && (Address >= ADDR_FLASH_SECTOR_9)) + { + sector = FLASH_SECTOR_9; + } + else if ((Address < ADDR_FLASH_SECTOR_11) && (Address >= ADDR_FLASH_SECTOR_10)) + { + sector = FLASH_SECTOR_10; + } +#else + else + { +#if (FLASH_SECTOR_TOTAL == 4) + sector = FLASH_SECTOR_4; +#elif (FLASH_SECTOR_TOTAL == 8) + sector = FLASH_SECTOR_8; +#elif (FLASH_SECTOR_TOTAL == 24) + sector = FLASH_SECTOR_11; +#endif + } +#endif +#endif return sector; } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_log.h b/bsp/stm32/libraries/HAL_Drivers/drv_log.h index f7461223d7..69328b368a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_log.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_log.h @@ -12,9 +12,6 @@ * NOTE: DO NOT include this file on the header file. */ -#define DBG_ENABLE -#define DBG_COLOR - #ifndef LOG_TAG #define DBG_SECTION_NAME "drv" #else diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c index f781e51b0d..444fe94a51 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c @@ -414,6 +414,12 @@ static void pwm_get_channel(void) #ifdef BSP_USING_PWM2_CH1 stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 0; #endif +#ifdef BSP_USING_PWM2_CH2 + stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 1; +#endif +#ifdef BSP_USING_PWM2_CH3 + stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 2; +#endif #ifdef BSP_USING_PWM2_CH4 stm32_pwm_obj[PWM2_INDEX].channel |= 1 << 3; #endif @@ -429,21 +435,78 @@ static void pwm_get_channel(void) #ifdef BSP_USING_PWM3_CH4 stm32_pwm_obj[PWM3_INDEX].channel |= 1 << 3; #endif +#ifdef BSP_USING_PWM4_CH1 + stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 0; +#endif #ifdef BSP_USING_PWM4_CH2 stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 1; #endif #ifdef BSP_USING_PWM4_CH3 stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 2; #endif +#ifdef BSP_USING_PWM4_CH4 + stm32_pwm_obj[PWM4_INDEX].channel |= 1 << 3; +#endif #ifdef BSP_USING_PWM5_CH1 - stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 1; + stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 0; #endif #ifdef BSP_USING_PWM5_CH2 - stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 2; + stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 1; #endif #ifdef BSP_USING_PWM5_CH3 + stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 2; +#endif +#ifdef BSP_USING_PWM5_CH4 stm32_pwm_obj[PWM5_INDEX].channel |= 1 << 3; #endif +#ifdef BSP_USING_PWM6_CH1 + stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 0; +#endif +#ifdef BSP_USING_PWM6_CH2 + stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 1; +#endif +#ifdef BSP_USING_PWM6_CH3 + stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 2; +#endif +#ifdef BSP_USING_PWM6_CH4 + stm32_pwm_obj[PWM6_INDEX].channel |= 1 << 3; +#endif +#ifdef BSP_USING_PWM7_CH1 + stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 0; +#endif +#ifdef BSP_USING_PWM7_CH2 + stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 1; +#endif +#ifdef BSP_USING_PWM7_CH3 + stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 2; +#endif +#ifdef BSP_USING_PWM7_CH4 + stm32_pwm_obj[PWM7_INDEX].channel |= 1 << 3; +#endif +#ifdef BSP_USING_PWM8_CH1 + stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 0; +#endif +#ifdef BSP_USING_PWM8_CH2 + stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 1; +#endif +#ifdef BSP_USING_PWM8_CH3 + stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 2; +#endif +#ifdef BSP_USING_PWM8_CH4 + stm32_pwm_obj[PWM8_INDEX].channel |= 1 << 3; +#endif +#ifdef BSP_USING_PWM9_CH1 + stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 0; +#endif +#ifdef BSP_USING_PWM9_CH2 + stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 1; +#endif +#ifdef BSP_USING_PWM9_CH3 + stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 2; +#endif +#ifdef BSP_USING_PWM9_CH4 + stm32_pwm_obj[PWM9_INDEX].channel |= 1 << 3; +#endif } static int stm32_pwm_init(void) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c index 84eccb519b..335b97da1c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c @@ -190,13 +190,13 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio) cmd->cmd_code, cmd->arg, data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-', - data ? data->blks * data->blksize : 0, - data ? data->blksize : 0 - ); + data ? data->blks * data->blksize : 0, + data ? data->blksize : 0 + ); } } else -{ + { cmd->err = RT_EOK; LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); } @@ -278,9 +278,9 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg) resp_type(cmd) == RESP_R6 ? "R6" : "", resp_type(cmd) == RESP_R7 ? "R7" : "", data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-', - data ? data->blks * data->blksize : 0, - data ? data->blksize : 0 - ); + data ? data->blks * data->blksize : 0, + data ? data->blksize : 0 + ); /* config cmd reg */ reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE; @@ -293,7 +293,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg) /* config data reg */ if (data != RT_NULL) -{ + { rt_uint32_t dir = 0; rt_uint32_t size = data->blks * data->blksize; int order; @@ -701,6 +701,25 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize) HAL_DMA_Init(&sdio_obj.dma.handle_tx); HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + +#elif defined(SOC_SERIES_STM32L4) + static uint32_t size = 0; + size += BufferSize * 4; + sdio_obj.cfg = &sdio_config; + sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_tx.Init.Request = sdio_config.dma_tx.request; + sdio_obj.dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_tx.Init.Mode = DMA_NORMAL; + sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); + HAL_DMA_Init(&sdio_obj.dma.handle_tx); + + HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); #else static uint32_t size = 0; size += BufferSize * 4; @@ -736,38 +755,54 @@ void SD_LowLevel_DMA_RxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize) { #if defined(SOC_SERIES_STM32F1) sdio_obj.cfg = &sdio_config; - sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; - sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY; - sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; - sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; - sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM; - HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); - HAL_DMA_Init(&sdio_obj.dma.handle_tx); + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); - HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); +#elif defined(SOC_SERIES_STM32L4) + sdio_obj.cfg = &sdio_config; + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Request = sdio_config.dma_tx.request; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.Mode = DMA_NORMAL; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_LOW; + + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); + + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); #else sdio_obj.cfg = &sdio_config; - sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance; - sdio_obj.dma.handle_tx.Init.Channel = sdio_config.dma_tx.channel; - sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY; - sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE; - sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE; - sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; - sdio_obj.dma.handle_tx.Init.Mode = DMA_PFCTRL; - sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM; - sdio_obj.dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - sdio_obj.dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - sdio_obj.dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4; - sdio_obj.dma.handle_tx.Init.PeriphBurst = DMA_PBURST_INC4; + sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance; + sdio_obj.dma.handle_rx.Init.Channel = sdio_config.dma_tx.channel; + sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE; + sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE; + sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sdio_obj.dma.handle_rx.Init.Mode = DMA_PFCTRL; + sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM; + sdio_obj.dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; + sdio_obj.dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + sdio_obj.dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4; + sdio_obj.dma.handle_rx.Init.PeriphBurst = DMA_PBURST_INC4; - HAL_DMA_DeInit(&sdio_obj.dma.handle_tx); - HAL_DMA_Init(&sdio_obj.dma.handle_tx); + HAL_DMA_DeInit(&sdio_obj.dma.handle_rx); + HAL_DMA_Init(&sdio_obj.dma.handle_rx); - HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize); + HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize); #endif } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c index 819b3b1da0..af89ae703a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c @@ -18,7 +18,7 @@ #define LOG_TAG "drv.i2c" #include <drv_log.h> -#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) +#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4) #error "Please define at least one BSP_USING_I2Cx" /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #endif @@ -34,6 +34,9 @@ static const struct stm32_soft_i2c_config soft_i2c_config[] = #ifdef BSP_USING_I2C3 I2C3_BUS_CONFIG, #endif +#ifdef BSP_USING_I2C4 + I2C4_BUS_CONFIG, +#endif }; static struct stm32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h index e87eec8201..31cba68f92 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h @@ -55,7 +55,15 @@ struct stm32_i2c .bus_name = "i2c3", \ } #endif - + +#ifdef BSP_USING_I2C4 +#define I2C4_BUS_CONFIG \ + { \ + .scl = BSP_I2C4_SCL_PIN, \ + .sda = BSP_I2C4_SDA_PIN, \ + .bus_name = "i2c4", \ + } +#endif int rt_hw_i2c_init(void); #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 0477f7d9fd..446533d89f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -442,7 +442,6 @@ void LPUART1_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } - #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) void LPUART1_DMA_RX_IRQHandler(void) { @@ -454,8 +453,8 @@ void LPUART1_DMA_RX_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */ -#endif /* BSP_USING_LPUART1 */ +#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */ +#endif /* BSP_USING_LPUART1*/ #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) @@ -611,8 +610,8 @@ static void stm32_uart_get_dma_config(void) #endif #ifdef BSP_LPUART1_RX_USING_DMA uart_obj[LPUART1_INDEX].uart_dma_flag = 1; - static struct dma_config uart5_dma_rx = LPUART1_DMA_CONFIG; - uart_config[LPUART1_INDEX].dma_rx = &uart5_dma_rx; + static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG; + uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx; #endif } diff --git a/bsp/stm32/libraries/STM32F7xx_HAL/SConscript b/bsp/stm32/libraries/STM32F7xx_HAL/SConscript index 7b4507d33d..a21fa3e4fa 100644 --- a/bsp/stm32/libraries/STM32F7xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32F7xx_HAL/SConscript @@ -93,6 +93,12 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH']): src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c'] src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c'] +if GetDepend(['BSP_USING_LTDC']): + src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c'] + src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c'] + src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c'] + src += ['STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma2d.c'] + path = [cwd + '/STM32F7xx_HAL_Driver/Inc', cwd + '/CMSIS/Device/ST/STM32F7xx/Include', cwd + '/CMSIS/Include'] diff --git a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript index 5d6f0d9032..baeda8c18d 100644 --- a/bsp/stm32/libraries/STM32L4xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32L4xx_HAL/SConscript @@ -73,6 +73,7 @@ if GetDepend(['RT_USING_WDT']): if GetDepend(['RT_USING_SDIO']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c'] src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c'] + src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c'] if GetDepend(['RT_USING_AUDIO']): src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c'] diff --git a/bsp/stm32/libraries/templates/stm32f0xx/.config b/bsp/stm32/libraries/templates/stm32f0xx/.config index 95ba89c2b8..71e677bd8d 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/.config +++ b/bsp/stm32/libraries/templates/stm32f0xx/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.h b/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.h index 0026ccb4a8..0ed9946b4d 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.h +++ b/bsp/stm32/libraries/templates/stm32f0xx/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/libraries/templates/stm32f10x/.config b/bsp/stm32/libraries/templates/stm32f10x/.config index 4d9fc24b34..a7356cd424 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/.config +++ b/bsp/stm32/libraries/templates/stm32f10x/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/libraries/templates/stm32f10x/rtconfig.h b/bsp/stm32/libraries/templates/stm32f10x/rtconfig.h index 63450a8a21..b49535ef9c 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/rtconfig.h +++ b/bsp/stm32/libraries/templates/stm32f10x/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/libraries/templates/stm32f4xx/.config b/bsp/stm32/libraries/templates/stm32f4xx/.config index 973b093b5b..e685a4fdcf 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/.config +++ b/bsp/stm32/libraries/templates/stm32f4xx/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.h b/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.h index 8e6b709a8a..eef0a9fe47 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.h +++ b/bsp/stm32/libraries/templates/stm32f4xx/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/libraries/templates/stm32f7xx/.config b/bsp/stm32/libraries/templates/stm32f7xx/.config index a594f088db..da5d2099bf 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/.config +++ b/bsp/stm32/libraries/templates/stm32f7xx/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.h b/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.h index 50eb442ed8..019e9ccb3a 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.h +++ b/bsp/stm32/libraries/templates/stm32f7xx/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/libraries/templates/stm32l4xx/.config b/bsp/stm32/libraries/templates/stm32l4xx/.config index e29aecd0c8..7349adcc55 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/.config +++ b/bsp/stm32/libraries/templates/stm32l4xx/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.h b/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.h index 6ae4a7ba8a..b6055004ae 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.h +++ b/bsp/stm32/libraries/templates/stm32l4xx/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f091-st-nucleo/.config b/bsp/stm32/stm32f091-st-nucleo/.config index 0fced6c38b..4fad5a0bb3 100644 --- a/bsp/stm32/stm32f091-st-nucleo/.config +++ b/bsp/stm32/stm32f091-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f091-st-nucleo/rtconfig.h b/bsp/stm32/stm32f091-st-nucleo/rtconfig.h index dc6298a719..791373ea2e 100644 --- a/bsp/stm32/stm32f091-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32f091-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f103-atk-nano/.config b/bsp/stm32/stm32f103-atk-nano/.config index 7a4eec1ff9..52ed83da63 100644 --- a/bsp/stm32/stm32f103-atk-nano/.config +++ b/bsp/stm32/stm32f103-atk-nano/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f103-atk-nano/rtconfig.h b/bsp/stm32/stm32f103-atk-nano/rtconfig.h index 816034b45d..619439d3f5 100644 --- a/bsp/stm32/stm32f103-atk-nano/rtconfig.h +++ b/bsp/stm32/stm32f103-atk-nano/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/.config b/bsp/stm32/stm32f103-atk-warshipv3/.config new file mode 100644 index 0000000000..a5591a3de7 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/.config @@ -0,0 +1,350 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +CONFIG_RT_VER_NUM=0x40001 +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M3=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set + +# +# Using WiFi +# +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# Modbus master and slave stack +# +# CONFIG_RT_USING_MODBUS is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# ARM CMSIS +# +# CONFIG_RT_USING_CMSIS_OS is not set +# CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32F1=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32F103ZE=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +# CONFIG_BSP_USING_UART2 is not set +CONFIG_BSP_UART1_RX_USING_DMA=y + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32f103-atk-warshipv3/.gitignore b/bsp/stm32/stm32f103-atk-warshipv3/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32f103-atk-warshipv3/Kconfig b/bsp/stm32/stm32f103-atk-warshipv3/Kconfig new file mode 100644 index 0000000000..7a400db91f --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/Kconfig @@ -0,0 +1,22 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" + diff --git a/bsp/stm32/stm32f103-atk-warshipv3/README.md b/bsp/stm32/stm32f103-atk-warshipv3/README.md new file mode 100644 index 0000000000..9eb3a0d011 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/README.md @@ -0,0 +1,124 @@ +# STM32F103 正点原子战舰V3开发板 BSP 说明 + +## 简介 + +本文档为 正点原子战舰V3 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +STM32F103战舰V3，资源丰富，接口多，功能强大，性价比高，资料全，外观炫酷，布局人性化，配件丰富，配件的接口丰富，是学习嵌入式的好开发板 + +开发板外观如下图所示： + + + +该开发板常用 **板载资源** 如下： + +- MCU：STM32F103ZET6，主频 72MHz，512KB FLASH ，64KB RAM +- 外部 RAM：无 +- 外部 FLASH：W25Q128（SPI2，128MB）、EEPROM（24c02） +- 常用外设 + - LED：2个，DS0（黄色，PB5），DS1（红色，PE5） + - 按键：4个，K0（兼具唤醒功能，PA0），K1（PE4）, K2 (PE3) , K3 (PE2) +- 常用接口：USB 转串口、SD 卡接口、以太网接口、LCD 接口、USB SLAVE等 +- 调试接口，板载的 ST-LINK SWD 下载 + +开发板更多详细信息请参考[正点原子] [战舰V3开发板介绍] http://www.openedv.com + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| USB 转串口 | 支持 | UART1 | +| SPI Flash | 支持 | W25Q128 128M FLASH SPI2 | +| 以太网 | 支持 | DM9000 | +| SD卡 | 支持 | | +| RS485 | 支持 | USART2 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PG15 ---> PIN: 0, 1...111 | +| UART | 支持 | UART1/2/3 | +| SPI | 支持 | SPI1/2 | +| I2C | 支持 | 软件 I2C | +| ADC | 支持 | | +| RTC | 支持 | | +| PWM | 支持 | TIM3 CH1 TIM3 CH2 | +| CAN | 支持 | | +| IWG | 支持 | | +| **扩展模块** | **支持情况** | **备注** | +| esp8266 | 支持 | USART3 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-Link 仿真器下载程序，在通过 ST-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，两个 LED 闪烁 。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.1 build Mar 10 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 此开发板外部高速晶振是 12MHz ; +- 建议使用USB转TTL连接到PC机 ; +- 正点原子开发板 在使用终端工具如：PuTTy、XShell 时，会出现系统不能启动的问题，推荐使用串口调试助手如：sscom + +## 联系人信息 + +维护人: + +- [obito0](https://github.com/obito0), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/stm32/stm32f103-atk-warshipv3/SConscript b/bsp/stm32/stm32f103-atk-warshipv3/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32f103-atk-warshipv3/SConstruct b/bsp/stm32/stm32f103-atk-warshipv3/SConstruct new file mode 100644 index 0000000000..05326b2b75 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/SConstruct @@ -0,0 +1,58 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32F1xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32f103-atk-warshipv3/applications/SConscript b/bsp/stm32/stm32f103-atk-warshipv3/applications/SConscript new file mode 100644 index 0000000000..ef1c39fd83 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd, ] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c new file mode 100644 index 0000000000..ab323bcb8c --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-08 obito0 first version + */ + +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED0 pin: PB5 */ +#define LED0_PIN GET_PIN(B, 5) +/* defined the LED0 pin: PE5 */ +#define LED1_PIN GET_PIN(E, 5) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + /* set LED1 pin mode to output */ + rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_pin_write(LED1_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_pin_write(LED1_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..bab08a26bd --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/.mxproject @@ -0,0 +1,13 @@ +[PreviousGenFiles] +HeaderPath=G:/Wondfo/RT-Thread/Official information/rt-thread-master/bsp/1stm32/stm32f103-atk-warshipV3/board/CubeMX_Config/Inc +HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; +SourcePath=G:/Wondfo/RT-Thread/Official information/rt-thread-master/bsp/1stm32/stm32f103-atk-warshipV3/board/CubeMX_Config/Src +SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null; +HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc; + diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..0482a4927a --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,116 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +KeepUserPlacement=false +Mcu.Family=STM32F1 +Mcu.IP0=NVIC +Mcu.IP1=RCC +Mcu.IP2=SYS +Mcu.IP3=USART1 +Mcu.IPNb=4 +Mcu.Name=STM32F103Z(C-D-E)Tx +Mcu.Package=LQFP144 +Mcu.Pin0=PC14-OSC32_IN +Mcu.Pin1=PC15-OSC32_OUT +Mcu.Pin2=OSC_IN +Mcu.Pin3=OSC_OUT +Mcu.Pin4=PA9 +Mcu.Pin5=PA10 +Mcu.Pin6=VP_SYS_VS_ND +Mcu.Pin7=VP_SYS_VS_Systick +Mcu.PinsNb=8 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F103ZETx +MxCube.Version=5.1.0 +MxDb.Version=DB.5.0.10 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +OSC_IN.Mode=HSE-External-Oscillator +OSC_IN.Signal=RCC_OSC_IN +OSC_OUT.Mode=HSE-External-Oscillator +OSC_OUT.Signal=RCC_OSC_OUT +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PCC.Checker=false +PCC.Line=STM32F103 +PCC.MCU=STM32F103Z(C-D-E)Tx +PCC.PartNumber=STM32F103ZETx +PCC.Seq0=0 +PCC.Series=STM32F1 +PCC.Temperature=25 +PCC.Vdd=3.3 +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32F103ZETx +ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.7.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true +RCC.ADCFreqValue=36000000 +RCC.AHBFreq_Value=72000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV2 +RCC.APB1Freq_Value=36000000 +RCC.APB1TimFreq_Value=72000000 +RCC.APB2Freq_Value=72000000 +RCC.APB2TimFreq_Value=72000000 +RCC.FCLKCortexFreq_Value=72000000 +RCC.FSMCFreq_Value=72000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=72000000 +RCC.I2S2Freq_Value=72000000 +RCC.I2S3Freq_Value=72000000 +RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FSMCFreq_Value,FamilyName,HCLKFreq_Value,I2S2Freq_Value,I2S3Freq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SDIOFreq_Value,SDIOHCLKDiv2FreqValue,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value +RCC.MCOFreq_Value=72000000 +RCC.PLLCLKFreq_Value=72000000 +RCC.PLLMCOFreq_Value=36000000 +RCC.PLLMUL=RCC_PLL_MUL9 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.SDIOFreq_Value=72000000 +RCC.SDIOHCLKDiv2FreqValue=36000000 +RCC.SYSCLKFreq_VALUE=72000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.TimSysFreq_Value=72000000 +RCC.USBFreq_Value=72000000 +RCC.VCOOutput2Freq_Value=8000000 +USART1.IPParameters=VirtualMode +USART1.VirtualMode=VM_ASYNC +VP_SYS_VS_ND.Mode=No_Debug +VP_SYS_VS_ND.Signal=SYS_VS_ND +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=custom diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..75cb6f9a15 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,71 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h new file mode 100644 index 0000000000..9ab2b09148 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h @@ -0,0 +1,370 @@ +/** + ****************************************************************************** + * @file stm32f1xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_HAL_CONF_H +#define __STM32F1xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_CEC_MODULE_ENABLED */ +/*#define HAL_CORTEX_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DMA_MODULE_ENABLED */ +/*#define HAL_ETH_MODULE_ENABLED */ +/*#define HAL_FLASH_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_PCCARD_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_PWR_MODULE_ENABLED */ +/*#define HAL_RCC_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_SDRAM_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ + +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0 +#define PREFETCH_ENABLE 1 + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2 +#define MAC_ADDR1 0 +#define MAC_ADDR2 0 +#define MAC_ADDR3 0 +#define MAC_ADDR4 0 +#define MAC_ADDR5 0 + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FF) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) + +#define PHY_READ_TO ((uint32_t)0x0000FFFF) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f1xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f1xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f1xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f1xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f1xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f1xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f1xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f1xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f1xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f1xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f1xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f1xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f1xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f1xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f1xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f1xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f1xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f1xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f1xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f1xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f1xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f1xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f1xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f1xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f1xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f1xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f1xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f1xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f1xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f1xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f1xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f1xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_it.h b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_it.h new file mode 100644 index 0000000000..101d8aa728 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Inc/stm32f1xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f1xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_IT_H +#define __STM32F1xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..c183908d36 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/main.c @@ -0,0 +1,225 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +UART_HandleTypeDef huart1; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART1_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART1_UART_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c new file mode 100644 index 0000000000..bd70146cfe --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c @@ -0,0 +1,156 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32f1xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_AFIO_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /** DISABLE: JTAG-DP Disabled and SW-DP Disabled + */ + __HAL_AFIO_REMAP_SWJ_DISABLE(); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_it.c b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_it.c new file mode 100644 index 0000000000..6a95ce4bae --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/stm32f1xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32f1xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M3 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F1xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f1xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/system_stm32f1xx.c b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/system_stm32f1xx.c new file mode 100644 index 0000000000..af3759a3b6 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/Src/system_stm32f1xx.c @@ -0,0 +1,448 @@ +/** + ****************************************************************************** + * @file system_stm32f1xx.c + * @author MCD Application Team + * @version V4.2.0 + * @date 31-March-2017 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on + * the product used), refer to "HSE_VALUE". + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f1xx_system + * @{ + */ + +/** @addtogroup STM32F1xx_System_Private_Includes + * @{ + */ + +#include "stm32f1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Defines + * @{ + */ + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSI_VALUE */ + +/*!< Uncomment the following line if you need to use external SRAM */ +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#if defined(STM32F100xB) ||defined(STM32F100xE) + uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */ +#endif + +const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= 0x00000001U; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#if !defined(STM32F105xC) && !defined(STM32F107xC) + RCC->CFGR &= 0xF8FF0000U; +#else + RCC->CFGR &= 0xF0FF0000U; +#endif /* STM32F105xC */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= 0xFEF6FFFFU; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= 0xFF80FFFFU; + +#if defined(STM32F105xC) || defined(STM32F107xC) + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEBFFFFFFU; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#elif defined(STM32F100xB) || defined(STM32F100xE) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; + +#if defined(STM32F105xC) || defined(STM32F107xC) + uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xB) || defined(STM32F100xE) + uint32_t prediv1factor = 0U; +#endif /* STM32F100xB or STM32F100xE */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00U: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04U: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08U: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#if !defined(STM32F105xC) && !defined(STM32F107xC) + pllmull = ( pllmull >> 18U) + 2U; + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + { + #if defined(STM32F100xB) || defined(STM32F100xE) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18U; + + if (pllmull != 0x0DU) + { + pllmull += 2U; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13U / 2U; + } + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + + if (prediv1source == 0U) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F105xC */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/** + * @brief Setup the external memory controller. Called in startup_stm32f1xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f1xx_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmpreg; + /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); + + (void)(tmpreg); + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BBU; + GPIOD->CRH = 0xBBBBBBBBU; + + GPIOE->CRL = 0xB44444BBU; + GPIOE->CRH = 0xBBBBBBBBU; + + GPIOF->CRL = 0x44BBBBBBU; + GPIOF->CRH = 0xBBBB4444U; + + GPIOG->CRL = 0x44BBBBBBU; + GPIOG->CRH = 0x444B4B44U; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4U] = 0x00001091U; + FSMC_Bank1->BTCR[5U] = 0x00110212U; +} +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig new file mode 100644 index 0000000000..c5b7ccfd37 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig @@ -0,0 +1,198 @@ +menu "Hardware Drivers Config" + +config SOC_STM32F103ZE + bool + select SOC_SERIES_STM32F1 + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_USB_TO_USART + bool "Enable USB TO USART (uart1)" + select BSP_USING_UART + select BSP_USING_UART1 + default y + + config BSP_USING_EEPROM + bool "Enable I2C EEPROM (i2c1)" + select BSP_USING_I2C1 + default n + + config BSP_USING_SPI_FLASH + bool "Enable SPI FLASH (W25Q16 spi2)" + select BSP_USING_SPI + select BSP_USING_SPI2 + select RT_USING_SFUD + select RT_SFUD_USING_SFDP + default n + + config BSP_USING_POT + bool "Enable potentiometer" + select BSP_USING_ADC + select BSP_USING_ADC1 + default n + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART2 + bool "Enable UART2" + default n + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART3 + bool "Enable UART3" + default n + + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + endif + + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + config BSP_USING_TIM2 + bool "Enable TIM2" + default n + + config BSP_USING_TIM3 + bool "Enable TIM3" + default n + + config BSP_USING_TIM4 + bool "Enable TIM4" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable pwm" + default n + select RT_USING_PWM + if BSP_USING_PWM + menuconfig BSP_USING_PWM3 + bool "Enable timer3 output pwm" + default n + if BSP_USING_PWM3 + config BSP_USING_PWM3_CH1 + bool "Enable PWM3 channel1" + default n + + config BSP_USING_PWM3_CH2 + bool "Enable PWM3 channel2" + default n + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + + config BSP_USING_SPI2 + bool "Enable SPI2 BUS" + default n + + config BSP_SPI2_TX_USING_DMA + bool "Enable SPI2 TX DMA" + depends on BSP_USING_SPI2 + default n + + config BSP_SPI2_RX_USING_DMA + bool "Enable SPI2 RX DMA" + depends on BSP_USING_SPI2 + select BSP_SPI2_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 0 63 + default 22 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 0 63 + default 23 + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + config BSP_USING_ONCHIP_RTC + bool "Enable RTC" + select RT_USING_RTC + select RT_USING_LIBC + default n + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript b/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript new file mode 100644 index 0000000000..0f7ccb024c --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/SConscript @@ -0,0 +1,35 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32f1xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xe.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xe.s'] + +# STM32F100xB || STM32F100xE || STM32F101x6 +# STM32F101xB || STM32F101xE || STM32F101xG +# STM32F102x6 || STM32F102xB || STM32F103x6 +# STM32F103xB || STM32F103xE || STM32F103xG +# STM32F105xC || STM32F107xC) +# You can select chips from the list above +CPPDEFINES = ['STM32F103xE'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) +Return('group') diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/board.c b/bsp/stm32/stm32f103-atk-warshipv3/board/board.c new file mode 100644 index 0000000000..17bfd29f27 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/board.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/board.h b/bsp/stm32/stm32f103-atk-warshipv3/board/board.h new file mode 100644 index 0000000000..d106345785 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-5 SummerGift first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include <rtthread.h> +#include <stm32f1xx.h> +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (512 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/ +#define STM32_SRAM_SIZE 64 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOARD_H__ */ diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.icf b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.icf new file mode 100644 index 0000000000..c61b82bd39 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.icf @@ -0,0 +1,28 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__ = 0x0000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, last block CSTACK};
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.lds b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.lds new file mode 100644 index 0000000000..52ffe5e459 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.lds @@ -0,0 +1,143 @@ +/* + * linker script for STM32F10x with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 64K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.sct b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.sct new file mode 100644 index 0000000000..0835abf43e --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00080000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00010000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/figures/board.jpg b/bsp/stm32/stm32f103-atk-warshipv3/figures/board.jpg Binary files differnew file mode 100644 index 0000000000..bc52294717 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/figures/board.jpg diff --git a/bsp/stm32/stm32f103-atk-warshipv3/project.ewd b/bsp/stm32/stm32f103-atk-warshipv3/project.ewd new file mode 100644 index 0000000000..5c652a809d --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/project.ewd @@ -0,0 +1,2834 @@ +<?xml version="1.0" encoding="UTF-8"?> +<project> + <fileVersion>3</fileVersion> + <configuration> + <name>rt-thread</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>29</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F103RB.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>0</state> + </option> + <option> + <name>OCProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxB.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + <option> + <name>OCDebuggerExtraOption</name> + <state>1</state> + </option> + <option> + <name>OCAllMTBOptions</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreNrOfCores</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreMaster</name> + <state>0</state> + </option> + <option> + <name>OCMulticorePort</name> + <state>53461</state> + </option> + <option> + <name>OCMulticoreWorkspace</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveProject</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveConfiguration</name> + <state></state> + </option> + <option> + <name>OCDownloadExtraImage</name> + <state>1</state> + </option> + <option> + <name>OCAttachSlave</name> + <state>0</state> + </option> + <option> + <name>MassEraseBeforeFlashing</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>CADI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCadiMemory</name> + <state>1</state> + </option> + <option> + <name>Fast Model</name> + <state></state> + </option> + <option> + <name>CCADILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CCADILogFileEditB</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>CMSISDAP_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>4</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>CMSISDAPResetList</name> + <version>1</version> + <state>10</state> + </option> + <option> + <name>CMSISDAPHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>CMSISDAPHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>CMSISDAPDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CMSISDAPInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CMSISDAPBreakpointRadio</name> + <state>0</state> + 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<state>0</state> + </option> + <option> + <name>CCCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkScriptFile</name> + <state>1</state> + </option> + <option> + <name>CCJLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCTcpIpAlt</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJLinkTcpIpSerialNo</name> + <state></state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>OCJLinkTraceSource</name> + <state>0</state> + </option> + <option> + <name>OCJLinkTraceSourceDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkDeviceName</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>PEMICRO_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCJPEMicroShowSettings</name> + <state>0</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + </data> + </settings> + <settings> + <name>STLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>4</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkResetList</name> + <version>3</version> + <state>0</state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCSTLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkUpdateBreakpoints</name> + <state>_call_main</state> + </option> + <option> + <name>CCSTLinkCatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchDummy</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCSTLinkUsbSerialNoSelect</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCSTLinkDAPNumber</name> + <state></state> + </option> + <option> + <name>CCSTLinkDebugAccessPortRadio</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>THIRDPARTY_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>CThirdPartyDriverDll</name> + <state>###Uninitialized###</state> + </option> + <option> + <name>CThirdPartyLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CThirdPartyLogFileEditB</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>TIFET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetResetList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCMSPFetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetTargetVccTypeDefault</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetTargetVoltage</name> + <state>###Uninitialized###</state> + </option> + <option> + <name>CCMSPFetVCCDefault</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetTargetSettlingtime</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetRadioJtagSpeedType</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetConnection</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCMSPFetUsbComPort</name> + <state>Automatic</state> + </option> + <option> + <name>CCMSPFetAllowAccessToBSL</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCMSPFetRadioEraseFlash</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>XDS100_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>6</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TIPackageOverride</name> + <state>0</state> + </option> + <option> + <name>TIPackage</name> + <state></state> + </option> + <option> + <name>BoardFile</name> + <state></state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCXds100BreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCXds100DoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCXds100UpdateBreakpoints</name> + <state>_call_main</state> + </option> + <option> + <name>CCXds100CatchReset</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchData</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchDummy</name> + <state>0</state> + </option> + <option> + <name>CCXds100CpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCXds100SwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCXds100SwoClockEdit</name> + <state>1000</state> + </option> + <option> + <name>CCXds100HWResetDelay</name> + <state>0</state> + </option> + <option> + <name>CCXds100ResetList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCXds100UsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCXds100UsbSerialNoSelect</name> + <state>0</state> + </option> + <option> + <name>CCXds100JtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCXds100InterfaceRadio</name> + <state>2</state> + </option> + <option> + <name>CCXds100InterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCXds100ProbeList</name> + <version>0</version> + <state>2</state> + </option> + <option> + <name>CCXds100SWOPortRadio</name> + <state>0</state> + </option> + <option> + <name>CCXds100SWOPort</name> + <state>1</state> + </option> + </data> + </settings> + <debuggerPlugins> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/project.ewp b/bsp/stm32/stm32f103-atk-warshipv3/project.ewp new file mode 100644 index 0000000000..c60653bb3d --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/project.ewp @@ -0,0 +1,2252 @@ +<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state />
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state />
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state />
+ <state>STM32F103xE</state>
+ <state>USE_HAL_DRIVER</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state />
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>00000000</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
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+ <name>IProcessor</name>
+ <state>1</state>
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+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
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+ <option>
+ <name>IExtraOptions</name>
+ <state />
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
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+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
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+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
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+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
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+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
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+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state />
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state />
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3</state>
+ <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Include</state>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\applications</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
+ <state>$PROJ_DIR$\board</state>
+ <state>$PROJ_DIR$\board\CubeMX_Config\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
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+ <name>CCCodeSection</name>
+ <state>.text</state>
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+ <name>IProcessorMode2</name>
+ <state>1</state>
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+ <name>CCOptLevel</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
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+ <name>CCOptLevelSlave</name>
+ <state>1</state>
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+ <version>0</version>
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+ <name>CCPosIndRwpi</name>
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+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
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+ <option>
+ <name>IccLang</name>
+ <state>0</state>
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+ <name>IccCDialect</name>
+ <state>1</state>
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+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
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+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
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+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
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+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
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+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
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+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
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+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state />
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state />
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state />
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state />
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
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+ <option>
+ <name>AListing</name>
+ <state>1</state>
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+ <name>Includes</name>
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+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
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+ <option>
+ <name>MacExps</name>
+ <state>1</state>
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+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
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+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
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+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
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+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
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+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state />
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state />
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>../../../rtthread.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions />
+ <cmdline />
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild />
+ <postbuild />
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>project.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state />
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state />
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state />
+ </option>
+ <option>
+ <name>Output description</name>
+ <state />
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state />
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
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+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state />
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
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+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3</state>
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+ <name>AWarnOne</name>
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+ <name>AltRegisterNames</name>
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+ <name>AsmNoLiteralPool</name>
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+ <version>1</version>
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+ <name>OOCCommandLineProducer</name>
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+ <name>OOCObjCopyEnable</name>
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+ <version>20</version>
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+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
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+ <name>XLinkMisraHandler</name>
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+ <state>0</state>
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+ <name>IlinkOutputFile</name>
+ <state>###Unitialized###</state>
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+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
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+ <name>IlinkKeepSymbols</name>
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+ <name>IlinkRawBinaryFile</name>
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+ <name>IlinkRawBinarySymbol</name>
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+ <name>IlinkRawBinarySegment</name>
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+ <name>IlinkLogFile</name>
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+ <name>IlinkLogInitialization</name>
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+ <name>IlinkLogModule</name>
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+ <name>IlinkLogSection</name>
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+ <name>IlinkLogVeneer</name>
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+ <name>IlinkTreatAsRem</name>
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+ <state>1</state>
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+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
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+ <name>IlinkAdditionalLibs</name>
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+ <state>1</state>
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+ <name>IlinkEncInput</name>
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+ <name>IlinkEncOutput</name>
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+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
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+ <name>IlinkHeapSelect</name>
+ <state>1</state>
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+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
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+ <name>IARCHIVE</name>
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+ <file>
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+ <name>$PROJ_DIR$\..\..\..\src\device.c</name>
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+ <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
+ </file>
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+ <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+ </file>
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+ <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\object.c</name>
+ </file>
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+ <name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\signal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\thread.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Applications</name>
+ <file>
+ <name>$PROJ_DIR$\applications\main.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Drivers</name>
+ <file>
+ <name>$PROJ_DIR$\board\board.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\board\CubeMX_Config\Src\stm32f1xx_hal_msp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\iar\startup_stm32f103xe.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c</name>
+ </file>
+ </group>
+ <group>
+ <name>cpu</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
+ </file>
+ </group>
+ <group>
+ <name>DeviceDrivers</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\completion.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\pipe.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
+ </file>
+ </group>
+ <group>
+ <name>finsh</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\symbol.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh_cmd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh_file.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32_HAL</name>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_crc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_usart.c</name>
+ </file>
+ </group>
+</project>
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/project.eww b/bsp/stm32/stm32f103-atk-warshipv3/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/project.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\project.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
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<CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + 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<Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_HAL_DRIVER, STM32F103xE</Define> + <Undefine></Undefine> + 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<FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_cec.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_sram.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/project.uvprojx b/bsp/stm32/stm32f103-atk-warshipv3/project.uvprojx new file mode 100644 index 0000000000..d599b56a58 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/project.uvprojx @@ -0,0 +1,727 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103ZE</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32F1xx_DFP.1.0.5</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IROM(0x08000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000 -FP0($$Device:STM32F103ZE$Flash\STM32F10x_512.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:STM32F103ZE$Device\Include\stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:STM32F103ZE$SVD\STM32F103xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>1</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>11</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_HAL_DRIVER, STM32F103xE</Define> + <Undefine></Undefine> + <IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Include;..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Inc;..\libraries\STM32F1xx_HAL\CMSIS\Include</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>cpu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\cpu.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>signal.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\signal.c</FilePath> + </File> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_msp.c</FileName> + <FileType>1</FileType> + <FilePath>board\CubeMX_Config\Src\stm32f1xx_hal_msp.c</FilePath> + </File> + <File> + <FileName>startup_stm32f103xe.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\arm\startup_stm32f103xe.s</FilePath> + </File> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath> + </File> + <File> + <FileName>drv_common.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>cpu</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>symbol.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\symbol.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>msh_cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath> + </File> + <File> + <FileName>msh_file.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_file.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>STM32_HAL</GroupName> + <Files> + <File> + <FileName>system_stm32f1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_cortex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_crc.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_rcc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_rcc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_cec.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_sram.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.h b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.h new file mode 100644 index 0000000000..35b723cabf --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.h @@ -0,0 +1,174 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDEL_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40001 +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M3 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using WiFi */ + + +/* Using USB */ + + +/* POSIX layer and C standard library */ + + +/* Network */ + +/* Socket abstraction layer */ + + +/* light weight TCP/IP stack */ + + +/* Modbus master and slave stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* ARM CMSIS */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32F1 + +/* Hardware Drivers Config */ + +#define SOC_STM32F103ZE + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 +#define BSP_UART1_RX_USING_DMA + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py new file mode 100644 index 0000000000..40826ac99e --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/rtconfig.py @@ -0,0 +1,134 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m3' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -std=c99 -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M3 ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M3' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M3' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.ewp b/bsp/stm32/stm32f103-atk-warshipv3/template.ewp new file mode 100644 index 0000000000..3280a547c0 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.ewp @@ -0,0 +1,2032 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>00000000</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>../../../rtthread.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>project.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>11111110</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>###Unitialized###</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>lnk0t.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+</project>
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.eww b/bsp/stm32/stm32f103-atk-warshipv3/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\template.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.uvopt b/bsp/stm32/stm32f103-atk-warshipv3/template.uvopt new file mode 100644 index 0000000000..7946319ef9 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.uvopt @@ -0,0 +1,162 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>0</tPdscDbg> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + +</ProjectOpt> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.uvoptx b/bsp/stm32/stm32f103-atk-warshipv3/template.uvoptx new file mode 100644 index 0000000000..4e19fe2a03 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.uvoptx @@ -0,0 +1,204 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>18</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Base Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-base-board-schematics.pdf</Path> + </Book> + <Book> + <Number>1</Number> + <Title>Display Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-display-board-schematics.pdf</Path> + </Book> + <Book> + <Number>2</Number> + <Title>User Manual (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e.chm</Path> + </Book> + <Book> + <Number>3</Number> + <Title>MCBSTM32E Evaluation Board Web Page (MCBSTM32E)</Title> + <Path>http://www.keil.com/mcbstm32e/</Path> + </Book> + </Books> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>11</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>ST-LINKIII-KEIL_SWO</Key> + <Name>-U -I0 -O206 -S1 -C0 -A0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F103ZE$Flash\STM32F10x_512.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN0</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F10x_512 -FL080000 -FS08000000 -FP0($$Device:STM32F103ZE$Flash\STM32F10x_512.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <DebugDescription> + <Enable>1</Enable> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> + </TargetOption> + </Target> + + <Group> + <GroupName>Source Group 1</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.uvproj b/bsp/stm32/stm32f103-atk-warshipv3/template.uvproj new file mode 100644 index 0000000000..99e58d3b30 --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.uvproj @@ -0,0 +1,407 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103RB</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32F10x\startup_stm32f10x_md.s" ("STM32 Medium Density Line Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</FlashDriverDll> + <DeviceId>4231</DeviceId> + <RegisterFile>stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\ST\STM32F1xx\STM32F103xx.sfr</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103RB</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + <UsePdscDebugDescription>0</UsePdscDebugDescription> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>6</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-atk-warshipv3/template.uvprojx b/bsp/stm32/stm32f103-atk-warshipv3/template.uvprojx new file mode 100644 index 0000000000..a38f7ba84e --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/template.uvprojx @@ -0,0 +1,415 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103ZE</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32F1xx_DFP.1.0.5</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IROM(0x08000000,0x80000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000 -FP0($$Device:STM32F103ZE$Flash\STM32F10x_512.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:STM32F103ZE$Device\Include\stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:STM32F103ZE$SVD\STM32F103xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>1</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>11</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Source Group 1</GroupName> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-dofly-lyc8/.config b/bsp/stm32/stm32f103-dofly-lyc8/.config index 7f97f2603f..959d611b80 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/.config +++ b/bsp/stm32/stm32f103-dofly-lyc8/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.h b/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.h index 92eee96813..92e59c0759 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.h +++ b/bsp/stm32/stm32f103-dofly-lyc8/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f103-fire-arbitrary/.config b/bsp/stm32/stm32f103-fire-arbitrary/.config index 0938feaf7e..9674152dba 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/.config +++ b/bsp/stm32/stm32f103-fire-arbitrary/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c index 16c7a9e454..45c8a6d74d 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c @@ -16,10 +16,7 @@ #include <dfs_fs.h> #include <dfs_posix.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.h b/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.h index 5a2ac1c53c..4f5b34280a 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.h +++ b/bsp/stm32/stm32f103-fire-arbitrary/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f103-hw100k-ibox/.config b/bsp/stm32/stm32f103-hw100k-ibox/.config index d13b95269e..e7e202aecb 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/.config +++ b/bsp/stm32/stm32f103-hw100k-ibox/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.h b/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.h index 9d4e2e9fed..6ea22eea76 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.h +++ b/bsp/stm32/stm32f103-hw100k-ibox/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -38,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x40000 +#define RT_VER_NUM 0x40001 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M3 diff --git a/bsp/stm32/stm32f103-mini-system/.config b/bsp/stm32/stm32f103-mini-system/.config new file mode 100644 index 0000000000..3a7b03410b --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/.config @@ -0,0 +1,349 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +CONFIG_RT_VER_NUM=0x40001 +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M3=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set + +# +# Using WiFi +# +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# Modbus master and slave stack +# +# CONFIG_RT_USING_MODBUS is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# ARM CMSIS +# +# CONFIG_RT_USING_CMSIS_OS is not set +# CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32F1=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32F103C8=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART1=y +CONFIG_BSP_UART1_RX_USING_DMA=y + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32f103-mini-system/.gitignore b/bsp/stm32/stm32f103-mini-system/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32f103-mini-system/Kconfig b/bsp/stm32/stm32f103-mini-system/Kconfig new file mode 100644 index 0000000000..7a400db91f --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/Kconfig @@ -0,0 +1,22 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" + diff --git a/bsp/stm32/stm32f103-mini-system/README.md b/bsp/stm32/stm32f103-mini-system/README.md new file mode 100644 index 0000000000..ee163c4beb --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/README.md @@ -0,0 +1,110 @@ +# STM32F103C8T6最小系统板 BSP 说明 + +## 简介 + +本文档为 STM32F103C8T6最小系统板 的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +STM32F103C8T6最小系统，采用SWD调试接口，可以用3个接口就能完成调试下载的任务，采用了官方建议的负载RTC晶振方案，小体积高频率的STM32实验板 + +开发板外观如下图所示： + + + +该开发板常用 **板载资源** 如下： + +- MCU：STM32F103C8T6，主频 72MHz，64KB FLASH ，20KB RAM +- 外部 RAM：无 +- 外部 FLASH：无 +- 常用外设 + - LED：1个，DS0（黄色，PC13） +- 常用接口：无 +- 调试接口，SWD调试接口 + +开发板更多详细信息请参考[STM32F103C8T6最小系统板介绍] + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 黄色LED | 支持 | PC13 | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...47 | +| UART | 支持 | UART1 | +| **扩展模块** | **支持情况** | **备注** | +| | | | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 J-Link 仿真器下载程序，在通过 J-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.1 build Mar 10 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1 的功能，如果需使用 ADC、PWM等更多高级功能，再用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 只能用USB转TTL连接PC机 ; + +## 联系人信息 + +维护人: + +- [obito0](https://github.com/obito0), 邮箱：<[email protected]>
\ No newline at end of file diff --git a/bsp/stm32/stm32f103-mini-system/SConscript b/bsp/stm32/stm32f103-mini-system/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32f103-mini-system/SConstruct b/bsp/stm32/stm32f103-mini-system/SConstruct new file mode 100644 index 0000000000..05326b2b75 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/SConstruct @@ -0,0 +1,58 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32F1xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32f103-mini-system/applications/SConscript b/bsp/stm32/stm32f103-mini-system/applications/SConscript new file mode 100644 index 0000000000..ef1c39fd83 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/applications/SConscript @@ -0,0 +1,11 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd, ] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32f103-mini-system/applications/main.c b/bsp/stm32/stm32f103-mini-system/applications/main.c new file mode 100644 index 0000000000..c5fa5a5958 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/applications/main.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-08 obito0 first version + */ + +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED0 pin: PC13 */ +#define LED0_PIN GET_PIN(C, 13) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..1611c38e50 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/.mxproject @@ -0,0 +1,13 @@ +[PreviousGenFiles] +HeaderPath=G:/Wondfo/RT-Thread/rt-thread-master1/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc +HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; +SourcePath=G:/Wondfo/RT-Thread/rt-thread-master1/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src +SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null; +HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc; + diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..288a72c7d2 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,138 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,master,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag +ADC1.NbrOfConversionFlag=1 +ADC1.Rank-0\#ChannelRegularConversion=1 +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 +ADC1.master=1 +File.Version=6 +KeepUserPlacement=false +Mcu.Family=STM32F1 +Mcu.IP0=ADC1 +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SPI1 +Mcu.IP4=SYS +Mcu.IP5=USART1 +Mcu.IPNb=6 +Mcu.Name=STM32F103C(8-B)Tx +Mcu.Package=LQFP48 +Mcu.Pin0=PC14-OSC32_IN +Mcu.Pin1=PC15-OSC32_OUT +Mcu.Pin10=VP_SYS_VS_ND +Mcu.Pin11=VP_SYS_VS_Systick +Mcu.Pin2=PD0-OSC_IN +Mcu.Pin3=PD1-OSC_OUT +Mcu.Pin4=PA1 +Mcu.Pin5=PA5 +Mcu.Pin6=PA6 +Mcu.Pin7=PA7 +Mcu.Pin8=PA9 +Mcu.Pin9=PA10 +Mcu.PinsNb=12 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F103C8Tx +MxCube.Version=5.1.0 +MxDb.Version=DB.5.0.10 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +PA1.Signal=ADCx_IN1 +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PCC.Checker=false +PCC.Line=STM32F103 +PCC.MCU=STM32F103C(8-B)Tx +PCC.PartNumber=STM32F103C8Tx +PCC.Seq0=0 +PCC.Series=STM32F1 +PCC.Temperature=25 +PCC.Vdd=3.3 +PD0-OSC_IN.Mode=HSE-External-Oscillator +PD0-OSC_IN.Signal=RCC_OSC_IN +PD1-OSC_OUT.Mode=HSE-External-Oscillator +PD1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32F103C8Tx +ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.7.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true +RCC.ADCFreqValue=36000000 +RCC.AHBFreq_Value=72000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV2 +RCC.APB1Freq_Value=36000000 +RCC.APB1TimFreq_Value=72000000 +RCC.APB2Freq_Value=72000000 +RCC.APB2TimFreq_Value=72000000 +RCC.FCLKCortexFreq_Value=72000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=72000000 +RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value +RCC.MCOFreq_Value=72000000 +RCC.PLLCLKFreq_Value=72000000 +RCC.PLLMCOFreq_Value=36000000 +RCC.PLLMUL=RCC_PLL_MUL9 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.SYSCLKFreq_VALUE=72000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.TimSysFreq_Value=72000000 +RCC.USBFreq_Value=72000000 +RCC.VCOOutput2Freq_Value=8000000 +SH.ADCx_IN1.0=ADC1_IN1,IN1 +SH.ADCx_IN1.ConfNb=1 +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8 +SPI1.CalculateBaudRate=9.0 MBits/s +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER +USART1.IPParameters=VirtualMode +USART1.VirtualMode=VM_ASYNC +VP_SYS_VS_ND.Mode=No_Debug +VP_SYS_VS_ND.Signal=SYS_VS_ND +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=custom diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..75cb6f9a15 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,71 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h new file mode 100644 index 0000000000..467a07d1ca --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_hal_conf.h @@ -0,0 +1,370 @@ +/** + ****************************************************************************** + * @file stm32f1xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_HAL_CONF_H +#define __STM32F1xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_CEC_MODULE_ENABLED */ +/*#define HAL_CORTEX_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DMA_MODULE_ENABLED */ +/*#define HAL_ETH_MODULE_ENABLED */ +/*#define HAL_FLASH_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_PCCARD_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_PWR_MODULE_ENABLED */ +/*#define HAL_RCC_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_SDRAM_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ + +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0 +#define PREFETCH_ENABLE 1 + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2 +#define MAC_ADDR1 0 +#define MAC_ADDR2 0 +#define MAC_ADDR3 0 +#define MAC_ADDR4 0 +#define MAC_ADDR5 0 + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FF) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) + +#define PHY_READ_TO ((uint32_t)0x0000FFFF) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f1xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f1xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f1xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f1xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f1xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f1xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f1xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f1xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f1xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f1xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f1xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f1xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f1xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f1xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f1xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f1xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f1xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f1xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f1xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f1xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f1xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f1xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f1xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f1xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f1xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f1xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f1xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f1xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f1xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f1xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f1xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f1xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_it.h b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_it.h new file mode 100644 index 0000000000..101d8aa728 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Inc/stm32f1xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f1xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_IT_H +#define __STM32F1xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..c63ff28eda --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/main.c @@ -0,0 +1,324 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc1; + +SPI_HandleTypeDef hspi1; + +UART_HandleTypeDef huart1; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART1_UART_Init(void); +static void MX_ADC1_Init(void); +static void MX_SPI1_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART1_UART_Init(); + MX_ADC1_Init(); + MX_SPI1_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; + PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief ADC1 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC1_Init(void) +{ + + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + /** Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc1.Init.NbrOfConversion = 1; + if (HAL_ADC_Init(&hadc1) != HAL_OK) + { + Error_Handler(); + } + /** Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_1; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ + +} + +/** + * @brief SPI1 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI1_Init(void) +{ + + /* USER CODE BEGIN SPI1_Init 0 */ + + /* USER CODE END SPI1_Init 0 */ + + /* USER CODE BEGIN SPI1_Init 1 */ + + /* USER CODE END SPI1_Init 1 */ + /* SPI1 parameter configuration*/ + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_8BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 10; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI1_Init 2 */ + + /* USER CODE END SPI1_Init 2 */ + +} + +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c new file mode 100644 index 0000000000..f059b654f9 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_hal_msp.c @@ -0,0 +1,286 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32f1xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_AFIO_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /** DISABLE: JTAG-DP Disabled and SW-DP Disabled + */ + __HAL_AFIO_REMAP_SWJ_DISABLE(); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief ADC MSP Initialization +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ADC1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**ADC1 GPIO Configuration + PA1 ------> ADC1_IN1 + */ + GPIO_InitStruct.Pin = GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + } + +} + +/** +* @brief ADC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspDeInit 0 */ + + /* USER CODE END ADC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ADC1_CLK_DISABLE(); + + /**ADC1 GPIO Configuration + PA1 ------> ADC1_IN1 + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1); + + /* USER CODE BEGIN ADC1_MspDeInit 1 */ + + /* USER CODE END ADC1_MspDeInit 1 */ + } + +} + +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_it.c b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_it.c new file mode 100644 index 0000000000..6a95ce4bae --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/stm32f1xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32f1xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M3 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F1xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f1xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/system_stm32f1xx.c b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/system_stm32f1xx.c new file mode 100644 index 0000000000..af3759a3b6 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/CubeMX_Config/Src/system_stm32f1xx.c @@ -0,0 +1,448 @@ +/** + ****************************************************************************** + * @file system_stm32f1xx.c + * @author MCD Application Team + * @version V4.2.0 + * @date 31-March-2017 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on + * the product used), refer to "HSE_VALUE". + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f1xx_system + * @{ + */ + +/** @addtogroup STM32F1xx_System_Private_Includes + * @{ + */ + +#include "stm32f1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Defines + * @{ + */ + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSI_VALUE */ + +/*!< Uncomment the following line if you need to use external SRAM */ +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#if defined(STM32F100xB) ||defined(STM32F100xE) + uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */ +#endif + +const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= 0x00000001U; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#if !defined(STM32F105xC) && !defined(STM32F107xC) + RCC->CFGR &= 0xF8FF0000U; +#else + RCC->CFGR &= 0xF0FF0000U; +#endif /* STM32F105xC */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= 0xFEF6FFFFU; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= 0xFF80FFFFU; + +#if defined(STM32F105xC) || defined(STM32F107xC) + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEBFFFFFFU; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#elif defined(STM32F100xB) || defined(STM32F100xE) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; + +#if defined(STM32F105xC) || defined(STM32F107xC) + uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xB) || defined(STM32F100xE) + uint32_t prediv1factor = 0U; +#endif /* STM32F100xB or STM32F100xE */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00U: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04U: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08U: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#if !defined(STM32F105xC) && !defined(STM32F107xC) + pllmull = ( pllmull >> 18U) + 2U; + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + { + #if defined(STM32F100xB) || defined(STM32F100xE) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18U; + + if (pllmull != 0x0DU) + { + pllmull += 2U; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13U / 2U; + } + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + + if (prediv1source == 0U) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F105xC */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/** + * @brief Setup the external memory controller. Called in startup_stm32f1xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f1xx_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmpreg; + /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); + + (void)(tmpreg); + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BBU; + GPIOD->CRH = 0xBBBBBBBBU; + + GPIOE->CRL = 0xB44444BBU; + GPIOE->CRH = 0xBBBBBBBBU; + + GPIOF->CRL = 0x44BBBBBBU; + GPIOF->CRH = 0xBBBB4444U; + + GPIOG->CRL = 0x44BBBBBBU; + GPIOG->CRH = 0x444B4B44U; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4U] = 0x00001091U; + FSMC_Bank1->BTCR[5U] = 0x00110212U; +} +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32f103-mini-system/board/Kconfig b/bsp/stm32/stm32f103-mini-system/board/Kconfig new file mode 100644 index 0000000000..320ab50b8a --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/Kconfig @@ -0,0 +1,70 @@ +menu "Hardware Drivers Config" + +config SOC_STM32F103C8 + bool + select SOC_SERIES_STM32F1 + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + + endif + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32f103-mini-system/board/SConscript b/bsp/stm32/stm32f103-mini-system/board/SConscript new file mode 100644 index 0000000000..52d6f012bb --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/SConscript @@ -0,0 +1,35 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32f1xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xB.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xB.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32F1xx_HAL/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xB.s'] + +# STM32F100xB || STM32F100xE || STM32F101x6 +# STM32F101xB || STM32F101xE || STM32F101xG +# STM32F102x6 || STM32F102xB || STM32F103x6 +# STM32F103xB || STM32F103xE || STM32F103xG +# STM32F105xC || STM32F107xC) +# You can select chips from the list above +CPPDEFINES = ['STM32F103xB'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) +Return('group') diff --git a/bsp/stm32/stm32f103-mini-system/board/board.c b/bsp/stm32/stm32f103-mini-system/board/board.c new file mode 100644 index 0000000000..b7ca2b8461 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/board.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-08 obito0 first version + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32f103-mini-system/board/board.h b/bsp/stm32/stm32f103-mini-system/board/board.h new file mode 100644 index 0000000000..a8ee7bfa02 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-5 SummerGift first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include <rtthread.h> +#include <stm32f1xx.h> +#include "drv_common.h" +#include "drv_gpio.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (64 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/ +#define STM32_SRAM_SIZE 20 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __BOARD_H__ */ diff --git a/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.icf b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.icf new file mode 100644 index 0000000000..72eeb0ba65 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.icf @@ -0,0 +1,28 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__ = 0x0000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, last block CSTACK};
diff --git a/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.lds b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.lds new file mode 100644 index 0000000000..f9fdaf17c5 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.lds @@ -0,0 +1,143 @@ +/* + * linker script for STM32F10x with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 20k /* 20K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.sct b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.sct new file mode 100644 index 0000000000..6930ff4b50 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00010000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00010000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00005000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/stm32/stm32f103-mini-system/figures/board1.jpg b/bsp/stm32/stm32f103-mini-system/figures/board1.jpg Binary files differnew file mode 100644 index 0000000000..47c7221cf7 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/figures/board1.jpg diff --git a/bsp/stm32/stm32f103-mini-system/figures/board2.jpg b/bsp/stm32/stm32f103-mini-system/figures/board2.jpg Binary files differnew file mode 100644 index 0000000000..f14ba5689b --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/figures/board2.jpg diff --git a/bsp/stm32/stm32f103-mini-system/figures/board3.jpg b/bsp/stm32/stm32f103-mini-system/figures/board3.jpg Binary files differnew file mode 100644 index 0000000000..ac5bb43f74 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/figures/board3.jpg diff --git a/bsp/stm32/stm32f103-mini-system/project.ewd b/bsp/stm32/stm32f103-mini-system/project.ewd new file mode 100644 index 0000000000..5c652a809d --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.ewd @@ -0,0 +1,2834 @@ +<?xml version="1.0" encoding="UTF-8"?> +<project> + <fileVersion>3</fileVersion> + <configuration> + <name>rt-thread</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>29</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F103RB.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>0</state> + </option> + <option> + <name>OCProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxB.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + <option> + <name>OCDebuggerExtraOption</name> + <state>1</state> + </option> + <option> + <name>OCAllMTBOptions</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreNrOfCores</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreMaster</name> + <state>0</state> + </option> + <option> + <name>OCMulticorePort</name> + <state>53461</state> + </option> + <option> + <name>OCMulticoreWorkspace</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveProject</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveConfiguration</name> + <state></state> + </option> + <option> + <name>OCDownloadExtraImage</name> + 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<name>CCADILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CCADILogFileEditB</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>CMSISDAP_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>4</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>CMSISDAPResetList</name> + <version>1</version> + <state>10</state> + </option> + <option> + <name>CMSISDAPHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>CMSISDAPHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>CMSISDAPDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + 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<state>5</state> + </option> + <option> + <name>CCJLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCCatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCCatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkScriptFile</name> + <state>1</state> + </option> + <option> + <name>CCJLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCTcpIpAlt</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJLinkTcpIpSerialNo</name> + <state></state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>OCJLinkTraceSource</name> + <state>0</state> + </option> + <option> + <name>OCJLinkTraceSourceDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkDeviceName</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>PEMICRO_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCJPEMicroShowSettings</name> + <state>0</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + </data> + </settings> + <settings> + <name>STLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>4</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkResetList</name> + <version>3</version> + <state>0</state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCSTLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkUpdateBreakpoints</name> + <state>_call_main</state> + </option> + <option> + <name>CCSTLinkCatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkCatchDummy</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCSTLinkUsbSerialNoSelect</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCSTLinkDAPNumber</name> + <state></state> + </option> + <option> + <name>CCSTLinkDebugAccessPortRadio</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>THIRDPARTY_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>CThirdPartyDriverDll</name> + <state>###Uninitialized###</state> + </option> + <option> + <name>CThirdPartyLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CThirdPartyLogFileEditB</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>TIFET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetResetList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCMSPFetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetTargetVccTypeDefault</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetTargetVoltage</name> + <state>###Uninitialized###</state> + </option> + <option> + <name>CCMSPFetVCCDefault</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetTargetSettlingtime</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetRadioJtagSpeedType</name> + <state>1</state> + </option> + <option> + <name>CCMSPFetConnection</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCMSPFetUsbComPort</name> + <state>Automatic</state> + </option> + <option> + <name>CCMSPFetAllowAccessToBSL</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCMSPFetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCMSPFetRadioEraseFlash</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>XDS100_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>6</version> + <wantNonLocal>1</wantNonLocal> + <debug>0</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TIPackageOverride</name> + <state>0</state> + </option> + <option> + <name>TIPackage</name> + <state></state> + </option> + <option> + <name>BoardFile</name> + <state></state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCXds100BreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCXds100DoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCXds100UpdateBreakpoints</name> + <state>_call_main</state> + </option> + <option> + <name>CCXds100CatchReset</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchData</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchSFERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCXds100CatchDummy</name> + <state>0</state> + </option> + <option> + <name>CCXds100CpuClockEdit</name> + <state></state> + </option> + <option> + <name>CCXds100SwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCXds100SwoClockEdit</name> + <state>1000</state> + </option> + <option> + <name>CCXds100HWResetDelay</name> + <state>0</state> + </option> + <option> + <name>CCXds100ResetList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCXds100UsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCXds100UsbSerialNoSelect</name> + <state>0</state> + </option> + <option> + <name>CCXds100JtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCXds100InterfaceRadio</name> + <state>2</state> + </option> + <option> + <name>CCXds100InterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCXds100ProbeList</name> + <version>0</version> + <state>2</state> + </option> + <option> + <name>CCXds100SWOPortRadio</name> + <state>0</state> + </option> + <option> + <name>CCXds100SWOPort</name> + <state>1</state> + </option> + </data> + </settings> + <debuggerPlugins> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> diff --git a/bsp/stm32/stm32f103-mini-system/project.ewp b/bsp/stm32/stm32f103-mini-system/project.ewp new file mode 100644 index 0000000000..dc1ff42415 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.ewp @@ -0,0 +1,2252 @@ +<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state />
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state />
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state />
+ <state>STM32F103xB</state>
+ <state>USE_HAL_DRIVER</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state />
+ </option>
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+ <state>Default None</state>
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+ <name>FPU2</name>
+ <version>0</version>
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+ <name>DSPExtension</name>
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+ <name>CCDiagError</name>
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+ <name>CCObjPrefix</name>
+ <state>1</state>
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+ <version>1</version>
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+ <name>CCRequirePrototypes</name>
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+ <name>CCLibConfigHeader</name>
+ <state>1</state>
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+ <name>PreInclude</name>
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+ <name>CompilerMisraOverride</name>
+ <state>0</state>
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+ <option>
+ <name>CCIncludePath2</name>
+ <state />
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3</state>
+ <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Include</state>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\applications</state>
+ <state>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
+ <state>$PROJ_DIR$\board</state>
+ <state>$PROJ_DIR$\board\CubeMX_Config\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers</state>
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+ <state>.text</state>
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+ <state>1</state>
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+ <name>CCOptLevel</name>
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+ <name>CCOptLevelSlave</name>
+ <state>1</state>
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+ <name>IccLang</name>
+ <state>0</state>
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+ <name>IccCDialect</name>
+ <state>1</state>
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+ <name>IccAllowVLA</name>
+ <state>0</state>
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+ <name>IccStaticDestr</name>
+ <state>1</state>
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+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
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+ <name>IccCmsis</name>
+ <state>1</state>
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+ <name>IccFloatSemantics</name>
+ <state>0</state>
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+ <name>CCNoLiteralPool</name>
+ <state>0</state>
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+ <name>CCOptStrategySlave</name>
+ <version>0</version>
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+ <name>CCGuardCalls</name>
+ <state>1</state>
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+ <name>CCEncSource</name>
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+ <name>CCEncOutput</name>
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+ <name>CCEncOutputBom</name>
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+ <name>CCEncInput</name>
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+ <name>IccExceptions2</name>
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+ <name>IccRTTI2</name>
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+ <name>AWarnWhat</name>
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+ <name>AWarnOne</name>
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+ <name>AWarnRange1</name>
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+ <name>ADebug</name>
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+ <name>AltRegisterNames</name>
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+ <name>ADefines</name>
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+ <name>AList</name>
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+ <name>AListing</name>
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+ <name>MacExps</name>
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+ <name>PageLength</name>
+ <state>80</state>
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+ <state>8</state>
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+ <name>AXRefDual</name>
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+ <name>AFpuProcessor</name>
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+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
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+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
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+ <name>AUserIncludes</name>
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+ <name>AExtraOptionsCheckV2</name>
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+ <name>AExtraOptionsV2</name>
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+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
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+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
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+ <version>1</version>
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+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
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+ <option>
+ <name>OCOutputOverride</name>
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+ <name>OOCOutputFile</name>
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+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
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+ <name>OOCObjCopyEnable</name>
+ <state>0</state>
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+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
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+ <extensions />
+ <cmdline />
+ <hasPrio>0</hasPrio>
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+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
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+ <archiveVersion>1</archiveVersion>
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+ <prebuild />
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+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
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+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
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+ <name>XLinkMisraHandler</name>
+ <state>0</state>
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+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkOutputFile</name>
+ <state>###Unitialized###</state>
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+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state />
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+ <option>
+ <name>IlinkRawBinaryFile</name>
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+ <name>IlinkRawBinarySymbol</name>
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+ <name>IlinkRawBinarySegment</name>
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+ <name>IlinkRawBinaryAlign</name>
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+ <name>IlinkDefines</name>
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+ <name>IlinkConfigDefines</name>
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+ <name>IlinkMapFile</name>
+ <state>0</state>
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+ <name>IlinkLogFile</name>
+ <state>0</state>
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+ <name>IlinkLogInitialization</name>
+ <state>0</state>
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+ <name>IlinkLogModule</name>
+ <state>0</state>
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+ <name>IlinkLogSection</name>
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+ <name>IlinkLogVeneer</name>
+ <state>0</state>
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+ <name>IlinkIcfOverride</name>
+ <state>0</state>
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+ <name>IlinkIcfFile</name>
+ <state>lnk0t.icf</state>
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+ <name>IlinkIcfFileSlave</name>
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+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
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+ <name>IlinkSuppressDiags</name>
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+ <name>IlinkTreatAsRem</name>
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+ <name>IlinkTreatAsWarn</name>
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+ <name>IlinkTreatAsErr</name>
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+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
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+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
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+ <name>IlinkExtraOptions</name>
+ <state />
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+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
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+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
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+ <name>IlinkAdditionalLibs</name>
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+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
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+ <name>IlinkProgramEntryLabelSelect</name>
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+ <name>IlinkProgramEntryLabel</name>
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+ <name>DoFill</name>
+ <state>0</state>
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+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <version>0</version>
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+ <name>CrcAlign</name>
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+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <name>CrcCompl</name>
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+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
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+ <name>CrcInitialValue</name>
+ <state>0x0</state>
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+ <name>DoCrc</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
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+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
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+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
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+ <name>CrcFullSize</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
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+ <name>IlinkLogRedirSymbols</name>
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+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
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+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
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+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
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+ <name>IlinkOptInline</name>
+ <state>1</state>
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+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
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+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
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+ <name>IlinkCmsis</name>
+ <state>1</state>
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+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
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+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
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+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
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+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
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+ <name>IlinkStackControlFile</name>
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+ <option>
+ <name>IlinkStackCallGraphFile</name>
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+ <version>1</version>
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+ <name>CrcUnitSize</name>
+ <version>0</version>
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+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
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+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
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+ <name>IlinkIcfFile_AltDefault</name>
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+ <name>IlinkEncInput</name>
+ <state>0</state>
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+ <name>IlinkEncOutput</name>
+ <state>0</state>
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+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
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+ <name>IlinkHeapSelect</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
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+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
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+ <version>0</version>
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+ <name>IarchiveInputs</name>
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+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
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+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
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+ <settings>
+ <name>BILINK</name>
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+ <name>Kernel</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\clock.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\components.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\cpu.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\device.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\mem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\mempool.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\object.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\scheduler.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\signal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\thread.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Applications</name>
+ <file>
+ <name>$PROJ_DIR$\applications\main.c</name>
+ </file>
+ </group>
+ <group>
+ <name>Drivers</name>
+ <file>
+ <name>$PROJ_DIR$\board\board.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\board\CubeMX_Config\Src\stm32f1xx_hal_msp.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\iar\startup_stm32f103xB.s</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c</name>
+ </file>
+ </group>
+ <group>
+ <name>cpu</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\backtrace.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\cpuport.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m3\context_iar.S</name>
+ </file>
+ </group>
+ <group>
+ <name>DeviceDrivers</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\misc\pin.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\completion.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\pipe.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c</name>
+ </file>
+ </group>
+ <group>
+ <name>finsh</name>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\symbol.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh_cmd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\..\components\finsh\msh_file.c</name>
+ </file>
+ </group>
+ <group>
+ <name>STM32_HAL</name>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_crc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_usart.c</name>
+ </file>
+ </group>
+</project>
diff --git a/bsp/stm32/stm32f103-mini-system/project.eww b/bsp/stm32/stm32f103-mini-system/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\project.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/bsp/stm32/stm32f103-mini-system/project.uvopt b/bsp/stm32/stm32f103-mini-system/project.uvopt new file mode 100644 index 0000000000..7946319ef9 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.uvopt @@ -0,0 +1,162 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>0</tPdscDbg> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + +</ProjectOpt> diff --git a/bsp/stm32/stm32f103-mini-system/project.uvoptx b/bsp/stm32/stm32f103-mini-system/project.uvoptx new file mode 100644 index 0000000000..2bcb9b426e --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.uvoptx @@ -0,0 +1,980 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>18</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Base Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-base-board-schematics.pdf</Path> + </Book> + <Book> + <Number>1</Number> + <Title>Display Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-display-board-schematics.pdf</Path> + </Book> + <Book> + <Number>2</Number> + <Title>User Manual (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e.chm</Path> + </Book> + <Book> + <Number>3</Number> + <Title>MCBSTM32E Evaluation Board Web Page (MCBSTM32E)</Title> + <Path>http://www.keil.com/mcbstm32e/</Path> + </Book> + </Books> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>ST-LINKIII-KEIL_SWO</Key> + <Name>-U -I0 -O206 -S1 -C0 -A0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U20160818 -O78 -S2 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F10x_128 -FL020000 -FS08000000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)</Name> + 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file mode 100644 index 0000000000..74e7f46170 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/project.uvprojx @@ -0,0 +1,727 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103C8</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32F1xx_DFP.1.0.5</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x5000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:STM32F103C8$Device\Include\stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:STM32F103C8$SVD\STM32F103xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + 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<Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x10000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define>STM32F103xB, USE_HAL_DRIVER</Define> + <Undefine></Undefine> + <IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m3;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Include;..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Inc;..\libraries\STM32F1xx_HAL\CMSIS\Include</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + <File> + <FileName>cpu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\cpu.c</FilePath> + </File> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + <File> + <FileName>scheduler.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\scheduler.c</FilePath> + </File> + <File> + <FileName>signal.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\signal.c</FilePath> + </File> + <File> + <FileName>thread.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\thread.c</FilePath> + </File> + <File> + <FileName>timer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\timer.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Applications</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>applications\main.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_msp.c</FileName> + <FileType>1</FileType> + <FilePath>board\CubeMX_Config\Src\stm32f1xx_hal_msp.c</FilePath> + </File> + <File> + <FileName>startup_stm32f103xB.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\arm\startup_stm32f103xB.s</FilePath> + </File> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath> + </File> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath> + </File> + <File> + <FileName>drv_common.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>cpu</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> + </File> + <File> + <FileName>div0.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> + </File> + <File> + <FileName>showmem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> + </File> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath> + </File> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>DeviceDrivers</GroupName> + <Files> + <File> + <FileName>pin.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + <File> + <FileName>symbol.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\symbol.c</FilePath> + </File> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + <File> + <FileName>msh_cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath> + </File> + <File> + <FileName>msh_file.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_file.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>STM32_HAL</GroupName> + <Files> + <File> + <FileName>system_stm32f1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_cortex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_crc.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_rcc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_rcc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_cec.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cec.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_sram.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_gpio_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c</FilePath> + </File> + <File> + <FileName>stm32f1xx_hal_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32F1xx_HAL\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_usart.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-mini-system/rtconfig.h b/bsp/stm32/stm32f103-mini-system/rtconfig.h new file mode 100644 index 0000000000..e587794e89 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/rtconfig.h @@ -0,0 +1,174 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDEL_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart1" +#define RT_VER_NUM 0x40001 +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M3 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using WiFi */ + + +/* Using USB */ + + +/* POSIX layer and C standard library */ + + +/* Network */ + +/* Socket abstraction layer */ + + +/* light weight TCP/IP stack */ + + +/* Modbus master and slave stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* ARM CMSIS */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32F1 + +/* Hardware Drivers Config */ + +#define SOC_STM32F103C8 + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART1 +#define BSP_UART1_RX_USING_DMA + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32f103-mini-system/rtconfig.py b/bsp/stm32/stm32f103-mini-system/rtconfig.py new file mode 100644 index 0000000000..40826ac99e --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/rtconfig.py @@ -0,0 +1,134 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m3' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -std=c99 -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M3 ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M3' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M3' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32f103-mini-system/template.ewp b/bsp/stm32/stm32f103-mini-system/template.ewp new file mode 100644 index 0000000000..3280a547c0 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.ewp @@ -0,0 +1,2032 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
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+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
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+ <state>0</state>
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+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32F103RB ST STM32F103RB</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
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+ <name>GEndianModeBE</name>
+ <state>1</state>
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+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
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+ <option>
+ <name>GenStdoutInterface</name>
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+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
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+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>38</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
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+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
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+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
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+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32F103RB ST STM32F103RB</state>
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+ <option>
+ <name>FPU2</name>
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+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
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+ <state>0</state>
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+ <option>
+ <name>NEON</name>
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+ <name>GFPUCoreSlave2</name>
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+ <option>
+ <name>OGCMSISPackSelectDevice</name>
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+ <option>
+ <name>OgLibHeap</name>
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+ <name>OGLibAdditionalLocale</name>
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+ <name>OGPrintfVariant</name>
+ <version>0</version>
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+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
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+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
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+ <option>
+ <name>CCDefines</name>
+ <state></state>
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+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
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+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
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+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
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+ <option>
+ <name>CCListCFile</name>
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+ <name>CCListCMnemonics</name>
+ <state>0</state>
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+ <name>CCListCMessages</name>
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+ <option>
+ <name>CCListAssFile</name>
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+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
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+ <name>CCEnableRemarks</name>
+ <state>0</state>
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+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
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+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
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+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
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+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
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+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
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+ <name>CCDebugInfo</name>
+ <state>1</state>
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+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
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+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
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+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
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+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
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+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
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+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
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+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
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+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
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+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
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+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
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+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
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+ <name>CCPosIndRopi</name>
+ <state>0</state>
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+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
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+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
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+ <option>
+ <name>IccLang</name>
+ <state>0</state>
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+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
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+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
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+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
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+ <option>
+ <name>ADefines</name>
+ <state></state>
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+ <option>
+ <name>AList</name>
+ <state>0</state>
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+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
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+ <option>
+ <name>AListing</name>
+ <state>1</state>
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+ <option>
+ <name>Includes</name>
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+ <name>MacDefs</name>
+ <state>0</state>
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+ <option>
+ <name>MacExps</name>
+ <state>1</state>
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+ <name>MacExec</name>
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+ <name>OnlyAssed</name>
+ <state>0</state>
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+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
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+ <option>
+ <name>PageLength</name>
+ <state>80</state>
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+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
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+ <option>
+ <name>AXRef</name>
+ <state>0</state>
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+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
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+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
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+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
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+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
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+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
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+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
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+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
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+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
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+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>../../../rtthread.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>project.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
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+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
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+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
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+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
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+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
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+ <name>IlinkTreatAsErr</name>
+ <state></state>
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+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
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+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
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+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
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+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
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+ <name>DoFill</name>
+ <state>0</state>
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+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <name>FillerStart</name>
+ <state>0x0</state>
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+ <name>FillerEnd</name>
+ <state>0x0</state>
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+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
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+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
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+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
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+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
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+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
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+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
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+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
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+ <name>IlinkOptInline</name>
+ <state>0</state>
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+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
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+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
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+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
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+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
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+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>11111110</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>###Unitialized###</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>lnk0t.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+</project>
diff --git a/bsp/stm32/stm32f103-mini-system/template.eww b/bsp/stm32/stm32f103-mini-system/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\template.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/bsp/stm32/stm32f103-mini-system/template.uvopt b/bsp/stm32/stm32f103-mini-system/template.uvopt new file mode 100644 index 0000000000..7946319ef9 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.uvopt @@ -0,0 +1,162 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>0</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <tPdscDbg>0</tPdscDbg> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>Segger\JL2CM3.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + +</ProjectOpt> diff --git a/bsp/stm32/stm32f103-mini-system/template.uvoptx b/bsp/stm32/stm32f103-mini-system/template.uvoptx new file mode 100644 index 0000000000..2a5ee7712d --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.uvoptx @@ -0,0 +1,199 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>18</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Base Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-base-board-schematics.pdf</Path> + </Book> + <Book> + <Number>1</Number> + <Title>Display Board Schematics (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e-display-board-schematics.pdf</Path> + </Book> + <Book> + <Number>2</Number> + <Title>User Manual (MCBSTM32E)</Title> + <Path>I:\MDK5\MDK5\ARM\PACK\Keil\STM32F1xx_DFP\1.0.5\Documents\mcbstm32e.chm</Path> + </Book> + <Book> + <Number>3</Number> + <Title>MCBSTM32E Evaluation Board Web Page (MCBSTM32E)</Title> + <Path>http://www.keil.com/mcbstm32e/</Path> + </Book> + </Books> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>JL2CM3</Key> + <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN0</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F10x_128 -FL020000 -FS08000000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <DebugDescription> + <Enable>1</Enable> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> + </TargetOption> + </Target> + + <Group> + <GroupName>Source Group 1</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/stm32/stm32f103-mini-system/template.uvproj b/bsp/stm32/stm32f103-mini-system/template.uvproj new file mode 100644 index 0000000000..99e58d3b30 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.uvproj @@ -0,0 +1,407 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103RB</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32F10x\startup_stm32f10x_md.s" ("STM32 Medium Density Line Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</FlashDriverDll> + <DeviceId>4231</DeviceId> + <RegisterFile>stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\ST\STM32F1xx\STM32F103xx.sfr</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103RB</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>0</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + <UsePdscDebugDescription>0</UsePdscDebugDescription> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>6</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>Segger\JL2CM3.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f103-mini-system/template.uvprojx b/bsp/stm32/stm32f103-mini-system/template.uvprojx new file mode 100644 index 0000000000..3f668488e9 --- /dev/null +++ b/bsp/stm32/stm32f103-mini-system/template.uvprojx @@ -0,0 +1,415 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103C8</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32F1xx_DFP.1.0.5</PackID> + <PackURL>http://www.keil.com/pack/</PackURL> + <Cpu>IROM(0x08000000,0x10000) IRAM(0x20000000,0x5000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103C8$Flash\STM32F10x_128.FLM))</FlashDriverDll> + <DeviceId>0</DeviceId> + <RegisterFile>$$Device:STM32F103C8$Device\Include\stm32f10x.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:STM32F103C8$SVD\STM32F103xx.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>1</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments> -REMAP</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + <RestoreSysVw>1</RestoreSysVw> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <RestoreTracepoints>1</RestoreTracepoints> + <RestoreSysVw>1</RestoreSysVw> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x10000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Source Group 1</GroupName> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/bsp/stm32/stm32f107-uc-eval/.config b/bsp/stm32/stm32f107-uc-eval/.config index 9e3c8a7fcc..e116d9221b 100644 --- a/bsp/stm32/stm32f107-uc-eval/.config +++ b/bsp/stm32/stm32f107-uc-eval/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f107-uc-eval/rtconfig.h b/bsp/stm32/stm32f107-uc-eval/rtconfig.h index afc9a75ace..016619dcab 100644 --- a/bsp/stm32/stm32f107-uc-eval/rtconfig.h +++ b/bsp/stm32/stm32f107-uc-eval/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/.config b/bsp/stm32/stm32f405-smdz-breadfruit/.config index fe5e73f6c0..a93ce77cd2 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/.config +++ b/bsp/stm32/stm32f405-smdz-breadfruit/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.h b/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.h index 1129acefb6..0e41735873 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.h +++ b/bsp/stm32/stm32f405-smdz-breadfruit/rtconfig.h @@ -21,6 +21,7 @@ #define IDLE_THREAD_STACK_SIZE 256 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/stm32/stm32f407-atk-explorer/.config b/bsp/stm32/stm32f407-atk-explorer/.config index 177d468704..52b162451a 100644 --- a/bsp/stm32/stm32f407-atk-explorer/.config +++ b/bsp/stm32/stm32f407-atk-explorer/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c b/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c index 3026357b5c..625cec463d 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c @@ -16,10 +16,7 @@ #include <dfs_fs.h> #include <dfs_posix.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f407-atk-explorer/rtconfig.h b/bsp/stm32/stm32f407-atk-explorer/rtconfig.h index d35ad8f997..ce6e3b4c2c 100644 --- a/bsp/stm32/stm32f407-atk-explorer/rtconfig.h +++ b/bsp/stm32/stm32f407-atk-explorer/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f407-st-discovery/.config b/bsp/stm32/stm32f407-st-discovery/.config index 855a959166..456c95097d 100644 --- a/bsp/stm32/stm32f407-st-discovery/.config +++ b/bsp/stm32/stm32f407-st-discovery/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f407-st-discovery/rtconfig.h b/bsp/stm32/stm32f407-st-discovery/rtconfig.h index 41e6ddedbd..c25a065336 100644 --- a/bsp/stm32/stm32f407-st-discovery/rtconfig.h +++ b/bsp/stm32/stm32f407-st-discovery/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f411-st-nucleo/.config b/bsp/stm32/stm32f411-st-nucleo/.config index ca166c9644..6df7485ea9 100644 --- a/bsp/stm32/stm32f411-st-nucleo/.config +++ b/bsp/stm32/stm32f411-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -62,7 +63,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" -CONFIG_RT_VER_NUM=0x40000 +CONFIG_RT_VER_NUM=0x40001 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y @@ -112,6 +113,7 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_USING_SERIAL=y # CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set @@ -128,6 +130,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set # # Using WiFi @@ -312,6 +315,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -321,6 +325,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32F4=y @@ -339,6 +344,8 @@ CONFIG_SOC_STM32F411RE=y CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART2=y +# CONFIG_BSP_USING_I2C1 is not set +# CONFIG_BSP_USING_PWM is not set # CONFIG_BSP_USING_ON_CHIP_FLASH is not set # diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/.mxproject index 8691bed235..666f79359c 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/.mxproject @@ -1,7 +1,7 @@ [PreviousGenFiles] -HeaderPath=D:/repository/BspFramework/rt-thread/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc +HeaderPath=D:/repository/rt-thread-rtt/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h; -SourcePath=D:/repository/BspFramework/rt-thread/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src +SourcePath=D:/repository/rt-thread-rtt/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c; [PreviousLibFiles] diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc index 0428900030..81e4b8cf64 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -5,28 +5,34 @@ Mcu.Family=STM32F4 Mcu.IP0=NVIC Mcu.IP1=RCC Mcu.IP2=SYS -Mcu.IP3=USART2 -Mcu.IPNb=4 +Mcu.IP3=TIM3 +Mcu.IP4=USART2 +Mcu.IPNb=5 Mcu.Name=STM32F411R(C-E)Tx Mcu.Package=LQFP64 Mcu.Pin0=PC13-ANTI_TAMP Mcu.Pin1=PC14-OSC32_IN -Mcu.Pin10=PB3 -Mcu.Pin11=VP_SYS_VS_Systick +Mcu.Pin10=PB0 +Mcu.Pin11=PB1 +Mcu.Pin12=PA13 +Mcu.Pin13=PA14 +Mcu.Pin14=PB3 +Mcu.Pin15=VP_SYS_VS_Systick +Mcu.Pin16=VP_TIM3_VS_ClockSourceINT Mcu.Pin2=PC15-OSC32_OUT Mcu.Pin3=PH0 - OSC_IN Mcu.Pin4=PH1 - OSC_OUT Mcu.Pin5=PA2 Mcu.Pin6=PA3 Mcu.Pin7=PA5 -Mcu.Pin8=PA13 -Mcu.Pin9=PA14 -Mcu.PinsNb=12 +Mcu.Pin8=PA6 +Mcu.Pin9=PA7 +Mcu.PinsNb=17 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F411RETx -MxCube.Version=5.0.0 -MxDb.Version=DB.5.0.0 +MxCube.Version=5.0.1 +MxDb.Version=DB.5.0.1 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true @@ -55,6 +61,10 @@ PA5.GPIOParameters=GPIO_Label PA5.GPIO_Label=LD2 [Green Led] PA5.Locked=true PA5.Signal=GPIO_Output +PA6.Signal=S_TIM3_CH1 +PA7.Signal=S_TIM3_CH2 +PB0.Signal=S_TIM3_CH3 +PB1.Signal=S_TIM3_CH4 PB3.GPIOParameters=GPIO_Label PB3.GPIO_Label=SWO PB3.Locked=true @@ -90,8 +100,8 @@ ProjectManager.BackupPrevious=false ProjectManager.CompilerOptimize=6 ProjectManager.ComputerToolchain=false ProjectManager.CoupleFile=false -ProjectManager.CustomerFirmwarePackage=..\\..\\..\\..\\..\\..\\..\\..\\board\\stm32cubefx-repo\\STM32Cube_FW_F4_V1.11.0 -ProjectManager.DefaultFWLocation=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32F411RETx ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.23.0 @@ -111,7 +121,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_TIM3_Init-TIM3-false-HAL-true RCC.48MHZClocksFreq_Value=42000000 RCC.AHBFreq_Value=84000000 RCC.APB1CLKDivider=RCC_HCLK_DIV2 @@ -147,9 +157,24 @@ RCC.VCOOutputFreq_Value=168000000 RCC.VcooutputI2S=48000000 SH.GPXTI13.0=GPIO_EXTI13 SH.GPXTI13.ConfNb=1 +SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1 +SH.S_TIM3_CH1.ConfNb=1 +SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2 +SH.S_TIM3_CH2.ConfNb=1 +SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3 +SH.S_TIM3_CH3.ConfNb=1 +SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4 +SH.S_TIM3_CH4.ConfNb=1 +TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 +TIM3.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 USART2.IPParameters=VirtualMode USART2.VirtualMode=VM_ASYNC VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM3_VS_ClockSourceINT.Mode=Internal +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT board=NUCLEO-F411RE boardIOC=true diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/main.h index 47036898b7..3651f0788e 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/main.h +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -70,6 +70,8 @@ extern "C" { /* USER CODE END EM */ +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /* Exported functions prototypes ---------------------------------------------*/ void Error_Handler(void); diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h index 15f9b6ae02..c297288600 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h @@ -74,7 +74,7 @@ /* #define HAL_SD_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */ /* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/main.c index f934319b9d..cb90fe22eb 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/main.c @@ -62,6 +62,8 @@ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ +TIM_HandleTypeDef htim3; + UART_HandleTypeDef huart2; /* USER CODE BEGIN PV */ @@ -72,6 +74,7 @@ UART_HandleTypeDef huart2; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART2_UART_Init(void); +static void MX_TIM3_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -110,6 +113,7 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_USART2_UART_Init(); + MX_TIM3_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -168,6 +172,76 @@ void SystemClock_Config(void) } /** + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM3_Init(void) +{ + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 0; + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + htim3.Init.Period = 0; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ + HAL_TIM_MspPostInit(&htim3); + +} + +/** * @brief USART2 Initialization Function * @param None * @retval None diff --git a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c index a0b3b19ee5..0cc7029333 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c +++ b/bsp/stm32/stm32f411-st-nucleo/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c @@ -78,7 +78,9 @@ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ -/** + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /** * Initializes the Global MSP. */ void HAL_MspInit(void) @@ -100,6 +102,91 @@ void HAL_MspInit(void) } /** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + + if(htim_base->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspInit 0 */ + + /* USER CODE END TIM3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM3_CLK_ENABLE(); + /* USER CODE BEGIN TIM3_MspInit 1 */ + + /* USER CODE END TIM3_MspInit 1 */ + } + +} + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(htim->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspPostInit 0 */ + + /* USER CODE END TIM3_MspPostInit 0 */ + + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**TIM3 GPIO Configuration + PA6 ------> TIM3_CH1 + PA7 ------> TIM3_CH2 + PB0 ------> TIM3_CH3 + PB1 ------> TIM3_CH4 + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM3_MspPostInit 1 */ + + /* USER CODE END TIM3_MspPostInit 1 */ + } + +} +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ + +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + + if(htim_base->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspDeInit 0 */ + + /* USER CODE END TIM3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM3_CLK_DISABLE(); + /* USER CODE BEGIN TIM3_MspDeInit 1 */ + + /* USER CODE END TIM3_MspDeInit 1 */ + } + +} + +/** * @brief UART MSP Initialization * This function configures the hardware resources used in this example * @param huart: UART handle pointer diff --git a/bsp/stm32/stm32f411-st-nucleo/board/Kconfig b/bsp/stm32/stm32f411-st-nucleo/board/Kconfig index 1c6ee6b39b..92402d950d 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f411-st-nucleo/board/Kconfig @@ -31,6 +31,50 @@ menu "On-chip Peripheral Drivers" default n endif + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + int "i2c1 scl pin number" + range 0 80 + default 30 + config BSP_I2C1_SDA_PIN + int "I2C1 sda pin number" + range 0 80 + default 31 + endif + + menuconfig BSP_USING_PWM + bool "Enable pwm" + default n + select RT_USING_PWM + if BSP_USING_PWM + menuconfig BSP_USING_PWM3 + bool "Enable timer3 output pwm" + default n + if BSP_USING_PWM3 + config BSP_USING_PWM3_CH1 + bool "Enable PWM3 channel1 (PA6)" + default n + + config BSP_USING_PWM3_CH2 + bool "Enable PWM3 channel2 (PA7)" + default n + + config BSP_USING_PWM3_CH3 + bool "Enable PWM3 channel3 (PB0)" + default n + + config BSP_USING_PWM3_CH4 + bool "Enable PWM3 channel4 (PB1)" + default n + endif + endif + config BSP_USING_ON_CHIP_FLASH bool "Enable on-chip FLASH" default n diff --git a/bsp/stm32/stm32f411-st-nucleo/board/board.c b/bsp/stm32/stm32f411-st-nucleo/board/board.c index c0fddec187..20fb37099c 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f411-st-nucleo/board/board.c @@ -21,9 +21,8 @@ void SystemClock_Config(void) __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); /**Initializes the CPU, AHB and APB busses clocks */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; diff --git a/bsp/stm32/stm32f411-st-nucleo/project.uvoptx b/bsp/stm32/stm32f411-st-nucleo/project.uvoptx index 33f764fea8..f42ac67b9d 100644 --- a/bsp/stm32/stm32f411-st-nucleo/project.uvoptx +++ b/bsp/stm32/stm32f411-st-nucleo/project.uvoptx @@ -73,7 +73,7 @@ <LExpSel>0</LExpSel> </OPTXL> <OPTFL> - <tvExp>1</tvExp> + <tvExp>0</tvExp> <tvExpOptDlg>0</tvExpOptDlg> <IsCurrentTarget>1</IsCurrentTarget> </OPTFL> @@ -181,767 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<PathWithFileName>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</PathWithFileName> - <FilenameWithoutPath>stm32f4xx_hal_uart.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>7</GroupNumber> - <FileNumber>59</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_usart.c</PathWithFileName> - <FilenameWithoutPath>stm32f4xx_hal_usart.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> </Group> </ProjectOpt> diff --git a/bsp/stm32/stm32f411-st-nucleo/project.uvprojx b/bsp/stm32/stm32f411-st-nucleo/project.uvprojx index 735e620c46..07ec689639 100644 --- a/bsp/stm32/stm32f411-st-nucleo/project.uvprojx +++ b/bsp/stm32/stm32f411-st-nucleo/project.uvprojx @@ -1,10 +1,7 @@ <?xml version="1.0" encoding="UTF-8" standalone="no" ?> <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> - <SchemaVersion>2.1</SchemaVersion> - <Header>### uVision Project, (C) Keil Software</Header> - <Targets> <Target> <TargetName>rtthread</TargetName> @@ -19,28 +16,28 @@ <PackID>Keil.STM32F4xx_DFP.2.12.0</PackID> <PackURL>http://www.keil.com/pack</PackURL> <Cpu>IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu> - <FlashUtilSpec></FlashUtilSpec> - <StartupFile></StartupFile> + <FlashUtilSpec /> + <StartupFile /> <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM))</FlashDriverDll> <DeviceId>0</DeviceId> <RegisterFile>$$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h</RegisterFile> - <MemoryEnv></MemoryEnv> - <Cmp></Cmp> - <Asm></Asm> - <Linker></Linker> - <OHString></OHString> - <InfinionOptionDll></InfinionOptionDll> - <SLE66CMisc></SLE66CMisc> - <SLE66AMisc></SLE66AMisc> - <SLE66LinkerMisc></SLE66LinkerMisc> + <MemoryEnv /> + <Cmp /> + <Asm /> + <Linker /> + <OHString /> + <InfinionOptionDll /> + <SLE66CMisc /> + <SLE66AMisc /> + <SLE66LinkerMisc /> <SFDFile>$$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd</SFDFile> <bCustSvd>0</bCustSvd> <UseEnv>0</UseEnv> - <BinPath></BinPath> - <IncludePath></IncludePath> - <LibPath></LibPath> - <RegisterFilePath></RegisterFilePath> - <DBRegisterFilePath></DBRegisterFilePath> + <BinPath /> + <IncludePath /> + <LibPath /> + <RegisterFilePath /> + <DBRegisterFilePath /> <TargetStatus> <Error>0</Error> <ExitCodeStop>0</ExitCodeStop> @@ -62,8 +59,8 @@ <BeforeCompile> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg1Name /> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopU1X>0</nStopU1X> @@ -72,8 +69,8 @@ <BeforeMake> <RunUserProg1>0</RunUserProg1> <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg1Name /> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopB1X>0</nStopB1X> @@ -83,14 +80,14 @@ <RunUserProg1>1</RunUserProg1> <RunUserProg2>0</RunUserProg2> <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> - <UserProg2Name></UserProg2Name> + <UserProg2Name /> <UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode> <nStopA1X>0</nStopA1X> <nStopA2X>0</nStopA2X> </AfterMake> <SelectedForBatchBuild>0</SelectedForBatchBuild> - <SVCSIdString></SVCSIdString> + <SVCSIdString /> </TargetCommonOption> <CommonProperty> <UseCPPCompiler>0</UseCPPCompiler> @@ -104,8 +101,8 @@ <AssembleAssemblyFile>0</AssembleAssemblyFile> <PublicsOnly>0</PublicsOnly> <StopOnExitCode>3</StopOnExitCode> - <CustomArgument></CustomArgument> - <IncludeLibraryModules></IncludeLibraryModules> + <CustomArgument /> + <IncludeLibraryModules /> <ComprImg>1</ComprImg> </CommonProperty> <DllOption> @@ -138,11 +135,11 @@ </Flash1> <bUseTDR>1</bUseTDR> <Flash2>BIN\UL2CM3.DLL</Flash2> - <Flash3></Flash3> - <Flash4></Flash4> - <pFcarmOut></pFcarmOut> - <pFcarmGrp></pFcarmGrp> - <pFcArmRoot></pFcArmRoot> + <Flash3 /> + <Flash4 /> + <pFcarmOut /> + <pFcarmGrp /> + <pFcArmRoot /> <FcArmLst>0</FcArmLst> </Utilities> <TargetArmAds> @@ -175,7 +172,7 @@ <RvctClst>0</RvctClst> <GenPPlst>0</GenPPlst> <AdsCpuType>"Cortex-M4"</AdsCpuType> - <RvctDeviceName></RvctDeviceName> + <RvctDeviceName /> <mOS>0</mOS> <uocRom>0</uocRom> <uocRam>0</uocRam> @@ -307,7 +304,7 @@ <Size>0x0</Size> </OCR_RVCT10> </OnChipMemories> - <RvctStartVector></RvctStartVector> + <RvctStartVector /> </ArmAdsMisc> <Cads> <interw>1</interw> @@ -333,10 +330,10 @@ <v6WtE>0</v6WtE> <v6Rtti>0</v6Rtti> <VariousControls> - <MiscControls></MiscControls> + <MiscControls /> <Define>USE_HAL_DRIVER, STM32F411xE</Define> - <Undefine></Undefine> - <IncludePath>applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\include;..\..\..\libcpu\arm\cortex-m4;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include</IncludePath> + <Undefine /> + <IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Inc;..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Include;..\libraries\STM32F4xx_HAL\CMSIS\Include</IncludePath> </VariousControls> </Cads> <Aads> @@ -351,10 +348,10 @@ <useXO>0</useXO> <uClangAs>0</uClangAs> <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath></IncludePath> + <MiscControls /> + <Define /> + <Undefine /> + <IncludePath /> </VariousControls> </Aads> <LDads> @@ -366,63 +363,18 @@ <useFile>0</useFile> <TextAddressRange>0x08000000</TextAddressRange> <DataAddressRange>0x20000000</DataAddressRange> - <pXoBase></pXoBase> + <pXoBase /> <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> - <IncludeLibs></IncludeLibs> - <IncludeLibsPath></IncludeLibsPath> - <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> - <LinkerInputFile></LinkerInputFile> - <DisabledWarnings></DisabledWarnings> + <IncludeLibs /> + <IncludeLibsPath /> + <Misc /> + <LinkerInputFile /> + <DisabledWarnings /> </LDads> </TargetArmAds> </TargetOption> <Groups> <Group> - <GroupName>Applications</GroupName> - <Files> - <File> - <FileName>main.c</FileName> - <FileType>1</FileType> - <FilePath>applications\main.c</FilePath> - </File> - </Files> - </Group> - <Group> - <GroupName>Drivers</GroupName> - <Files> - <File> - <FileName>board.c</FileName> - <FileType>1</FileType> - <FilePath>board\board.c</FilePath> - </File> - <File> - <FileName>stm32f4xx_hal_msp.c</FileName> - <FileType>1</FileType> - <FilePath>board\CubeMX_Config\Src\stm32f4xx_hal_msp.c</FilePath> - </File> - <File> - <FileName>startup_stm32f411xe.s</FileName> - <FileType>2</FileType> - <FilePath>..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f411xe.s</FilePath> - </File> - <File> - <FileName>drv_gpio.c</FileName> - <FileType>1</FileType> - <FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath> - </File> - <File> - <FileName>drv_usart.c</FileName> - <FileType>1</FileType> - <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath> - </File> - <File> - <FileName>drv_common.c</FileName> - <FileType>1</FileType> - <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath> - </File> - </Files> - </Group> - <Group> <GroupName>Kernel</GroupName> <Files> <File> @@ -430,71 +382,99 @@ <FileType>1</FileType> <FilePath>..\..\..\src\clock.c</FilePath> </File> + </Files> + <Files> <File> <FileName>components.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\components.c</FilePath> </File> + </Files> + <Files> <File> <FileName>cpu.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\cpu.c</FilePath> </File> + </Files> + <Files> <File> <FileName>device.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\device.c</FilePath> </File> + </Files> + <Files> <File> <FileName>idle.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\idle.c</FilePath> </File> + </Files> + <Files> <File> <FileName>ipc.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\ipc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>irq.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\irq.c</FilePath> </File> + </Files> + <Files> <File> <FileName>kservice.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\kservice.c</FilePath> </File> + </Files> + <Files> <File> <FileName>mem.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\mem.c</FilePath> </File> + </Files> + <Files> <File> <FileName>mempool.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\mempool.c</FilePath> </File> + </Files> + <Files> <File> <FileName>object.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\object.c</FilePath> </File> + </Files> + <Files> <File> <FileName>scheduler.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\scheduler.c</FilePath> </File> + </Files> + <Files> <File> <FileName>signal.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\signal.c</FilePath> </File> + </Files> + <Files> <File> <FileName>thread.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\src\thread.c</FilePath> </File> + </Files> + <Files> <File> <FileName>timer.c</FileName> <FileType>1</FileType> @@ -503,34 +483,97 @@ </Files> </Group> <Group> - <GroupName>CORTEX-M4</GroupName> + <GroupName>Applications</GroupName> <Files> <File> - <FileName>cpuport.c</FileName> + <FileName>main.c</FileName> <FileType>1</FileType> - <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath> + <FilePath>applications\main.c</FilePath> </File> + </Files> + </Group> + <Group> + <GroupName>Drivers</GroupName> + <Files> <File> - <FileName>context_rvds.S</FileName> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>board\board.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32f4xx_hal_msp.c</FileName> + <FileType>1</FileType> + <FilePath>board\CubeMX_Config\Src\stm32f4xx_hal_msp.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>startup_stm32f411xe.s</FileName> <FileType>2</FileType> - <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath> + <FilePath>..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f411xe.s</FilePath> </File> + </Files> + <Files> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_common.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>cpu</GroupName> + <Files> <File> <FileName>backtrace.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath> </File> + </Files> + <Files> <File> <FileName>div0.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath> </File> + </Files> + <Files> <File> <FileName>showmem.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath> </File> </Files> + <Files> + <File> + <FileName>cpuport.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>context_rvds.S</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath> + </File> + </Files> </Group> <Group> <GroupName>DeviceDrivers</GroupName> @@ -540,41 +583,57 @@ <FileType>1</FileType> <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath> </File> + </Files> + <Files> <File> <FileName>serial.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> </File> + </Files> + <Files> <File> <FileName>completion.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> </File> + </Files> + <Files> <File> <FileName>dataqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> </File> + </Files> + <Files> <File> <FileName>pipe.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> </File> + </Files> + <Files> <File> <FileName>ringblk_buf.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> </File> + </Files> + <Files> <File> <FileName>ringbuffer.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> </File> + </Files> + <Files> <File> <FileName>waitqueue.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> </File> + </Files> + <Files> <File> <FileName>workqueue.c</FileName> <FileType>1</FileType> @@ -590,26 +649,36 @@ <FileType>1</FileType> <FilePath>..\..\..\components\finsh\shell.c</FilePath> </File> + </Files> + <Files> <File> <FileName>symbol.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\symbol.c</FilePath> </File> + </Files> + <Files> <File> <FileName>cmd.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\cmd.c</FilePath> </File> + </Files> + <Files> <File> <FileName>msh.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\msh.c</FilePath> </File> + </Files> + <Files> <File> <FileName>msh_cmd.c</FileName> <FileType>1</FileType> <FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath> </File> + </Files> + <Files> <File> <FileName>msh_file.c</FileName> <FileType>1</FileType> @@ -625,81 +694,113 @@ <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_cec.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cec.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_cortex.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_crc.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_cryp.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_cryp_ex.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cryp_ex.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_dma.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_dma_ex.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_pwr.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_pwr_ex.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_rcc.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_rcc_ex.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_rng.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_gpio.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_uart.c</FileName> <FileType>1</FileType> <FilePath>..\libraries\STM32F4xx_HAL\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c</FilePath> </File> + </Files> + <Files> <File> <FileName>stm32f4xx_hal_usart.c</FileName> <FileType>1</FileType> @@ -710,11 +811,9 @@ </Groups> </Target> </Targets> - <RTE> - <apis/> - <components/> - <files/> + <apis /> + <components /> + <files /> </RTE> - </Project> diff --git a/bsp/stm32/stm32f411-st-nucleo/rtconfig.h b/bsp/stm32/stm32f411-st-nucleo/rtconfig.h index 94d5708a91..1d7b6ca3f0 100644 --- a/bsp/stm32/stm32f411-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32f411-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -38,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart2" -#define RT_VER_NUM 0x40000 +#define RT_VER_NUM 0x40001 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M4 @@ -77,6 +78,7 @@ #define RT_USING_DEVICE_IPC #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN /* Using WiFi */ diff --git a/bsp/stm32/stm32f429-armfly-v6/.config b/bsp/stm32/stm32f429-armfly-v6/.config index 3169a6cb0f..5864f2d8c2 100644 --- a/bsp/stm32/stm32f429-armfly-v6/.config +++ b/bsp/stm32/stm32f429-armfly-v6/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c index 617379fd4e..0eb7035ddf 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c @@ -16,10 +16,7 @@ #include <dfs_fs.h> #include <dfs_posix.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f429-armfly-v6/rtconfig.h b/bsp/stm32/stm32f429-armfly-v6/rtconfig.h index 7d6c12513e..f396b058ea 100644 --- a/bsp/stm32/stm32f429-armfly-v6/rtconfig.h +++ b/bsp/stm32/stm32f429-armfly-v6/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f429-atk-apollo/.config b/bsp/stm32/stm32f429-atk-apollo/.config index 90c7572d90..71b42e506b 100644 --- a/bsp/stm32/stm32f429-atk-apollo/.config +++ b/bsp/stm32/stm32f429-atk-apollo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c index 3026357b5c..625cec463d 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c @@ -16,10 +16,7 @@ #include <dfs_fs.h> #include <dfs_posix.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f429-atk-apollo/rtconfig.h b/bsp/stm32/stm32f429-atk-apollo/rtconfig.h index bcf153da33..21f47999d0 100644 --- a/bsp/stm32/stm32f429-atk-apollo/rtconfig.h +++ b/bsp/stm32/stm32f429-atk-apollo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f429-fire-challenger/.config b/bsp/stm32/stm32f429-fire-challenger/.config index ddd5f2950f..55d2ccfb56 100644 --- a/bsp/stm32/stm32f429-fire-challenger/.config +++ b/bsp/stm32/stm32f429-fire-challenger/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c index 0a84162150..c7200001e3 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c @@ -17,10 +17,7 @@ #include <dfs_posix.h> #include "drv_gpio.h" -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f429-fire-challenger/rtconfig.h b/bsp/stm32/stm32f429-fire-challenger/rtconfig.h index 7e366cf856..f411466331 100644 --- a/bsp/stm32/stm32f429-fire-challenger/rtconfig.h +++ b/bsp/stm32/stm32f429-fire-challenger/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f446-st-nucleo/.config b/bsp/stm32/stm32f446-st-nucleo/.config index 1e648651f4..916cefa8d2 100644 --- a/bsp/stm32/stm32f446-st-nucleo/.config +++ b/bsp/stm32/stm32f446-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f446-st-nucleo/rtconfig.h b/bsp/stm32/stm32f446-st-nucleo/rtconfig.h index 6f058fe597..b32a8e953d 100644 --- a/bsp/stm32/stm32f446-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32f446-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f746-st-disco/.config b/bsp/stm32/stm32f746-st-disco/.config index ce3efbd2ea..95a8f6ecec 100644 --- a/bsp/stm32/stm32f746-st-disco/.config +++ b/bsp/stm32/stm32f746-st-disco/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -62,7 +63,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x40000 +CONFIG_RT_VER_NUM=0x40001 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M7=y @@ -112,6 +113,7 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_USING_SERIAL=y CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set @@ -128,6 +130,7 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set # # Using WiFi @@ -199,6 +202,7 @@ CONFIG_RT_USING_PIN=y # # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set # CONFIG_PKG_USING_MONGOOSE is not set # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_CJSON is not set @@ -206,7 +210,6 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_NANOPB is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set # # Wi-Fi @@ -221,10 +224,22 @@ CONFIG_RT_USING_PIN=y # Wiced WiFi # # CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# # CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set # # security packages @@ -236,6 +251,7 @@ CONFIG_RT_USING_PIN=y # # language packages # +# CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -252,6 +268,10 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set # # system packages @@ -266,17 +286,30 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set # CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_STM32F4_HAL is not set -# CONFIG_PKG_USING_STM32F4_DRIVERS is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set # # miscellaneous packages # +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set # CONFIG_PKG_USING_MINILZO is not set # CONFIG_PKG_USING_QUICKLZ is not set @@ -284,16 +317,18 @@ CONFIG_RT_USING_PIN=y # CONFIG_PKG_USING_CANFESTIVAL is not set # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # -# sample package -# -# CONFIG_PKG_USING_SAMPLES is not set - -# -# example package: hello +# samples: kernel and components samples # +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_SERIES_STM32F7=y @@ -306,7 +341,10 @@ CONFIG_SOC_STM32F746NG=y # Onboard Peripheral Drivers # CONFIG_BSP_USING_USB_TO_USART=y +# CONFIG_BSP_USING_SDRAM is not set # CONFIG_BSP_USING_QSPI_FLASH is not set +# CONFIG_BSP_USING_ETH is not set +# CONFIG_BSP_USING_SDCARD is not set # # On-chip Peripheral Drivers @@ -315,7 +353,9 @@ CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y # CONFIG_BSP_UART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_QSPI is not set +# CONFIG_BSP_USING_SDIO is not set # # Board extended module Drivers diff --git a/bsp/stm32/stm32f746-st-disco/README.md b/bsp/stm32/stm32f746-st-disco/README.md index 92b731c29b..7e0d26fd94 100644 --- a/bsp/stm32/stm32f746-st-disco/README.md +++ b/bsp/stm32/stm32f746-st-disco/README.md @@ -39,10 +39,10 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板， | **板载外设** | **支持情况** | **备注** | | :----------------- | :----------: | :------------------------------------- | | USB 转串口 | 支持 | UART1 | -| QSPI Flash | 支持 | | -| 以太网 | 暂不支持 | | -| SDRAM | 暂不支持 | | -| SD卡 | 暂不支持 | | +| QSPI Flash | 支持 | QSPI1 | +| 以太网 | 支持 | RMII | +| SDRAM | 支持 | SDRAM1 | +| SD卡 | 支持 | SD 4bits | | 4.3寸电容屏 | 暂不支持 | | | MEMS麦克风 | 暂不支持 | | @@ -53,9 +53,9 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板， | SPI | 暂不支持 | 即将支持 | | QSPI | 支持 | QSPI1 | | I2C | 暂不支持 | 即将支持 | -| FLASH | 暂不支持 | 即将支持 | +| FLASH | 支持 | | | WDT | 暂不支持 | 即将支持 | -| SDIO | 暂不支持 | 即将支持 | +| SDIO | 支持 | 支持 | | USB Device | 暂不支持 | 即将支持 | | USB Host | 暂不支持 | 即将支持 | | SAI | 暂不支持 | 即将支持 | diff --git a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject index ceb422a85f..72b7d6a5ee 100644 --- a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject +++ b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/.mxproject @@ -5,9 +5,9 @@ SourcePath=E:/rt-thread/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src SourceFiles=stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c; [PreviousLibFiles] -LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; +LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_eth.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_fmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sdram.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_qspi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; [PreviousUsedKeilFiles] -SourceFiles=..\Src\main.c;..\Src\stm32f7xx_it.c;..\Src\stm32f7xx_hal_msp.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;null; +SourceFiles=..\Src\main.c;..\Src\stm32f7xx_it.c;..\Src\stm32f7xx_hal_msp.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;../\Src/system_stm32f7xx.c;../Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;null; HeaderPath=..\Drivers\STM32F7xx_HAL_Driver\Inc;..\Drivers\STM32F7xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F7xx\Include;..\Drivers\CMSIS\Include;..\Inc; diff --git a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc index 011044f0f3..00ed619281 100644 --- a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc +++ b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/CubeMX_Config.ioc @@ -1,34 +1,89 @@ #MicroXplorer Configuration settings - do not modify +ETH.IPParameters=MediaInterface +ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII File.Version=6 KeepUserPlacement=false Mcu.Family=STM32F7 Mcu.IP0=CORTEX_M7 -Mcu.IP1=NVIC -Mcu.IP2=QUADSPI -Mcu.IP3=RCC -Mcu.IP4=SYS -Mcu.IP5=USART1 -Mcu.IPNb=6 +Mcu.IP1=ETH +Mcu.IP2=FMC +Mcu.IP3=NVIC +Mcu.IP4=QUADSPI +Mcu.IP5=RCC +Mcu.IP6=SDMMC1 +Mcu.IP7=SYS +Mcu.IP8=USART1 +Mcu.IPNb=9 Mcu.Name=STM32F746NGHx Mcu.Package=TFBGA216 Mcu.Pin0=PE2 -Mcu.Pin1=PA14 -Mcu.Pin10=PH1/OSC_OUT -Mcu.Pin11=PJ8 -Mcu.Pin12=PB2 -Mcu.Pin13=PD12 -Mcu.Pin14=PD13 -Mcu.Pin15=PD11 -Mcu.Pin16=VP_SYS_VS_Systick -Mcu.Pin2=PA13 -Mcu.Pin3=PB7 -Mcu.Pin4=PB6 -Mcu.Pin5=PC14/OSC32_IN -Mcu.Pin6=PA9 -Mcu.Pin7=PC15/OSC32_OUT -Mcu.Pin8=PK1 -Mcu.Pin9=PH0/OSC_IN -Mcu.PinsNb=17 +Mcu.Pin1=PG14 +Mcu.Pin10=PD0 +Mcu.Pin11=PC11 +Mcu.Pin12=PC10 +Mcu.Pin13=PD1 +Mcu.Pin14=PF0 +Mcu.Pin15=PD2 +Mcu.Pin16=PC14/OSC32_IN +Mcu.Pin17=PF1 +Mcu.Pin18=PA9 +Mcu.Pin19=PC15/OSC32_OUT +Mcu.Pin2=PC12 +Mcu.Pin20=PK1 +Mcu.Pin21=PC9 +Mcu.Pin22=PH0/OSC_IN +Mcu.Pin23=PF2 +Mcu.Pin24=PC8 +Mcu.Pin25=PH1/OSC_OUT +Mcu.Pin26=PF3 +Mcu.Pin27=PJ8 +Mcu.Pin28=PG8 +Mcu.Pin29=PF4 +Mcu.Pin3=PA14 +Mcu.Pin30=PH5 +Mcu.Pin31=PH3 +Mcu.Pin32=PF5 +Mcu.Pin33=PD15 +Mcu.Pin34=PD10 +Mcu.Pin35=PC3 +Mcu.Pin36=PD14 +Mcu.Pin37=PD9 +Mcu.Pin38=PD8 +Mcu.Pin39=PC1 +Mcu.Pin4=PA13 +Mcu.Pin40=PB2 +Mcu.Pin41=PF12 +Mcu.Pin42=PF15 +Mcu.Pin43=PD12 +Mcu.Pin44=PD13 +Mcu.Pin45=PA1 +Mcu.Pin46=PC4 +Mcu.Pin47=PF13 +Mcu.Pin48=PG0 +Mcu.Pin49=PE8 +Mcu.Pin5=PG13 +Mcu.Pin50=PD11 +Mcu.Pin51=PG5 +Mcu.Pin52=PG4 +Mcu.Pin53=PA2 +Mcu.Pin54=PC5 +Mcu.Pin55=PF14 +Mcu.Pin56=PF11 +Mcu.Pin57=PE9 +Mcu.Pin58=PE11 +Mcu.Pin59=PE14 +Mcu.Pin6=PB7 +Mcu.Pin60=PA7 +Mcu.Pin61=PE7 +Mcu.Pin62=PE10 +Mcu.Pin63=PE12 +Mcu.Pin64=PE15 +Mcu.Pin65=PE13 +Mcu.Pin66=VP_SYS_VS_Systick +Mcu.Pin7=PB6 +Mcu.Pin8=PG15 +Mcu.Pin9=PG11 +Mcu.PinsNb=67 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F746NGHx @@ -44,10 +99,16 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false +PA1.Mode=RMII +PA1.Signal=ETH_REF_CLK PA13.Mode=Serial_Wire PA13.Signal=SYS_JTMS-SWDIO PA14.Mode=Serial_Wire PA14.Signal=SYS_JTCK-SWCLK +PA2.Mode=RMII +PA2.Signal=ETH_MDIO +PA7.Mode=RMII +PA7.Signal=ETH_CRS_DV PA9.Locked=true PA9.Mode=Asynchronous PA9.Signal=USART1_TX @@ -57,10 +118,29 @@ PB6.Mode=Single Bank 1 PB6.Signal=QUADSPI_BK1_NCS PB7.Mode=Asynchronous PB7.Signal=USART1_RX +PC1.Mode=RMII +PC1.Signal=ETH_MDC +PC10.Mode=SD_4_bits_Wide_bus +PC10.Signal=SDMMC1_D2 +PC11.Mode=SD_4_bits_Wide_bus +PC11.Signal=SDMMC1_D3 +PC12.Mode=SD_4_bits_Wide_bus +PC12.Signal=SDMMC1_CK PC14/OSC32_IN.Mode=LSE-External-Oscillator PC14/OSC32_IN.Signal=RCC_OSC32_IN PC15/OSC32_OUT.Mode=LSE-External-Oscillator PC15/OSC32_OUT.Signal=RCC_OSC32_OUT +PC3.Locked=true +PC3.Mode=SdramChipSelect1_1 +PC3.Signal=FMC_SDCKE0 +PC4.Mode=RMII +PC4.Signal=ETH_RXD0 +PC5.Mode=RMII +PC5.Signal=ETH_RXD1 +PC8.Mode=SD_4_bits_Wide_bus +PC8.Signal=SDMMC1_D0 +PC9.Mode=SD_4_bits_Wide_bus +PC9.Signal=SDMMC1_D1 PCC.Checker=false PCC.Line=STM32F7x6 PCC.MCU=STM32F746NGHx @@ -69,6 +149,9 @@ PCC.Seq0=0 PCC.Series=STM32F7 PCC.Temperature=25 PCC.Vdd=3.3 +PD0.Signal=FMC_D2_DA2 +PD1.Signal=FMC_D3_DA3 +PD10.Signal=FMC_D15_DA15 PD11.Locked=true PD11.Mode=Single Bank 1 PD11.Signal=QUADSPI_BK1_IO0 @@ -78,13 +161,53 @@ PD12.Signal=QUADSPI_BK1_IO1 PD13.Locked=true PD13.Mode=Single Bank 1 PD13.Signal=QUADSPI_BK1_IO3 +PD14.Signal=FMC_D0_DA0 +PD15.Signal=FMC_D1_DA1 +PD2.Mode=SD_4_bits_Wide_bus +PD2.Signal=SDMMC1_CMD +PD8.Signal=FMC_D13_DA13 +PD9.Signal=FMC_D14_DA14 +PE10.Signal=FMC_D7_DA7 +PE11.Signal=FMC_D8_DA8 +PE12.Signal=FMC_D9_DA9 +PE13.Signal=FMC_D10_DA10 +PE14.Signal=FMC_D11_DA11 +PE15.Signal=FMC_D12_DA12 PE2.Locked=true PE2.Mode=Single Bank 1 PE2.Signal=QUADSPI_BK1_IO2 +PE7.Signal=FMC_D4_DA4 +PE8.Signal=FMC_D5_DA5 +PE9.Signal=FMC_D6_DA6 +PF0.Signal=FMC_A0 +PF1.Signal=FMC_A1 +PF11.Signal=FMC_SDNRAS +PF12.Signal=FMC_A6 +PF13.Signal=FMC_A7 +PF14.Signal=FMC_A8 +PF15.Signal=FMC_A9 +PF2.Signal=FMC_A2 +PF3.Signal=FMC_A3 +PF4.Signal=FMC_A4 +PF5.Signal=FMC_A5 +PG0.Signal=FMC_A10 +PG11.Mode=RMII +PG11.Signal=ETH_TX_EN +PG13.Mode=RMII +PG13.Signal=ETH_TXD0 +PG14.Mode=RMII +PG14.Signal=ETH_TXD1 +PG15.Signal=FMC_SDNCAS +PG4.Signal=FMC_A14_BA0 +PG5.Signal=FMC_A15_BA1 +PG8.Signal=FMC_SDCLK PH0/OSC_IN.Mode=HSE-External-Oscillator PH0/OSC_IN.Signal=RCC_OSC_IN PH1/OSC_OUT.Mode=HSE-External-Oscillator PH1/OSC_OUT.Signal=RCC_OSC_OUT +PH3.Mode=SdramChipSelect1_1 +PH3.Signal=FMC_SDNE0 +PH5.Signal=FMC_SDNWE PJ8.Locked=true PJ8.Signal=GPXTI8 PK1.Locked=true @@ -117,71 +240,138 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=MDK-ARM V5 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_ETH_Init-ETH-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_6_CYCLE QUADSPI.ClockPrescaler=1 QUADSPI.FifoThreshold=4 QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,ChipSelectHighTime QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE -RCC.AHBFreq_Value=216000000 +RCC.AHBFreq_Value=50000000 RCC.APB1CLKDivider=RCC_HCLK_DIV4 -RCC.APB1Freq_Value=54000000 -RCC.APB1TimFreq_Value=108000000 +RCC.APB1Freq_Value=12500000 +RCC.APB1TimFreq_Value=25000000 RCC.APB2CLKDivider=RCC_HCLK_DIV2 -RCC.APB2Freq_Value=108000000 -RCC.APB2TimFreq_Value=216000000 +RCC.APB2Freq_Value=25000000 +RCC.APB2TimFreq_Value=50000000 RCC.CECFreq_Value=32786.88524590164 -RCC.CortexFreq_Value=216000000 -RCC.EthernetFreq_Value=216000000 -RCC.FCLKCortexFreq_Value=216000000 +RCC.CortexFreq_Value=50000000 +RCC.EthernetFreq_Value=50000000 +RCC.FCLKCortexFreq_Value=50000000 RCC.FamilyName=M -RCC.HCLKFreq_Value=216000000 +RCC.HCLKFreq_Value=50000000 RCC.HSE_VALUE=25000000 RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=54000000 -RCC.I2C2Freq_Value=54000000 -RCC.I2C3Freq_Value=54000000 -RCC.I2C4Freq_Value=54000000 -RCC.I2SFreq_Value=96000000 -RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value -RCC.LCDTFToutputFreq_Value=48000000 -RCC.LPTIM1Freq_Value=54000000 +RCC.I2C1Freq_Value=12500000 +RCC.I2C2Freq_Value=12500000 +RCC.I2C3Freq_Value=12500000 +RCC.I2C4Freq_Value=12500000 +RCC.I2SFreq_Value=200000000 +RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLP,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value +RCC.LCDTFToutputFreq_Value=100000000 +RCC.LPTIM1Freq_Value=12500000 RCC.LSI_VALUE=32000 -RCC.MCO2PinFreq_Value=216000000 -RCC.PLLCLKFreq_Value=216000000 -RCC.PLLI2SPCLKFreq_Value=96000000 -RCC.PLLI2SQCLKFreq_Value=96000000 -RCC.PLLI2SRCLKFreq_Value=96000000 -RCC.PLLI2SRoutputFreq_Value=96000000 -RCC.PLLM=25 -RCC.PLLN=432 -RCC.PLLQCLKFreq_Value=216000000 -RCC.PLLQoutputFreq_Value=216000000 -RCC.PLLSAIPCLKFreq_Value=96000000 -RCC.PLLSAIQCLKFreq_Value=96000000 -RCC.PLLSAIRCLKFreq_Value=96000000 -RCC.PLLSAIoutputFreq_Value=96000000 +RCC.MCO2PinFreq_Value=50000000 +RCC.PLLCLKFreq_Value=50000000 +RCC.PLLI2SPCLKFreq_Value=200000000 +RCC.PLLI2SQCLKFreq_Value=200000000 +RCC.PLLI2SRCLKFreq_Value=200000000 +RCC.PLLI2SRoutputFreq_Value=200000000 +RCC.PLLM=12 +RCC.PLLN=96 +RCC.PLLP=RCC_PLLP_DIV4 +RCC.PLLQCLKFreq_Value=100000000 +RCC.PLLQoutputFreq_Value=100000000 +RCC.PLLSAIPCLKFreq_Value=200000000 +RCC.PLLSAIQCLKFreq_Value=200000000 +RCC.PLLSAIRCLKFreq_Value=200000000 +RCC.PLLSAIoutputFreq_Value=200000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.RNGFreq_Value=216000000 -RCC.SAI1Freq_Value=96000000 -RCC.SAI2Freq_Value=96000000 -RCC.SDMMCFreq_Value=216000000 -RCC.SPDIFRXFreq_Value=96000000 -RCC.SYSCLKFreq_VALUE=216000000 +RCC.RNGFreq_Value=100000000 +RCC.SAI1Freq_Value=200000000 +RCC.SAI2Freq_Value=200000000 +RCC.SDMMCFreq_Value=50000000 +RCC.SPDIFRXFreq_Value=200000000 +RCC.SYSCLKFreq_VALUE=50000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=54000000 -RCC.UART5Freq_Value=54000000 -RCC.UART7Freq_Value=54000000 -RCC.UART8Freq_Value=54000000 -RCC.USART1Freq_Value=108000000 -RCC.USART2Freq_Value=54000000 -RCC.USART3Freq_Value=54000000 -RCC.USART6Freq_Value=108000000 -RCC.USBFreq_Value=216000000 -RCC.VCOI2SOutputFreq_Value=192000000 -RCC.VCOInputFreq_Value=1000000 -RCC.VCOOutputFreq_Value=432000000 -RCC.VCOSAIOutputFreq_Value=192000000 +RCC.UART4Freq_Value=12500000 +RCC.UART5Freq_Value=12500000 +RCC.UART7Freq_Value=12500000 +RCC.UART8Freq_Value=12500000 +RCC.USART1Freq_Value=25000000 +RCC.USART2Freq_Value=12500000 +RCC.USART3Freq_Value=12500000 +RCC.USART6Freq_Value=25000000 +RCC.USBFreq_Value=100000000 +RCC.VCOI2SOutputFreq_Value=400000000 +RCC.VCOInputFreq_Value=2083333.3333333333 +RCC.VCOOutputFreq_Value=200000000 +RCC.VCOSAIOutputFreq_Value=400000000 +SH.FMC_A0.0=FMC_A0,11b-sda1 +SH.FMC_A0.ConfNb=1 +SH.FMC_A1.0=FMC_A1,11b-sda1 +SH.FMC_A1.ConfNb=1 +SH.FMC_A10.0=FMC_A10,11b-sda1 +SH.FMC_A10.ConfNb=1 +SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1 +SH.FMC_A14_BA0.ConfNb=1 +SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1 +SH.FMC_A15_BA1.ConfNb=1 +SH.FMC_A2.0=FMC_A2,11b-sda1 +SH.FMC_A2.ConfNb=1 +SH.FMC_A3.0=FMC_A3,11b-sda1 +SH.FMC_A3.ConfNb=1 +SH.FMC_A4.0=FMC_A4,11b-sda1 +SH.FMC_A4.ConfNb=1 +SH.FMC_A5.0=FMC_A5,11b-sda1 +SH.FMC_A5.ConfNb=1 +SH.FMC_A6.0=FMC_A6,11b-sda1 +SH.FMC_A6.ConfNb=1 +SH.FMC_A7.0=FMC_A7,11b-sda1 +SH.FMC_A7.ConfNb=1 +SH.FMC_A8.0=FMC_A8,11b-sda1 +SH.FMC_A8.ConfNb=1 +SH.FMC_A9.0=FMC_A9,11b-sda1 +SH.FMC_A9.ConfNb=1 +SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d1 +SH.FMC_D0_DA0.ConfNb=1 +SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d1 +SH.FMC_D10_DA10.ConfNb=1 +SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d1 +SH.FMC_D11_DA11.ConfNb=1 +SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d1 +SH.FMC_D12_DA12.ConfNb=1 +SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d1 +SH.FMC_D13_DA13.ConfNb=1 +SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d1 +SH.FMC_D14_DA14.ConfNb=1 +SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d1 +SH.FMC_D15_DA15.ConfNb=1 +SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d1 +SH.FMC_D1_DA1.ConfNb=1 +SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d1 +SH.FMC_D2_DA2.ConfNb=1 +SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d1 +SH.FMC_D3_DA3.ConfNb=1 +SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d1 +SH.FMC_D4_DA4.ConfNb=1 +SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d1 +SH.FMC_D5_DA5.ConfNb=1 +SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d1 +SH.FMC_D6_DA6.ConfNb=1 +SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d1 +SH.FMC_D7_DA7.ConfNb=1 +SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d1 +SH.FMC_D8_DA8.ConfNb=1 +SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d1 +SH.FMC_D9_DA9.ConfNb=1 +SH.FMC_SDCLK.0=FMC_SDCLK,11b-sda1 +SH.FMC_SDCLK.ConfNb=1 +SH.FMC_SDNCAS.0=FMC_SDNCAS,11b-sda1 +SH.FMC_SDNCAS.ConfNb=1 +SH.FMC_SDNRAS.0=FMC_SDNRAS,11b-sda1 +SH.FMC_SDNRAS.ConfNb=1 +SH.FMC_SDNWE.0=FMC_SDNWE,11b-sda1 +SH.FMC_SDNWE.ConfNb=1 SH.GPXTI8.0=GPIO_EXTI8 SH.GPXTI8.ConfNb=1 USART1.IPParameters=VirtualMode-Asynchronous diff --git a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h index 28e85ccd28..fe64ed3438 100644 --- a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h +++ b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Inc/stm32f7xx_hal_conf.h @@ -58,11 +58,11 @@ /* #define HAL_DAC_MODULE_ENABLED */ /* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ +#define HAL_ETH_MODULE_ENABLED /* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ +#define HAL_SDRAM_MODULE_ENABLED /* #define HAL_HASH_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */ @@ -72,7 +72,7 @@ /* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED /* #define HAL_MMC_MODULE_ENABLED */ /* #define HAL_SPDIFRX_MODULE_ENABLED */ /* #define HAL_SPI_MODULE_ENABLED */ @@ -190,8 +190,8 @@ /* Section 2: PHY configuration section */ -/* DP83848_PHY_ADDRESS Address*/ -#define DP83848_PHY_ADDRESS 0x01U +/* LAN8742A_PHY_ADDRESS Address*/ +#define LAN8742A_PHY_ADDRESS 1 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ #define PHY_RESET_DELAY ((uint32_t)0x000000FFU) /* PHY Configuration delay */ @@ -202,8 +202,8 @@ /* Section 3: Common PHY Registers */ -#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ +#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */ #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ @@ -226,6 +226,9 @@ #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ +#define PHY_ISFR ((uint16_t)0x000BU) /*!< PHY Interrupt Source Flag register Offset */ +#define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */ + /* ################## SPI peripheral configuration ########################## */ /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver diff --git a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c index 144535da4f..0ecb1f55d3 100644 --- a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/main.c @@ -63,10 +63,16 @@ /* Private variables ---------------------------------------------------------*/ +ETH_HandleTypeDef heth; + QSPI_HandleTypeDef hqspi; +SD_HandleTypeDef hsd1; + UART_HandleTypeDef huart1; +SDRAM_HandleTypeDef hsdram1; + /* USER CODE BEGIN PV */ /* USER CODE END PV */ @@ -76,6 +82,9 @@ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART1_UART_Init(void); static void MX_QUADSPI_Init(void); +static void MX_ETH_Init(void); +static void MX_FMC_Init(void); +static void MX_SDMMC1_SD_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -115,6 +124,9 @@ int main(void) MX_GPIO_Init(); MX_USART1_UART_Init(); MX_QUADSPI_Init(); + MX_ETH_Init(); + MX_FMC_Init(); + MX_SDMMC1_SD_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -146,27 +158,21 @@ void SystemClock_Config(void) /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 25; - RCC_OscInitStruct.PLL.PLLN = 432; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLN = 96; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } - /**Activate the Over-Drive mode - */ - if (HAL_PWREx_EnableOverDrive() != HAL_OK) - { - Error_Handler(); - } /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK @@ -176,12 +182,13 @@ void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { Error_Handler(); } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_SDMMC1; PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_SYSCLK; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); @@ -189,6 +196,51 @@ void SystemClock_Config(void) } /** + * @brief ETH Initialization Function + * @param None + * @retval None + */ +static void MX_ETH_Init(void) +{ + + /* USER CODE BEGIN ETH_Init 0 */ + + /* USER CODE END ETH_Init 0 */ + + uint8_t MACAddr[6] ; + + /* USER CODE BEGIN ETH_Init 1 */ + + /* USER CODE END ETH_Init 1 */ + heth.Instance = ETH; + heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE; + heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS; + MACAddr[0] = 0x00; + MACAddr[1] = 0x80; + MACAddr[2] = 0xE1; + MACAddr[3] = 0x00; + MACAddr[4] = 0x00; + MACAddr[5] = 0x00; + heth.Init.MACAddr = &MACAddr[0]; + heth.Init.RxMode = ETH_RXPOLLING_MODE; + heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; + heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII; + + /* USER CODE BEGIN MACADDRESS */ + + /* USER CODE END MACADDRESS */ + + if (HAL_ETH_Init(&heth) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ETH_Init 2 */ + + /* USER CODE END ETH_Init 2 */ + +} + +/** * @brief QUADSPI Initialization Function * @param None * @retval None @@ -224,6 +276,42 @@ static void MX_QUADSPI_Init(void) } /** + * @brief SDMMC1 Initialization Function + * @param None + * @retval None + */ +static void MX_SDMMC1_SD_Init(void) +{ + + /* USER CODE BEGIN SDMMC1_Init 0 */ + + /* USER CODE END SDMMC1_Init 0 */ + + /* USER CODE BEGIN SDMMC1_Init 1 */ + + /* USER CODE END SDMMC1_Init 1 */ + hsd1.Instance = SDMMC1; + hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B; + hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + hsd1.Init.ClockDiv = 0; + if (HAL_SD_Init(&hsd1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SDMMC1_Init 2 */ + + /* USER CODE END SDMMC1_Init 2 */ + +} + +/** * @brief USART1 Initialization Function * @param None * @retval None @@ -258,6 +346,41 @@ static void MX_USART1_UART_Init(void) } +/* FMC initialization function */ +static void MX_FMC_Init(void) +{ + FMC_SDRAM_TimingTypeDef SdramTiming; + + /** Perform the SDRAM1 memory initialization sequence + */ + hsdram1.Instance = FMC_SDRAM_DEVICE; + /* hsdram1.Init */ + hsdram1.Init.SDBank = FMC_SDRAM_BANK1; + hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8; + hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_11; + hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16; + hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4; + hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_1; + hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE; + hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE; + hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE; + hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0; + /* SdramTiming */ + SdramTiming.LoadToActiveDelay = 16; + SdramTiming.ExitSelfRefreshDelay = 16; + SdramTiming.SelfRefreshTime = 16; + SdramTiming.RowCycleDelay = 16; + SdramTiming.WriteRecoveryTime = 16; + SdramTiming.RPDelay = 16; + SdramTiming.RCDDelay = 16; + + if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK) + { + Error_Handler( ); + } + +} + /** * @brief GPIO Initialization Function * @param None @@ -269,13 +392,15 @@ static void MX_GPIO_Init(void) /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOK_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOJ_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); /*Configure GPIO pin : PK1 */ GPIO_InitStruct.Pin = GPIO_PIN_1; diff --git a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c index b6df21aa43..b6a47aca69 100644 --- a/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c +++ b/bsp/stm32/stm32f746-st-disco/board/CubeMX_Config/Src/stm32f7xx_hal_msp.c @@ -98,6 +98,108 @@ void HAL_MspInit(void) } /** +* @brief ETH MSP Initialization +* This function configures the hardware resources used in this example +* @param heth: ETH handle pointer +* @retval None +*/ +void HAL_ETH_MspInit(ETH_HandleTypeDef* heth) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(heth->Instance==ETH) + { + /* USER CODE BEGIN ETH_MspInit 0 */ + + /* USER CODE END ETH_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ETH_CLK_ENABLE(); + + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**ETH GPIO Configuration + PG14 ------> ETH_TXD1 + PG13 ------> ETH_TXD0 + PG11 ------> ETH_TX_EN + PC1 ------> ETH_MDC + PA1 ------> ETH_REF_CLK + PC4 ------> ETH_RXD0 + PA2 ------> ETH_MDIO + PC5 ------> ETH_RXD1 + PA7 ------> ETH_CRS_DV + */ + GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF11_ETH; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF11_ETH; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF11_ETH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN ETH_MspInit 1 */ + + /* USER CODE END ETH_MspInit 1 */ + } + +} + +/** +* @brief ETH MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param heth: ETH handle pointer +* @retval None +*/ + +void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth) +{ + + if(heth->Instance==ETH) + { + /* USER CODE BEGIN ETH_MspDeInit 0 */ + + /* USER CODE END ETH_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ETH_CLK_DISABLE(); + + /**ETH GPIO Configuration + PG14 ------> ETH_TXD1 + PG13 ------> ETH_TXD0 + PG11 ------> ETH_TX_EN + PC1 ------> ETH_MDC + PA1 ------> ETH_REF_CLK + PC4 ------> ETH_RXD0 + PA2 ------> ETH_MDIO + PC5 ------> ETH_RXD1 + PA7 ------> ETH_CRS_DV + */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14|GPIO_PIN_13|GPIO_PIN_11); + + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5); + + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7); + + /* USER CODE BEGIN ETH_MspDeInit 1 */ + + /* USER CODE END ETH_MspDeInit 1 */ + } + +} + +/** * @brief QSPI MSP Initialization * This function configures the hardware resources used in this example * @param hqspi: QSPI handle pointer @@ -201,6 +303,94 @@ void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi) } /** +* @brief SD MSP Initialization +* This function configures the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ +void HAL_SD_MspInit(SD_HandleTypeDef* hsd) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hsd->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspInit 0 */ + + /* USER CODE END SDMMC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SDMMC1_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**SDMMC1 GPIO Configuration + PC12 ------> SDMMC1_CK + PC11 ------> SDMMC1_D3 + PC10 ------> SDMMC1_D2 + PD2 ------> SDMMC1_CMD + PC9 ------> SDMMC1_D1 + PC8 ------> SDMMC1_D0 + */ + GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9 + |GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN SDMMC1_MspInit 1 */ + + /* USER CODE END SDMMC1_MspInit 1 */ + } + +} + +/** +* @brief SD MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ + +void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd) +{ + + if(hsd->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspDeInit 0 */ + + /* USER CODE END SDMMC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SDMMC1_CLK_DISABLE(); + + /**SDMMC1 GPIO Configuration + PC12 ------> SDMMC1_CK + PC11 ------> SDMMC1_D3 + PC10 ------> SDMMC1_D2 + PD2 ------> SDMMC1_CMD + PC9 ------> SDMMC1_D1 + PC8 ------> SDMMC1_D0 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9 + |GPIO_PIN_8); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); + + /* USER CODE BEGIN SDMMC1_MspDeInit 1 */ + + /* USER CODE END SDMMC1_MspDeInit 1 */ + } + +} + +/** * @brief UART MSP Initialization * This function configures the hardware resources used in this example * @param huart: UART handle pointer @@ -278,6 +468,203 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } +static uint32_t FMC_Initialized = 0; + +static void HAL_FMC_MspInit(void){ + /* USER CODE BEGIN FMC_MspInit 0 */ + + /* USER CODE END FMC_MspInit 0 */ + GPIO_InitTypeDef GPIO_InitStruct; + if (FMC_Initialized) { + return; + } + FMC_Initialized = 1; + /* Peripheral clock enable */ + __HAL_RCC_FMC_CLK_ENABLE(); + + /** FMC GPIO Configuration + PG15 ------> FMC_SDNCAS + PD0 ------> FMC_D2 + PD1 ------> FMC_D3 + PF0 ------> FMC_A0 + PF1 ------> FMC_A1 + PF2 ------> FMC_A2 + PF3 ------> FMC_A3 + PG8 ------> FMC_SDCLK + PF4 ------> FMC_A4 + PH5 ------> FMC_SDNWE + PH3 ------> FMC_SDNE0 + PF5 ------> FMC_A5 + PD15 ------> FMC_D1 + PD10 ------> FMC_D15 + PC3 ------> FMC_SDCKE0 + PD14 ------> FMC_D0 + PD9 ------> FMC_D14 + PD8 ------> FMC_D13 + PF12 ------> FMC_A6 + PF15 ------> FMC_A9 + PF13 ------> FMC_A7 + PG0 ------> FMC_A10 + PE8 ------> FMC_D5 + PG5 ------> FMC_BA1 + PG4 ------> FMC_BA0 + PF14 ------> FMC_A8 + PF11 ------> FMC_SDNRAS + PE9 ------> FMC_D6 + PE11 ------> FMC_D8 + PE14 ------> FMC_D11 + PE7 ------> FMC_D4 + PE10 ------> FMC_D7 + PE12 ------> FMC_D9 + PE15 ------> FMC_D12 + PE13 ------> FMC_D10 + */ + GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_0|GPIO_PIN_5 + |GPIO_PIN_4; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_10 + |GPIO_PIN_14|GPIO_PIN_9|GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 + |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_15 + |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14 + |GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_15 + |GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FMC; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* USER CODE BEGIN FMC_MspInit 1 */ + + /* USER CODE END FMC_MspInit 1 */ +} + +void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){ + /* USER CODE BEGIN SDRAM_MspInit 0 */ + + /* USER CODE END SDRAM_MspInit 0 */ + HAL_FMC_MspInit(); + /* USER CODE BEGIN SDRAM_MspInit 1 */ + + /* USER CODE END SDRAM_MspInit 1 */ +} + +static uint32_t FMC_DeInitialized = 0; + +static void HAL_FMC_MspDeInit(void){ + /* USER CODE BEGIN FMC_MspDeInit 0 */ + + /* USER CODE END FMC_MspDeInit 0 */ + if (FMC_DeInitialized) { + return; + } + FMC_DeInitialized = 1; + /* Peripheral clock enable */ + __HAL_RCC_FMC_CLK_DISABLE(); + + /** FMC GPIO Configuration + PG15 ------> FMC_SDNCAS + PD0 ------> FMC_D2 + PD1 ------> FMC_D3 + PF0 ------> FMC_A0 + PF1 ------> FMC_A1 + PF2 ------> FMC_A2 + PF3 ------> FMC_A3 + PG8 ------> FMC_SDCLK + PF4 ------> FMC_A4 + PH5 ------> FMC_SDNWE + PH3 ------> FMC_SDNE0 + PF5 ------> FMC_A5 + PD15 ------> FMC_D1 + PD10 ------> FMC_D15 + PC3 ------> FMC_SDCKE0 + PD14 ------> FMC_D0 + PD9 ------> FMC_D14 + PD8 ------> FMC_D13 + PF12 ------> FMC_A6 + PF15 ------> FMC_A9 + PF13 ------> FMC_A7 + PG0 ------> FMC_A10 + PE8 ------> FMC_D5 + PG5 ------> FMC_BA1 + PG4 ------> FMC_BA0 + PF14 ------> FMC_A8 + PF11 ------> FMC_SDNRAS + PE9 ------> FMC_D6 + PE11 ------> FMC_D8 + PE14 ------> FMC_D11 + PE7 ------> FMC_D4 + PE10 ------> FMC_D7 + PE12 ------> FMC_D9 + PE15 ------> FMC_D12 + PE13 ------> FMC_D10 + */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_15|GPIO_PIN_8|GPIO_PIN_0|GPIO_PIN_5 + |GPIO_PIN_4); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_15|GPIO_PIN_10 + |GPIO_PIN_14|GPIO_PIN_9|GPIO_PIN_8); + + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 + |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_15 + |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_11); + + HAL_GPIO_DeInit(GPIOH, GPIO_PIN_5|GPIO_PIN_3); + + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3); + + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_14 + |GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_12|GPIO_PIN_15 + |GPIO_PIN_13); + + /* USER CODE BEGIN FMC_MspDeInit 1 */ + + /* USER CODE END FMC_MspDeInit 1 */ +} + +void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){ + /* USER CODE BEGIN SDRAM_MspDeInit 0 */ + + /* USER CODE END SDRAM_MspDeInit 0 */ + HAL_FMC_MspDeInit(); + /* USER CODE BEGIN SDRAM_MspDeInit 1 */ + + /* USER CODE END SDRAM_MspDeInit 1 */ +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/bsp/stm32/stm32f746-st-disco/board/Kconfig b/bsp/stm32/stm32f746-st-disco/board/Kconfig index ee295f7c3a..a24568b1cb 100644 --- a/bsp/stm32/stm32f746-st-disco/board/Kconfig +++ b/bsp/stm32/stm32f746-st-disco/board/Kconfig @@ -11,6 +11,11 @@ menu "Onboard Peripheral Drivers" select BSP_USING_UART select BSP_USING_UART1 default y + + config BSP_USING_SDRAM + bool "Enable SDRAM" + default n + config BSP_USING_QSPI_FLASH bool "Enable QSPI FLASH (N25Q256 qspi1)" select BSP_USING_QSPI @@ -18,6 +23,22 @@ menu "Onboard Peripheral Drivers" select RT_SFUD_USING_QSPI default n + config PHY_USING_LAN8720A + bool + + config BSP_USING_ETH + bool "Enable Ethernet" + select RT_USING_LWIP + select PHY_USING_LAN8720A + default n + + config BSP_USING_SDCARD + bool "Enable SDCARD (sdio)" + select BSP_USING_SDIO + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + default n + endmenu menu "On-chip Peripheral Drivers" @@ -40,12 +61,21 @@ menu "On-chip Peripheral Drivers" depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA default n endif + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n config BSP_USING_QSPI bool "Enable QSPI BUS" select RT_USING_QSPI select RT_USING_SPI default n + config BSP_USING_SDIO + bool "Enable SDIO" + select RT_USING_SDIO + select RT_USING_DFS + default n + endmenu menu "Board extended module Drivers" diff --git a/bsp/stm32/stm32f746-st-disco/board/SConscript b/bsp/stm32/stm32f746-st-disco/board/SConscript index fd750ca113..3df28358b1 100644 --- a/bsp/stm32/stm32f746-st-disco/board/SConscript +++ b/bsp/stm32/stm32f746-st-disco/board/SConscript @@ -7,8 +7,16 @@ cwd = GetCurrentDir() src = Glob('board.c') src += Glob('CubeMX_Config/Src/stm32f7xx_hal_msp.c') + +if GetDepend(['BSP_USING_ETH']): + src += Glob('ports/phy_reset.c') + if GetDepend(['BSP_USING_QSPI_FLASH']): src += Glob('ports/drv_qspi_flash.c') + +if GetDepend(['BSP_USING_SDCARD']): + src += Glob('ports/sdcard_port.c') + path = [cwd] path += [cwd + '/CubeMX_Config/Inc'] path += [cwd + '/ports'] diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c index 2739ad02f7..ca7641f866 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2019-01-26 jinsheng first version + * 2019-01-26 jinsheng first version */ #include <board.h> diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h b/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h new file mode 100644 index 0000000000..c886dab45d --- /dev/null +++ b/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-02 jinsheng first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include <rtthread.h> +#include <board.h> + +#define FLASH_SIZE_GRANULARITY_32K (4 * 32 * 1024) +#define FLASH_SIZE_GRANULARITY_128K (128 * 1024) +#define FLASH_SIZE_GRANULARITY_256K (3 * 256 * 1024) + +#define STM32_FLASH_START_ADRESS_32K STM32_FLASH_START_ADRESS +#define STM32_FLASH_START_ADRESS_128K (STM32_FLASH_START_ADRESS_32K + FLASH_SIZE_GRANULARITY_32K) +#define STM32_FLASH_START_ADRESS_256K (STM32_FLASH_START_ADRESS_128K + FLASH_SIZE_GRANULARITY_128K) + +extern const struct fal_flash_dev stm32_onchip_flash_32k; +extern const struct fal_flash_dev stm32_onchip_flash_128k; +extern const struct fal_flash_dev stm32_onchip_flash_256k; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &stm32_onchip_flash_32k, \ + &stm32_onchip_flash_128k, \ + &stm32_onchip_flash_256k, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_32k", 0 , FLASH_SIZE_GRANULARITY_32K , 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_256k", 0 , FLASH_SIZE_GRANULARITY_256K, 0}, \ +} + +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c b/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c new file mode 100644 index 0000000000..3d5f75c7f0 --- /dev/null +++ b/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-02-16 jinsheng first version + */ + +#include <rtthread.h> + +//#define DRV_DEBUG +#define LOG_TAG "drv.phy_reset" +#include <drv_log.h> + +//PHY RESET PIN link system reset + +/* phy reset */ +void phy_reset(void) +{ + +} + diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c new file mode 100644 index 0000000000..143576eb12 --- /dev/null +++ b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-02-17 jinsheng add sdcard port file + */ + +#include <rtthread.h> + +#ifdef BSP_USING_SDCARD + +#include <dfs_elm.h> +#include <dfs_fs.h> +#include <dfs_posix.h> + +#define DBG_SECTION_NAME "app.card" +#define DBG_LEVEL DBG_INFO +#include <rtdbg.h> + +void sd_mount(void *parameter) +{ + while (1) + { + rt_thread_mdelay(500); + if(rt_device_find("sd0") != RT_NULL) + { + if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK) + { + LOG_I("sd card mount to '/'"); + break; + } + else + { + LOG_W("sd card mount to '/' failed!"); + } + } + } +} + +int stm32_sdcard_mount(void) +{ + rt_thread_t tid; + + tid = rt_thread_create("sd_mount", sd_mount, RT_NULL, + 1024, RT_THREAD_PRIORITY_MAX - 2, 20); + if (tid != RT_NULL) + { + rt_thread_startup(tid); + } + else + { + LOG_E("create sd_mount thread err!"); + } + return RT_EOK; +} +INIT_APP_EXPORT(stm32_sdcard_mount); + +#endif /* BSP_USING_SDCARD */ + diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h b/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h new file mode 100644 index 0000000000..4c49e0f217 --- /dev/null +++ b/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-02-16 jinsheng The first version for STM32F7xx + */ + +#ifndef __SDRAM_PORT_H__ +#define __SDRAM_PORT_H__ + +/* parameters for sdram peripheral */ +/* Bank1 or Bank2 */ +#define SDRAM_TARGET_BANK 1 +/* stm32f7 Bank1:0XC0000000 Bank2:0XD0000000 */ +#define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) +/* data width: 8, 16, 32 */ +#define SDRAM_DATA_WIDTH 16 +/* column bit numbers: 8, 9, 10, 11 */ +#define SDRAM_COLUMN_BITS 8 +/* row bit numbers: 11, 12, 13 */ +#define SDRAM_ROW_BITS 12 +/* cas latency clock number: 1, 2, 3 */ +#define SDRAM_CAS_LATENCY 3 +/* read pipe delay: 0, 1, 2 */ +#define SDRAM_RPIPE_DELAY 0 +/* clock divid: 2, 3 */ +#define SDCLOCK_PERIOD 2 +/* refresh rate counter */ +#define SDRAM_REFRESH_COUNT ((uint32_t)0x1000) +#define SDRAM_SIZE ((uint32_t)0x800000) + +/* Timing configuration for MT48LC4M32B2B5-6A */ +/* TMRD: 2 Clock cycles */ +#define LOADTOACTIVEDELAY 2 +/* TXSR: 7x11.90ns */ +#define EXITSELFREFRESHDELAY 7 +/* TRAS: 4x11.90ns */ +#define SELFREFRESHTIME 4 +/* TRC: 7x11.90ns */ +#define ROWCYCLEDELAY 7 +/* TWR: 2 Clock cycles */ +#define WRITERECOVERYTIME 3 +/* TRP: 2x11.90ns */ +#define RPDELAY 2 +/* TRCD: 2x11.90ns */ +#define RCDDELAY 2 + +/* memory mode register */ +#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001) +#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002) +#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004) +#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) +#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) +#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020) +#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030) +#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000) +#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) +#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) + +#endif diff --git a/bsp/stm32/stm32f746-st-disco/project.uvprojx b/bsp/stm32/stm32f746-st-disco/project.uvprojx index 8325fc036c..1bd660ebaa 100644 --- a/bsp/stm32/stm32f746-st-disco/project.uvprojx +++ b/bsp/stm32/stm32f746-st-disco/project.uvprojx @@ -366,7 +366,7 @@ <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> <IncludeLibs /> <IncludeLibsPath /> - <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> + <Misc /> <LinkerInputFile /> <DisabledWarnings /> </LDads> diff --git a/bsp/stm32/stm32f746-st-disco/rtconfig.h b/bsp/stm32/stm32f746-st-disco/rtconfig.h index cc7acbac06..ba66000111 100644 --- a/bsp/stm32/stm32f746-st-disco/rtconfig.h +++ b/bsp/stm32/stm32f746-st-disco/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -38,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x40000 +#define RT_VER_NUM 0x40001 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M7 @@ -78,6 +79,7 @@ #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN /* Using WiFi */ @@ -125,6 +127,9 @@ /* Wiced WiFi */ +/* IoT Cloud */ + + /* security packages */ @@ -146,10 +151,7 @@ /* miscellaneous packages */ -/* sample package */ - - -/* example package: hello */ +/* samples: kernel and components samples */ #define SOC_FAMILY_STM32 #define SOC_SERIES_STM32F7 diff --git a/bsp/stm32/stm32f767-atk-apollo/.config b/bsp/stm32/stm32f767-atk-apollo/.config index 46bbff3a82..18940f0bd4 100644 --- a/bsp/stm32/stm32f767-atk-apollo/.config +++ b/bsp/stm32/stm32f767-atk-apollo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c index 3026357b5c..625cec463d 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c @@ -16,10 +16,7 @@ #include <dfs_fs.h> #include <dfs_posix.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "app.card" -#define DBG_COLOR - #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f767-atk-apollo/rtconfig.h b/bsp/stm32/stm32f767-atk-apollo/rtconfig.h index 23599ade59..40b4703fd7 100644 --- a/bsp/stm32/stm32f767-atk-apollo/rtconfig.h +++ b/bsp/stm32/stm32f767-atk-apollo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f767-fire-challenger/.config b/bsp/stm32/stm32f767-fire-challenger/.config index ef2f4a0c70..4f6f6f6468 100644 --- a/bsp/stm32/stm32f767-fire-challenger/.config +++ b/bsp/stm32/stm32f767-fire-challenger/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c index 035d3357d1..b8db33d0d2 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c @@ -17,10 +17,8 @@ #include <dfs_posix.h> #include "drv_gpio.h" -// #define DBG_ENABLE -#define DBG_SECTION_NAME "app.card" -#define DBG_COLOR +#define DBG_SECTION_NAME "app.card" #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32f767-fire-challenger/rtconfig.h b/bsp/stm32/stm32f767-fire-challenger/rtconfig.h index 16f05af945..405e99cef1 100644 --- a/bsp/stm32/stm32f767-fire-challenger/rtconfig.h +++ b/bsp/stm32/stm32f767-fire-challenger/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32f767-st-nucleo/rtconfig.h b/bsp/stm32/stm32f767-st-nucleo/rtconfig.h index 44fac63085..949da7906c 100644 --- a/bsp/stm32/stm32f767-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32f767-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32g071-st-nucleo/.config b/bsp/stm32/stm32g071-st-nucleo/.config index 1e6c3689a0..4bea393c68 100644 --- a/bsp/stm32/stm32g071-st-nucleo/.config +++ b/bsp/stm32/stm32g071-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32g071-st-nucleo/rtconfig.h b/bsp/stm32/stm32g071-st-nucleo/rtconfig.h index 1a407f8e83..aa14175609 100644 --- a/bsp/stm32/stm32g071-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32g071-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32l053-st-nucleo/.config b/bsp/stm32/stm32l053-st-nucleo/.config index 40e3129afa..be3b800004 100644 --- a/bsp/stm32/stm32l053-st-nucleo/.config +++ b/bsp/stm32/stm32l053-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32l053-st-nucleo/rtconfig.h b/bsp/stm32/stm32l053-st-nucleo/rtconfig.h index 89f211e824..7f3a0e5416 100644 --- a/bsp/stm32/stm32l053-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32l053-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32l432-st-nucleo/.config b/bsp/stm32/stm32l432-st-nucleo/.config index 7b2e09bad1..43dd91cc60 100644 --- a/bsp/stm32/stm32l432-st-nucleo/.config +++ b/bsp/stm32/stm32l432-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32l432-st-nucleo/rtconfig.h b/bsp/stm32/stm32l432-st-nucleo/rtconfig.h index 120d4d4cad..58c4cba2fe 100644 --- a/bsp/stm32/stm32l432-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32l432-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -38,7 +39,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 256 #define RT_CONSOLE_DEVICE_NAME "uart2" -#define RT_VER_NUM 0x40000 +#define RT_VER_NUM 0x40001 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M4 diff --git a/bsp/stm32/stm32l475-atk-pandora/.config b/bsp/stm32/stm32l475-atk-pandora/.config index 630083f09c..06d83718ce 100644 --- a/bsp/stm32/stm32l475-atk-pandora/.config +++ b/bsp/stm32/stm32l475-atk-pandora/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c index 9d40589756..11c66f34b7 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c @@ -18,10 +18,8 @@ #include "drv_spi.h" #include "spi_msd.h" -#define DBG_ENABLE -#define DBG_SECTION_NAME "app.card" -#define DBG_COLOR +#define DBG_SECTION_NAME "app.card" #define DBG_LEVEL DBG_INFO #include <rtdbg.h> diff --git a/bsp/stm32/stm32l475-atk-pandora/rtconfig.h b/bsp/stm32/stm32l475-atk-pandora/rtconfig.h index f138878738..d0c5e24f0e 100644 --- a/bsp/stm32/stm32l475-atk-pandora/rtconfig.h +++ b/bsp/stm32/stm32l475-atk-pandora/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32l476-st-nucleo/.config b/bsp/stm32/stm32l476-st-nucleo/.config index 427cb9a3a7..0731ce4782 100644 --- a/bsp/stm32/stm32l476-st-nucleo/.config +++ b/bsp/stm32/stm32l476-st-nucleo/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32/stm32l476-st-nucleo/rtconfig.h b/bsp/stm32/stm32l476-st-nucleo/rtconfig.h index ac2fd6a542..afeaf369c0 100644 --- a/bsp/stm32/stm32l476-st-nucleo/rtconfig.h +++ b/bsp/stm32/stm32l476-st-nucleo/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32/stm32l496-ali-developer/.config b/bsp/stm32/stm32l496-ali-developer/.config new file mode 100644 index 0000000000..0324c80f42 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/.config @@ -0,0 +1,372 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=256 +CONFIG_RT_CONSOLE_DEVICE_NAME="lpuart1" +CONFIG_RT_VER_NUM=0x40001 +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_CMD_SIZE=80 +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_USING_MSH_DEFAULT=y +CONFIG_FINSH_USING_MSH_ONLY=y +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_MTD is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set + +# +# Using WiFi +# +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# Modbus master and slave stack +# +# CONFIG_RT_USING_MODBUS is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_LOGTRACE is not set +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set + +# +# ARM CMSIS +# +# CONFIG_RT_USING_CMSIS_OS is not set +# CONFIG_RT_USING_RTT_CMSIS is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_WIZNET is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOTKIT is not set +# CONFIG_PKG_USING_NIMBLE is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ADBD is not set + +# +# system packages +# +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set + +# +# peripheral libraries and drivers +# + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set + +# +# miscellaneous packages +# +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L4=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32L496VG=y + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_STLINK_TO_USART=y +# CONFIG_BSP_USING_SDCARD is not set + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_LPUART1=y +CONFIG_BSP_LPUART1_RX_USING_DMA=y +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_I2C is not set +# CONFIG_BSP_USING_SDIO is not set +# CONFIG_BSP_USING_TIM is not set +# CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_ADC1 is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set +# CONFIG_BSP_USING_WDT is not set + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32l496-ali-developer/.gitignore b/bsp/stm32/stm32l496-ali-developer/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32l496-ali-developer/Kconfig b/bsp/stm32/stm32l496-ali-developer/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32l496-ali-developer/README.md b/bsp/stm32/stm32l496-ali-developer/README.md new file mode 100644 index 0000000000..ee3bc7479b --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/README.md @@ -0,0 +1,135 @@ +# STM32L496 Ali Develoeprkit BSP 说明 + +## 简介 + +本文档为 RT-Thread 开发团队为 STM32L496 Ali Developer Kit 提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +Developer Kit STM32L496 是阿里联合[诺行](http://www.notioni.com/)推出的一款基于 ARM Cortex-M4 内核的开发板，最高主频为 80Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32L496 的芯片性能。 + +开发板外观如下图所示： + + + +该开发板常用 **板载资源** 如下： + +- MCU：STM32L496VGT6 ，主频 80MHz，1MB FLASH ，320KB RAM +- 常用外设 + - LED灯：3个 + - 按键：3个，A（PE11），M（PE14），B（PE10） + - 光环境传感器：1个 + - 六轴传感器：1个 + - 磁力计：1个 + - 压力传感器：1个 + - 高性能音频解码芯片：1个 + - 温湿度传感器（SHTC1）：1个 + - TFTLCD 显示屏：1个 + - WIFI 模块（BK7231）：1个 + - 板载 ST LINK V2.1 功能 +- 常用接口：SD 卡接口、USB OTG Micro USB 接口 +- 调试接口，ST-LINK Micro USB 接口 + +开发板更多详细信息请参考阿里 [开发板硬件介绍](https://github.com/alibaba/AliOS-Things/wiki/AliOS-Things-Developer-Kit-Hardware-Guide)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| 板载 ST-LINK 转串口 | 支持 | lpuart1 | +| SD卡 | 支持 | | +| 温湿度传感器 | 暂不支持 |即将支持 | +| 六轴传感器 | 暂不支持 |即将支持 | +| 光环境传感器 | 暂不支持 |即将支持 | +| 音频解码 | 不支持 | | +| TFTLCD | 不支持 | | +| WIFI | 不支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | PA0, PA1... PI15 ---> PIN: 0, 1...144 | +| UART | 支持 | LPUART1,UART2/3 | +| SPI | 支持 | SPI1/2 | +| QSPI | 不支持 | | +| I2C | 支持 | 软件 I2C 2/3/4 | +| TIM | 支持 | TIM15/16/17 | +| ADC | 支持 | ADC1 | +| RTC | 支持 | | +| WDT | 支持 | | +| PWM | 支持 | PWM3 | +| USB Device | 暂不支持 | 即将支持 | +| USB Host | 暂不支持 | 即将支持 | +| **扩展模块** | **支持情况** | **备注** | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，打开电源开关。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用板载 ST-LINK 下载程序，只需一根 USB 线连接开发板，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED 会周期性闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + + +```bash + \ | / +- RT - Thread Operating System + / | \ 3.1.1 build Nov 19 2018 + 2006 - 2018 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 低功耗串口1 的功能，如果需使用 SD 卡等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [guozhanxin](https://github.com/guozhanxin)
\ No newline at end of file diff --git a/bsp/stm32/stm32l496-ali-developer/SConscript b/bsp/stm32/stm32l496-ali-developer/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32l496-ali-developer/SConstruct b/bsp/stm32/stm32l496-ali-developer/SConstruct new file mode 100644 index 0000000000..e1989a9d81 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/SConstruct @@ -0,0 +1,58 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32L4xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32l496-ali-developer/applications/SConscript b/bsp/stm32/stm32l496-ali-developer/applications/SConscript new file mode 100644 index 0000000000..6f66f7ab73 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/applications/SConscript @@ -0,0 +1,12 @@ +import rtconfig +from building import * + +cwd = GetCurrentDir() +CPPPATH = [cwd, str(Dir('#'))] +src = Split(""" +main.c +""") + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32l496-ali-developer/applications/main.c b/bsp/stm32/stm32l496-ali-developer/applications/main.c new file mode 100644 index 0000000000..d4926deb07 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/applications/main.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include <rtthread.h> +#include <rtdevice.h> +#include <board.h> + +/* defined the LED0 pin: PE7 */ +#define LED0_PIN GET_PIN(B, 6) + +int main(void) +{ + int count = 1; + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED0_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED0_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..ded36a1c1d --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/.mxproject @@ -0,0 +1,13 @@ +[PreviousGenFiles] +HeaderPath=E:/rt-thread/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc +HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; +SourcePath=E:/rt-thread/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src +SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l496xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../\Src/system_stm32l4xx.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../\Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;null; +HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; + diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..851bf513a1 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,282 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_3 +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Rank-0\#ChannelRegularConversion=1 +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 +ADC1.master=1 +File.Version=6 +KeepUserPlacement=false +LPUART1.BaudRate=115200 +LPUART1.IPParameters=BaudRate,WordLength +LPUART1.WordLength=UART_WORDLENGTH_8B +Mcu.Family=STM32L4 +Mcu.IP0=ADC1 +Mcu.IP1=IWDG +Mcu.IP10=TIM3 +Mcu.IP11=TIM15 +Mcu.IP12=TIM16 +Mcu.IP13=TIM17 +Mcu.IP14=USART2 +Mcu.IP15=USART3 +Mcu.IP2=LPUART1 +Mcu.IP3=NVIC +Mcu.IP4=RCC +Mcu.IP5=RTC +Mcu.IP6=SDMMC1 +Mcu.IP7=SPI1 +Mcu.IP8=SPI2 +Mcu.IP9=SYS +Mcu.IPNb=16 +Mcu.Name=STM32L496V(E-G)Tx +Mcu.Package=LQFP100 +Mcu.Pin0=PE4 +Mcu.Pin1=PE5 +Mcu.Pin10=PA2 +Mcu.Pin11=PA3 +Mcu.Pin12=PA5 +Mcu.Pin13=PA6 +Mcu.Pin14=PA7 +Mcu.Pin15=PC4 +Mcu.Pin16=PC5 +Mcu.Pin17=PB10 +Mcu.Pin18=PB11 +Mcu.Pin19=PC8 +Mcu.Pin2=PE6 +Mcu.Pin20=PC9 +Mcu.Pin21=PA9 +Mcu.Pin22=PA13 (JTMS/SWDIO) +Mcu.Pin23=PA14 (JTCK/SWCLK) +Mcu.Pin24=PC10 +Mcu.Pin25=PC11 +Mcu.Pin26=PC12 +Mcu.Pin27=PD2 +Mcu.Pin28=PD3 +Mcu.Pin29=VP_IWDG_VS_IWDG +Mcu.Pin3=PC14-OSC32_IN (PC14) +Mcu.Pin30=VP_RTC_VS_RTC_Activate +Mcu.Pin31=VP_SYS_VS_Systick +Mcu.Pin32=VP_TIM15_VS_ClockSourceINT +Mcu.Pin33=VP_TIM16_VS_ClockSourceINT +Mcu.Pin34=VP_TIM17_VS_ClockSourceINT +Mcu.Pin4=PC15-OSC32_OUT (PC15) +Mcu.Pin5=PH0-OSC_IN (PH0) +Mcu.Pin6=PH1-OSC_OUT (PH1) +Mcu.Pin7=PC1 +Mcu.Pin8=PC2 +Mcu.Pin9=PC3 +Mcu.PinsNb=35 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32L496VGTx +MxCube.Version=5.0.1 +MxDb.Version=DB.5.0.1 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false +PA13\ (JTMS/SWDIO).Mode=Serial_Wire +PA13\ (JTMS/SWDIO).Signal=SYS_JTMS-SWDIO +PA14\ (JTCK/SWCLK).Mode=Serial_Wire +PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA5.Locked=true +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI +PA9.Locked=true +PA9.Mode=Full_Duplex_Master +PA9.Signal=SPI2_SCK +PB10.Locked=true +PB10.Mode=Asynchronous +PB10.Signal=LPUART1_RX +PB11.Locked=true +PB11.Mode=Asynchronous +PB11.Signal=LPUART1_TX +PC1.Mode=Full_Duplex_Master +PC1.Signal=SPI2_MOSI +PC10.Mode=SD_4_bits_Wide_bus +PC10.Signal=SDMMC1_D2 +PC11.Mode=SD_4_bits_Wide_bus +PC11.Signal=SDMMC1_D3 +PC12.Mode=SD_4_bits_Wide_bus +PC12.Signal=SDMMC1_CK +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PC2.Locked=true +PC2.Signal=ADCx_IN3 +PC3.Locked=true +PC3.Signal=ADCx_IN4 +PC4.Mode=Asynchronous +PC4.Signal=USART3_TX +PC5.Mode=Asynchronous +PC5.Signal=USART3_RX +PC8.Mode=SD_4_bits_Wide_bus +PC8.Signal=SDMMC1_D0 +PC9.Mode=SD_4_bits_Wide_bus +PC9.Signal=SDMMC1_D1 +PCC.Checker=true +PCC.Line=STM32L4x6 +PCC.MCU=STM32L496V(E-G)Tx +PCC.PartNumber=STM32L496VGTx +PCC.Seq0=0 +PCC.Series=STM32L4 +PCC.Temperature=25 +PCC.Vdd=null +PD2.Mode=SD_4_bits_Wide_bus +PD2.Signal=SDMMC1_CMD +PD3.Locked=true +PD3.Mode=Full_Duplex_Master +PD3.Signal=SPI2_MISO +PE4.Locked=true +PE4.Signal=S_TIM3_CH2 +PE5.Locked=true +PE5.Signal=S_TIM3_CH3 +PE6.Locked=true +PE6.Signal=S_TIM3_CH4 +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32L496VGTx +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.13.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_TIM15_Init-TIM15-false-HAL-true,8-MX_TIM16_Init-TIM16-false-HAL-true,9-MX_RTC_Init-RTC-false-HAL-true,10-MX_TIM17_Init-TIM17-false-HAL-true,11-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,12-MX_IWDG_Init-IWDG-false-HAL-true,13-MX_TIM3_Init-TIM3-false-HAL-true,14-MX_ADC1_Init-ADC1-false-HAL-true,15-MX_SPI2_Init-SPI2-false-HAL-true +RCC.ADCFreq_Value=32000000 +RCC.AHBFreq_Value=80000000 +RCC.APB1Freq_Value=80000000 +RCC.APB1TimFreq_Value=80000000 +RCC.APB2Freq_Value=80000000 +RCC.APB2TimFreq_Value=80000000 +RCC.CortexFreq_Value=80000000 +RCC.DFSDMFreq_Value=80000000 +RCC.FCLKCortexFreq_Value=80000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=80000000 +RCC.HSE_VALUE=8000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=80000000 +RCC.I2C2Freq_Value=80000000 +RCC.I2C3Freq_Value=80000000 +RCC.I2C4Freq_Value=80000000 +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value +RCC.LCDFreq_Value=32768 +RCC.LPTIM1Freq_Value=80000000 +RCC.LPTIM2Freq_Value=80000000 +RCC.LPUART1Freq_Value=80000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=80000000 +RCC.MSI_VALUE=4000000 +RCC.PLLN=40 +RCC.PLLPoutputFreq_Value=80000000 +RCC.PLLQoutputFreq_Value=80000000 +RCC.PLLRCLKFreq_Value=80000000 +RCC.PLLSAI1N=16 +RCC.PLLSAI1PoutputFreq_Value=32000000 +RCC.PLLSAI1QoutputFreq_Value=32000000 +RCC.PLLSAI1RoutputFreq_Value=32000000 +RCC.PLLSAI2PoutputFreq_Value=16000000 +RCC.PLLSAI2RoutputFreq_Value=16000000 +RCC.PWRFreq_Value=80000000 +RCC.RNGFreq_Value=32000000 +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +RCC.RTCFreq_Value=32768 +RCC.SAI1Freq_Value=32000000 +RCC.SAI2Freq_Value=32000000 +RCC.SDMMCFreq_Value=32000000 +RCC.SWPMI1Freq_Value=80000000 +RCC.SYSCLKFreq_VALUE=80000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=80000000 +RCC.UART5Freq_Value=80000000 +RCC.USART1Freq_Value=80000000 +RCC.USART2Freq_Value=80000000 +RCC.USART3Freq_Value=80000000 +RCC.USBFreq_Value=32000000 +RCC.VCOInputFreq_Value=4000000 +RCC.VCOOutputFreq_Value=160000000 +RCC.VCOSAI1OutputFreq_Value=64000000 +RCC.VCOSAI2OutputFreq_Value=32000000 +SH.ADCx_IN3.0=ADC1_IN3,IN3-Single-Ended +SH.ADCx_IN3.ConfNb=1 +SH.ADCx_IN4.0=ADC1_IN4,IN4-Single-Ended +SH.ADCx_IN4.ConfNb=1 +SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2 +SH.S_TIM3_CH2.ConfNb=1 +SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3 +SH.S_TIM3_CH3.ConfNb=1 +SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4 +SH.S_TIM3_CH4.ConfNb=1 +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2 +SPI1.CalculateBaudRate=40.0 MBits/s +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER +SPI2.CalculateBaudRate=40.0 MBits/s +SPI2.Direction=SPI_DIRECTION_2LINES +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate +SPI2.Mode=SPI_MODE_MASTER +SPI2.VirtualType=VM_MASTER +TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 +TIM3.IPParameters=Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4 +USART2.IPParameters=VirtualMode-Asynchronous +USART2.VirtualMode-Asynchronous=VM_ASYNC +USART3.IPParameters=VirtualMode-Asynchronous +USART3.VirtualMode-Asynchronous=VM_ASYNC +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG +VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled +VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM15_VS_ClockSourceINT.Mode=Internal +VP_TIM15_VS_ClockSourceINT.Signal=TIM15_VS_ClockSourceINT +VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT +VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT +board=custom diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..9c54f82425 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,93 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 0000000000..32b040ebda --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,434 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_HAL_CONF_H +#define __STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DFSDM_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +#define HAL_IWDG_MODULE_ENABLED +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +#define HAL_RTC_MODULE_ENABLED +/*#define HAL_SAI_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" + #include "stm32l4xx_hal_rcc_ex.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" + #include "stm32l4xx_hal_dma_ex.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_it.h b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_it.h new file mode 100644 index 0000000000..29156563cb --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Inc/stm32l4xx_it.h @@ -0,0 +1,84 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_IT_H +#define __STM32L4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..a1c38057cd --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/main.c @@ -0,0 +1,811 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc1; + +IWDG_HandleTypeDef hiwdg; + +UART_HandleTypeDef hlpuart1; +UART_HandleTypeDef huart2; +UART_HandleTypeDef huart3; + +RTC_HandleTypeDef hrtc; + +SD_HandleTypeDef hsd1; + +SPI_HandleTypeDef hspi1; +SPI_HandleTypeDef hspi2; + +TIM_HandleTypeDef htim3; +TIM_HandleTypeDef htim15; +TIM_HandleTypeDef htim16; +TIM_HandleTypeDef htim17; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART2_UART_Init(void); +static void MX_USART3_UART_Init(void); +static void MX_LPUART1_UART_Init(void); +static void MX_SPI1_Init(void); +static void MX_TIM15_Init(void); +static void MX_TIM16_Init(void); +static void MX_RTC_Init(void); +static void MX_TIM17_Init(void); +static void MX_SDMMC1_SD_Init(void); +static void MX_IWDG_Init(void); +static void MX_TIM3_Init(void); +static void MX_ADC1_Init(void); +static void MX_SPI2_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART2_UART_Init(); + MX_USART3_UART_Init(); + MX_LPUART1_UART_Init(); + MX_SPI1_Init(); + MX_TIM15_Init(); + MX_TIM16_Init(); + MX_RTC_Init(); + MX_TIM17_Init(); + MX_SDMMC1_SD_Init(); + MX_IWDG_Init(); + MX_TIM3_Init(); + MX_ADC1_Init(); + MX_SPI2_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /**Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE + |RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_LPUART1 + |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 16; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief ADC1 Initialization Function + * @param None + * @retval None + */ +static void MX_ADC1_Init(void) +{ + + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + ADC_MultiModeTypeDef multimode = {0}; + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + /**Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc1.Init.Resolution = ADC_RESOLUTION_12B; + hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc1.Init.LowPowerAutoWait = DISABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.NbrOfConversion = 1; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc1.Init.DMAContinuousRequests = DISABLE; + hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc1.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc1) != HAL_OK) + { + Error_Handler(); + } + /**Configure the ADC multi-mode + */ + multimode.Mode = ADC_MODE_INDEPENDENT; + if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) + { + Error_Handler(); + } + /**Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ + +} + +/** + * @brief IWDG Initialization Function + * @param None + * @retval None + */ +static void MX_IWDG_Init(void) +{ + + /* USER CODE BEGIN IWDG_Init 0 */ + + /* USER CODE END IWDG_Init 0 */ + + /* USER CODE BEGIN IWDG_Init 1 */ + + /* USER CODE END IWDG_Init 1 */ + hiwdg.Instance = IWDG; + hiwdg.Init.Prescaler = IWDG_PRESCALER_4; + hiwdg.Init.Window = 4095; + hiwdg.Init.Reload = 4095; + if (HAL_IWDG_Init(&hiwdg) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN IWDG_Init 2 */ + + /* USER CODE END IWDG_Init 2 */ + +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 115200; + hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ + +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART2_Init 2 */ + + /* USER CODE END USART2_Init 2 */ + +} + +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) +{ + + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ + +} + +/** + * @brief RTC Initialization Function + * @param None + * @retval None + */ +static void MX_RTC_Init(void) +{ + + /* USER CODE BEGIN RTC_Init 0 */ + + /* USER CODE END RTC_Init 0 */ + + /* USER CODE BEGIN RTC_Init 1 */ + + /* USER CODE END RTC_Init 1 */ + /**Initialize RTC Only + */ + hrtc.Instance = RTC; + hrtc.Init.HourFormat = RTC_HOURFORMAT_24; + hrtc.Init.AsynchPrediv = 127; + hrtc.Init.SynchPrediv = 255; + hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; + hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; + hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; + hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; + if (HAL_RTC_Init(&hrtc) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN RTC_Init 2 */ + + /* USER CODE END RTC_Init 2 */ + +} + +/** + * @brief SDMMC1 Initialization Function + * @param None + * @retval None + */ +static void MX_SDMMC1_SD_Init(void) +{ + + /* USER CODE BEGIN SDMMC1_Init 0 */ + + /* USER CODE END SDMMC1_Init 0 */ + + /* USER CODE BEGIN SDMMC1_Init 1 */ + + /* USER CODE END SDMMC1_Init 1 */ + hsd1.Instance = SDMMC1; + hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B; + hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + hsd1.Init.ClockDiv = 0; + if (HAL_SD_Init(&hsd1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SDMMC1_Init 2 */ + + /* USER CODE END SDMMC1_Init 2 */ + +} + +/** + * @brief SPI1 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI1_Init(void) +{ + + /* USER CODE BEGIN SPI1_Init 0 */ + + /* USER CODE END SPI1_Init 0 */ + + /* USER CODE BEGIN SPI1_Init 1 */ + + /* USER CODE END SPI1_Init 1 */ + /* SPI1 parameter configuration*/ + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_4BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 7; + hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI1_Init 2 */ + + /* USER CODE END SPI1_Init 2 */ + +} + +/** + * @brief SPI2 Initialization Function + * @param None + * @retval None + */ +static void MX_SPI2_Init(void) +{ + + /* USER CODE BEGIN SPI2_Init 0 */ + + /* USER CODE END SPI2_Init 0 */ + + /* USER CODE BEGIN SPI2_Init 1 */ + + /* USER CODE END SPI2_Init 1 */ + /* SPI2 parameter configuration*/ + hspi2.Instance = SPI2; + hspi2.Init.Mode = SPI_MODE_MASTER; + hspi2.Init.Direction = SPI_DIRECTION_2LINES; + hspi2.Init.DataSize = SPI_DATASIZE_4BIT; + hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi2.Init.NSS = SPI_NSS_SOFT; + hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi2.Init.CRCPolynomial = 7; + hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI2_Init 2 */ + + /* USER CODE END SPI2_Init 2 */ + +} + +/** + * @brief TIM3 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM3_Init(void) +{ + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 0; + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + htim3.Init.Period = 0; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ + HAL_TIM_MspPostInit(&htim3); + +} + +/** + * @brief TIM15 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM15_Init(void) +{ + + /* USER CODE BEGIN TIM15_Init 0 */ + + /* USER CODE END TIM15_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + /* USER CODE BEGIN TIM15_Init 1 */ + + /* USER CODE END TIM15_Init 1 */ + htim15.Instance = TIM15; + htim15.Init.Prescaler = 0; + htim15.Init.CounterMode = TIM_COUNTERMODE_UP; + htim15.Init.Period = 0; + htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim15.Init.RepetitionCounter = 0; + htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim15) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim15, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM15_Init 2 */ + + /* USER CODE END TIM15_Init 2 */ + +} + +/** + * @brief TIM16 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM16_Init(void) +{ + + /* USER CODE BEGIN TIM16_Init 0 */ + + /* USER CODE END TIM16_Init 0 */ + + /* USER CODE BEGIN TIM16_Init 1 */ + + /* USER CODE END TIM16_Init 1 */ + htim16.Instance = TIM16; + htim16.Init.Prescaler = 0; + htim16.Init.CounterMode = TIM_COUNTERMODE_UP; + htim16.Init.Period = 0; + htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim16.Init.RepetitionCounter = 0; + htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim16) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM16_Init 2 */ + + /* USER CODE END TIM16_Init 2 */ + +} + +/** + * @brief TIM17 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM17_Init(void) +{ + + /* USER CODE BEGIN TIM17_Init 0 */ + + /* USER CODE END TIM17_Init 0 */ + + /* USER CODE BEGIN TIM17_Init 1 */ + + /* USER CODE END TIM17_Init 1 */ + htim17.Instance = TIM17; + htim17.Init.Prescaler = 0; + htim17.Init.CounterMode = TIM_COUNTERMODE_UP; + htim17.Init.Period = 0; + htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim17.Init.RepetitionCounter = 0; + htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim17) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM17_Init 2 */ + + /* USER CODE END TIM17_Init 2 */ + +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c new file mode 100644 index 0000000000..1b769dd9c6 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,760 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32l4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + /** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief ADC MSP Initialization +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ADC_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**ADC1 GPIO Configuration + PC2 ------> ADC1_IN3 + PC3 ------> ADC1_IN4 + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + } + +} + +/** +* @brief ADC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ + +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspDeInit 0 */ + + /* USER CODE END ADC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ADC_CLK_DISABLE(); + + /**ADC1 GPIO Configuration + PC2 ------> ADC1_IN3 + PC3 ------> ADC1_IN4 + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN ADC1_MspDeInit 1 */ + + /* USER CODE END ADC1_MspDeInit 1 */ + } + +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspInit 0 */ + + /* USER CODE END LPUART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_LPUART1_CLK_ENABLE(); + + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**LPUART1 GPIO Configuration + PB10 ------> LPUART1_RX + PB11 ------> LPUART1_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_MspInit 1 */ + + /* USER CODE END LPUART1_MspInit 1 */ + } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } + else if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspInit 0 */ + + /* USER CODE END USART3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART3_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**USART3 GPIO Configuration + PC4 ------> USART3_TX + PC5 ------> USART3_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN USART3_MspInit 1 */ + + /* USER CODE END USART3_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ + +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspDeInit 0 */ + + /* USER CODE END LPUART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPUART1_CLK_DISABLE(); + + /**LPUART1 GPIO Configuration + PB10 ------> LPUART1_RX + PB11 ------> LPUART1_TX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11); + + /* USER CODE BEGIN LPUART1_MspDeInit 1 */ + + /* USER CODE END LPUART1_MspDeInit 1 */ + } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + else if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspDeInit 0 */ + + /* USER CODE END USART3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART3_CLK_DISABLE(); + + /**USART3 GPIO Configuration + PC4 ------> USART3_TX + PC5 ------> USART3_RX + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5); + + /* USER CODE BEGIN USART3_MspDeInit 1 */ + + /* USER CODE END USART3_MspDeInit 1 */ + } + +} + +/** +* @brief RTC MSP Initialization +* This function configures the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ +void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) +{ + + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN RTC_MspInit 0 */ + + /* USER CODE END RTC_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_RTC_ENABLE(); + /* USER CODE BEGIN RTC_MspInit 1 */ + + /* USER CODE END RTC_MspInit 1 */ + } + +} + +/** +* @brief RTC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hrtc: RTC handle pointer +* @retval None +*/ + +void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) +{ + + if(hrtc->Instance==RTC) + { + /* USER CODE BEGIN RTC_MspDeInit 0 */ + + /* USER CODE END RTC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_RTC_DISABLE(); + /* USER CODE BEGIN RTC_MspDeInit 1 */ + + /* USER CODE END RTC_MspDeInit 1 */ + } + +} + +/** +* @brief SD MSP Initialization +* This function configures the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ +void HAL_SD_MspInit(SD_HandleTypeDef* hsd) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hsd->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspInit 0 */ + + /* USER CODE END SDMMC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SDMMC1_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC9 ------> SDMMC1_D1 + PC10 ------> SDMMC1_D2 + PC11 ------> SDMMC1_D3 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 + |GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN SDMMC1_MspInit 1 */ + + /* USER CODE END SDMMC1_MspInit 1 */ + } + +} + +/** +* @brief SD MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hsd: SD handle pointer +* @retval None +*/ + +void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd) +{ + + if(hsd->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspDeInit 0 */ + + /* USER CODE END SDMMC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SDMMC1_CLK_DISABLE(); + + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC9 ------> SDMMC1_D1 + PC10 ------> SDMMC1_D2 + PC11 ------> SDMMC1_D3 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 + |GPIO_PIN_12); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); + + /* USER CODE BEGIN SDMMC1_MspDeInit 1 */ + + /* USER CODE END SDMMC1_MspDeInit 1 */ + } + +} + +/** +* @brief SPI MSP Initialization +* This function configures the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ +void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } + else if(hspi->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspInit 0 */ + + /* USER CODE END SPI2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_SPI2_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**SPI2 GPIO Configuration + PC1 ------> SPI2_MOSI + PA9 ------> SPI2_SCK + PD3 ------> SPI2_MISO + */ + GPIO_InitStruct.Pin = GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF3_SPI2; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF3_SPI2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI2_MspInit 1 */ + + /* USER CODE END SPI2_MspInit 1 */ + } + +} + +/** +* @brief SPI MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hspi: SPI handle pointer +* @retval None +*/ + +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) +{ + + if(hspi->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } + else if(hspi->Instance==SPI2) + { + /* USER CODE BEGIN SPI2_MspDeInit 0 */ + + /* USER CODE END SPI2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI2_CLK_DISABLE(); + + /**SPI2 GPIO Configuration + PC1 ------> SPI2_MOSI + PA9 ------> SPI2_SCK + PD3 ------> SPI2_MISO + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1); + + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_3); + + /* USER CODE BEGIN SPI2_MspDeInit 1 */ + + /* USER CODE END SPI2_MspDeInit 1 */ + } + +} + +/** +* @brief TIM_PWM MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_pwm: TIM_PWM handle pointer +* @retval None +*/ +void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) +{ + + if(htim_pwm->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspInit 0 */ + + /* USER CODE END TIM3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM3_CLK_ENABLE(); + /* USER CODE BEGIN TIM3_MspInit 1 */ + + /* USER CODE END TIM3_MspInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + + if(htim_base->Instance==TIM15) + { + /* USER CODE BEGIN TIM15_MspInit 0 */ + + /* USER CODE END TIM15_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM15_CLK_ENABLE(); + /* USER CODE BEGIN TIM15_MspInit 1 */ + + /* USER CODE END TIM15_MspInit 1 */ + } + else if(htim_base->Instance==TIM16) + { + /* USER CODE BEGIN TIM16_MspInit 0 */ + + /* USER CODE END TIM16_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM16_CLK_ENABLE(); + /* USER CODE BEGIN TIM16_MspInit 1 */ + + /* USER CODE END TIM16_MspInit 1 */ + } + else if(htim_base->Instance==TIM17) + { + /* USER CODE BEGIN TIM17_MspInit 0 */ + + /* USER CODE END TIM17_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM17_CLK_ENABLE(); + /* USER CODE BEGIN TIM17_MspInit 1 */ + + /* USER CODE END TIM17_MspInit 1 */ + } + +} + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(htim->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspPostInit 0 */ + + /* USER CODE END TIM3_MspPostInit 0 */ + + __HAL_RCC_GPIOE_CLK_ENABLE(); + /**TIM3 GPIO Configuration + PE4 ------> TIM3_CH2 + PE5 ------> TIM3_CH3 + PE6 ------> TIM3_CH4 + */ + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM3_MspPostInit 1 */ + + /* USER CODE END TIM3_MspPostInit 1 */ + } + +} +/** +* @brief TIM_PWM MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_pwm: TIM_PWM handle pointer +* @retval None +*/ + +void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) +{ + + if(htim_pwm->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspDeInit 0 */ + + /* USER CODE END TIM3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM3_CLK_DISABLE(); + /* USER CODE BEGIN TIM3_MspDeInit 1 */ + + /* USER CODE END TIM3_MspDeInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ + +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + + if(htim_base->Instance==TIM15) + { + /* USER CODE BEGIN TIM15_MspDeInit 0 */ + + /* USER CODE END TIM15_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM15_CLK_DISABLE(); + /* USER CODE BEGIN TIM15_MspDeInit 1 */ + + /* USER CODE END TIM15_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM16) + { + /* USER CODE BEGIN TIM16_MspDeInit 0 */ + + /* USER CODE END TIM16_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM16_CLK_DISABLE(); + /* USER CODE BEGIN TIM16_MspDeInit 1 */ + + /* USER CODE END TIM16_MspDeInit 1 */ + } + else if(htim_base->Instance==TIM17) + { + /* USER CODE BEGIN TIM17_MspDeInit 0 */ + + /* USER CODE END TIM17_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM17_CLK_DISABLE(); + /* USER CODE BEGIN TIM17_MspDeInit 1 */ + + /* USER CODE END TIM17_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_it.c b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_it.c new file mode 100644 index 0000000000..ab5c0b7d8e --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/stm32l4xx_it.c @@ -0,0 +1,217 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/system_stm32l4xx.c b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/system_stm32l4xx.c new file mode 100644 index 0000000000..c76fe45ee1 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/CubeMX_Config/Src/system_stm32l4xx.c @@ -0,0 +1,353 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l496-ali-developer/board/Kconfig b/bsp/stm32/stm32l496-ali-developer/board/Kconfig new file mode 100644 index 0000000000..7e565f4534 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/Kconfig @@ -0,0 +1,215 @@ +menu "Hardware Drivers Config" + +config SOC_STM32L496VG + bool + select SOC_SERIES_STM32L4 + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_STLINK_TO_USART + bool "Enable STLINK TO USART (lpuart1)" + select BSP_USING_UART + select BSP_USING_LPUART1 + default y + + config BSP_USING_SDCARD + bool "Enable SDCARD (sdio)" + select BSP_USING_SDIO + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + default n + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_LPUART1 + bool "Enable LPUART1" + default y + config BSP_LPUART1_RX_USING_DMA + bool "Enable LPUART1 RX DMA" + depends on BSP_USING_LPUART1 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART2 + bool "Enable UART2" + default n + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART3 + bool "Enable UART3" + default n + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + config BSP_SPI1_TX_USING_DMA + bool "Enable SPI1 TX DMA" + depends on BSP_USING_SPI1 + default n + config BSP_SPI1_RX_USING_DMA + bool "Enable SPI1 RX DMA" + depends on BSP_USING_SPI1 + select BSP_SPI1_TX_USING_DMA + default n + + config BSP_USING_SPI2 + bool "Enable SPI2 BUS" + default n + config BSP_SPI2_TX_USING_DMA + bool "Enable SPI2 TX DMA" + depends on BSP_USING_SPI2 + default n + config BSP_SPI2_RX_USING_DMA + bool "Enable SPI2 RX DMA" + depends on BSP_USING_SPI2 + select BSP_SPI2_TX_USING_DMA + default n + endif + + menuconfig BSP_USING_I2C + bool "Enable I2C BUS" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C + menuconfig BSP_USING_I2C2 + bool "Enable I2C2 BUS (software simulation)" + default n + if BSP_USING_I2C2 + config BSP_I2C2_SCL_PIN + int "i2c2 scl pin number" + range 1 176 + default 29 + config BSP_I2C2_SDA_PIN + int "I2C2 sda pin number" + range 1 176 + default 30 + endif + + menuconfig BSP_USING_I2C3 + bool "Enable I2C3 BUS (software simulation)" + default n + if BSP_USING_I2C3 + config BSP_I2C3_SCL_PIN + int "i2c3 scl pin number" + range 1 176 + default 32 + config BSP_I2C3_SDA_PIN + int "I2C3 sda pin number" + range 1 176 + default 33 + endif + + menuconfig BSP_USING_I2C4 + bool "Enable I2C4 BUS (software simulation)" + default y + if BSP_USING_I2C4 + config BSP_I2C4_SCL_PIN + int "i2c4 scl pin number" + range 1 176 + default 60 + config BSP_I2C4_SDA_PIN + int "i2c4 sda pin number" + range 1 176 + default 61 + endif + endif + + config BSP_USING_SDIO + bool "Enable sdio" + select RT_USING_SDIO + default n + + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + config BSP_USING_TIM15 + bool "Enable TIM15" + default n + + config BSP_USING_TIM16 + bool "Enable TIM16" + default n + + config BSP_USING_TIM17 + bool "Enable TIM17" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable pwm" + default n + select RT_USING_PWM + if BSP_USING_PWM + menuconfig BSP_USING_PWM3 + bool "Enable timer3 output pwm" + default n + if BSP_USING_PWM3 + config BSP_USING_PWM3_CH2 + bool "Enable PWM3 channel2" + default n + + config BSP_USING_PWM3_CH3 + bool "Enable PWM3 channel3" + default n + + config BSP_USING_PWM3_CH4 + bool "Enable PWM3 channel4" + default n + endif + endif + + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + select RT_USING_ADC + + config BSP_USING_ONCHIP_RTC + bool "Enable RTC" + select RT_USING_RTC + default n + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32l496-ali-developer/board/SConscript b/bsp/stm32/stm32l496-ali-developer/board/SConscript new file mode 100644 index 0000000000..4c26186b46 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/SConscript @@ -0,0 +1,37 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32l4xx_hal_msp.c +''') + +if GetDepend(['BSP_USING_SPI_LCD']): + src += Glob('ports/drv_spi_lcd.c') + +if GetDepend(['BSP_USING_SDCARD']): + src += Glob('ports/sdcard_port.c') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] +path += [cwd + '/ports'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/startup_stm32l496xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/arm/startup_stm32l496xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32L4xx_HAL/CMSIS/Device/ST/STM32L4xx/Source/Templates/iar/startup_stm32l496xx.s'] + +CPPDEFINES = ['STM32L496xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/stm32/stm32l496-ali-developer/board/board.c b/bsp/stm32/stm32l496-ali-developer/board/board.c new file mode 100644 index 0000000000..f9413f8f98 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/board.c @@ -0,0 +1,86 @@ +/* + * File : board.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2009 RT-Thread Develop Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-01-05 Bernard first implementation + */ + +#include <board.h> + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /**Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE + |RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_LPUART1 + |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 16; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32l496-ali-developer/board/board.h b/bsp/stm32/stm32l496-ali-developer/board/board.h new file mode 100644 index 0000000000..bf1b6d2831 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/board.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-5 SummerGift change to new framework + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include <rtthread.h> +#include <stm32l4xx.h> +#include "drv_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_GPIO +#include "drv_gpio.h" + +/* Board Pin definitions */ +#define LED1_PIN GET_PIN(B, 6) +#define LED2_PIN GET_PIN(E, 3) +#define LED3_PIN GET_PIN(D, 15) +#define KEY1_PIN GET_PIN(E, 11) +#define KEY2_PIN GET_PIN(E, 14) +#define KEY3_PIN GET_PIN(E, 10) +#endif /* BSP_USING_GPIO */ + +/* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/ +#define STM32_SRAM_SIZE 320 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (1024 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +#ifdef __CC_ARM +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN ((void *)&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.icf b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.icf new file mode 100644 index 0000000000..bfcc26a0cb --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.icf @@ -0,0 +1,28 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2004FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__ = 0x0000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite, last block CSTACK};
\ No newline at end of file diff --git a/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.lds b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.lds new file mode 100644 index 0000000000..2047b8e166 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.lds @@ -0,0 +1,143 @@ +/* + * linker script for STM32F10x with GNU ld + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 320k /* 320K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.sct b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.sct new file mode 100644 index 0000000000..37a465fb5c --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00100000 { ; load region size_region
+ ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ RW_IRAM1 0x20000000 0x00050000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c b/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c new file mode 100644 index 0000000000..e37a67f4a1 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-27 zylx first version + */ + +#include <board.h> +#include <drv_spi.h> +#include <rtdevice.h> +#include <rthw.h> +#include <finsh.h> + +#ifdef BSP_USING_SPI_LCD + +static int rt_hw_spi_lcd_init(void) +{ + rt_hw_spi_device_attach("spi1", "spi10", GPIOA, GPIO_PIN_4); + + return RT_EOK; +} +INIT_PREV_EXPORT(rt_hw_spi_lcd_init); + +#endif/* BSP_USING_SPI_LCD */ diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h b/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h new file mode 100644 index 0000000000..d7a1db25e9 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-5 SummerGift first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include <rtthread.h> +#include <board.h> + +extern const struct fal_flash_dev stm32_onchip_flash; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &stm32_onchip_flash, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash", 0, 496 * 1024, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash", 496* 1024, 16 * 1024, 0}, \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c new file mode 100644 index 0000000000..54b5af7ed6 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-12-14 balanceTWK add sdcard port file + */ + +#include <rtthread.h> + +#ifdef BSP_USING_SDCARD + +#include <dfs_elm.h> +#include <dfs_fs.h> +#include <dfs_posix.h> + + +#define DBG_SECTION_NAME "app.card" +#define DBG_LEVEL DBG_INFO +#include <rtdbg.h> + +void sd_mount(void *parameter) +{ + while (1) + { + rt_thread_mdelay(500); + if(rt_device_find("sd0") != RT_NULL) + { + if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK) + { + LOG_I("sd card mount to '/'"); + break; + } + else + { + LOG_W("sd card mount to '/' failed!"); + } + } + } +} + +int stm32_sdcard_mount(void) +{ + rt_thread_t tid; + + tid = rt_thread_create("sd_mount", sd_mount, RT_NULL, + 1024, RT_THREAD_PRIORITY_MAX - 2, 20); + if (tid != RT_NULL) + { + rt_thread_startup(tid); + } + else + { + LOG_E("create sd_mount thread err!"); + } + return RT_EOK; +} +INIT_APP_EXPORT(stm32_sdcard_mount); + +#endif /* BSP_USING_SDCARD */ + diff --git a/bsp/stm32/stm32l496-ali-developer/figures/board.png b/bsp/stm32/stm32l496-ali-developer/figures/board.png Binary files differnew file mode 100644 index 0000000000..b82ef78a5d --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/figures/board.png diff --git a/bsp/stm32/stm32l496-ali-developer/project.ewd b/bsp/stm32/stm32l496-ali-developer/project.ewd new file mode 100644 index 0000000000..4b27053590 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/project.ewd @@ -0,0 +1,2834 @@ +<?xml version="1.0" encoding="UTF-8"?> +<project> + <fileVersion>3</fileVersion> + <configuration> + <name>rt-thread</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>29</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32L475VE.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>0</state> + </option> + <option> + <name>OCProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>8.11.3.13977</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32L4xxxE.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + <option> + <name>OCDebuggerExtraOption</name> + <state>1</state> + </option> + <option> + <name>OCAllMTBOptions</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreNrOfCores</name> + <state>1</state> + </option> + <option> + <name>OCMulticoreMaster</name> + <state>0</state> + </option> + <option> + <name>OCMulticorePort</name> + <state>53461</state> + </option> + <option> + <name>OCMulticoreWorkspace</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveProject</name> + <state></state> + </option> + <option> + <name>OCMulticoreSlaveConfiguration</name> + <state></state> + </option> + <option> + <name>OCDownloadExtraImage</name> + <state>1</state> + </option> + <option> + <name>OCAttachSlave</name> + <state>0</state> + </option> + <option> + <name>MassEraseBeforeFlashing</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>CADI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCadiMemory</name> + <state>1</state> + </option> + <option> + <name>Fast Model</name> + <state></state> + </option> + <option> + <name>CCADILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CCADILogFileEditB</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>CMSISDAP_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>4</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>CMSISDAPResetList</name> + <version>1</version> + <state>10</state> + </option> + <option> + <name>CMSISDAPHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>CMSISDAPHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>CMSISDAPDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CMSISDAPInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CMSISDAPBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPRestoreBreakpointsCheck</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPUpdateBreakpointsEdit</name> + <state>_call_main</state> + </option> + <option> + <name>RDICatchReset</name> + <state>0</state> + </option> + <option> + <name>RDICatchUndef</name> + <state>1</state> + </option> + <option> + <name>RDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>RDICatchData</name> + <state>1</state> + </option> + <option> + <name>RDICatchPrefetch</name> + <state>1</state> + </option> + <option> + <name>RDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>RDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CatchMMERR</name> + <state>1</state> + </option> + <option> + <name>CatchNOCPERR</name> + <state>1</state> + </option> + <option> + <name>CatchCHKERR</name> + <state>1</state> + </option> + <option> + <name>CatchSTATERR</name> + <state>1</state> + </option> + <option> + <name>CatchBUSERR</name> + <state>1</state> + </option> + <option> + <name>CatchINTERR</name> + <state>1</state> + </option> + <option> + <name>CatchSFERR</name> + <state>1</state> + </option> + <option> + <name>CatchHARDERR</name> + <state>1</state> + </option> + <option> + <name>CatchDummy</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiCPUEnable</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPMultiCPUNumber</name> + <state>0</state> + </option> + <option> + <name>OCProbeCfgOverride</name> + <state>0</state> + </option> + <option> + <name>OCProbeConfig</name> + <state></state> + </option> + <option> + <name>CMSISDAPProbeConfigRadio</name> + <state>0</state> + </option> + <option> + <name>CMSISDAPSelectedCPUBehaviour</name> + <state>0</state> + </option> + <option> + <name>ICpuName</name> + <state></state> + </option> + <option> + <name>OCJetEmuParams</name> + <state>1</state> + </option> + <option> + <name>CCCMSISDAPUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCCMSISDAPUsbSerialNoSelect</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>_call_main</state> + </option> + </data> + </settings> + <settings> + <name>IJET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>8</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>IjetResetList</name> + <version>1</version> + <state>10</state> + </option> + <option> + <name>IjetHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>IjetHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>IjetPowerFromProbe</name> + <state>1</state> + </option> + <option> + <name>IjetPowerRadio</name> + <state>0</state> + </option> + <option> + <name>IjetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>IjetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>IjetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>IjetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTarget</name> + <state>0</state> + </option> + <option> + <name>IjetScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>IjetIRLength</name> + <state>0</state> + </option> + <option> + <name>IjetJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>IjetProtocolRadio</name> + <state>0</state> + </option> + <option> + <name>IjetSwoPin</name> + <state>0</state> + </option> + <option> + <name>IjetCpuClockEdit</name> + <state></state> + </option> + <option> + <name>IjetSwoPrescalerList</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>IjetBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>IjetRestoreBreakpointsCheck</name> + <state>0</state> + </option> + <option> + <name>IjetUpdateBreakpointsEdit</name> + <state>_call_main</state> + </option> + <option> + <name>RDICatchReset</name> + <state>0</state> + </option> + <option> + <name>RDICatchUndef</name> + <state>1</state> + </option> + <option> + <name>RDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>RDICatchData</name> + <state>1</state> + </option> + <option> + <name>RDICatchPrefetch</name> + <state>1</state> + </option> + <option> + <name>RDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>RDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CatchMMERR</name> + <state>1</state> + </option> + <option> + <name>CatchNOCPERR</name> + <state>1</state> + </option> + <option> + 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<option> + <name>OCJetEmuParams</name> + <state>1</state> + </option> + <option> + <name>IjetPreferETB</name> + <state>1</state> + </option> + <option> + <name>IjetTraceSettingsList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>IjetTraceSizeList</name> + <version>0</version> + <state>4</state> + </option> + <option> + <name>FlashBoardPathSlave</name> + <state>0</state> + </option> + <option> + <name>CCIjetUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCIjetUsbSerialNoSelect</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>16</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>1000</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>1000</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>1</version> + <state>1</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + 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<file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\IARProbe\IarProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> diff --git a/bsp/stm32/stm32l496-ali-developer/project.ewp b/bsp/stm32/stm32l496-ali-developer/project.ewp new file mode 100644 index 0000000000..f3020a145e --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/project.ewp @@ -0,0 +1,2277 @@ +<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32L475VE ST STM32L475VE</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32L475VE ST STM32L475VE</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
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+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
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+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
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+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state />
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state />
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state />
+ <state>STM32L496xx</state>
+ <state>USE_HAL_DRIVER</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
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+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
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+ <name>CCListCMnemonics</name>
+ <state>0</state>
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+ <name>CCListCMessages</name>
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+ <name>CCListAssFile</name>
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+ <name>CCListAssSource</name>
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+ <name>CCEnableRemarks</name>
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+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state />
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+ <option>
+ <name>CCDiagWarning</name>
+ <state />
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+ <name>CCDiagError</name>
+ <state />
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+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
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+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>00000000</state>
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+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
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+ <name>IProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state />
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
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+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
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+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
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+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state />
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state />
+ <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+ <state>$PROJ_DIR$\board\ports</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Include</state>
+ <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc</state>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\applications</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
+ <state>$PROJ_DIR$\board</state>
+ <state>$PROJ_DIR$\board\CubeMX_Config\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers</state>
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+ <name>CCStdIncCheck</name>
+ <state>0</state>
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+ <name>CCCodeSection</name>
+ <state>.text</state>
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+ <name>IProcessorMode2</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptLevel</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
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+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+ <name>CompilerMisraRules04</name>
+ <version>0</version>
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+ <name>CCPosIndRopi</name>
+ <state>0</state>
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+ <name>CCPosIndRwpi</name>
+ <state>0</state>
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+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
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+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
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+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
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+ <name>AEndian</name>
+ <state>1</state>
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+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state />
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state />
+ </option>
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+ <name>AWarnRange2</name>
+ <state />
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state />
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+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
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+ <option>
+ <name>AListing</name>
+ <state>1</state>
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+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
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+ <name>MacExps</name>
+ <state>1</state>
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+ <option>
+ <name>MacExec</name>
+ <state>0</state>
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+ <name>OnlyAssed</name>
+ <state>0</state>
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+ <name>MultiLine</name>
+ <state>0</state>
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+ <name>PageLengthCheck</name>
+ <state>0</state>
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+ <name>PageLength</name>
+ <state>80</state>
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+ <name>TabSpacing</name>
+ <state>8</state>
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+ <name>AXRef</name>
+ <state>0</state>
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+ <name>AXRefDefines</name>
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+ <name>AXRefInternal</name>
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+ <name>AXRefDual</name>
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+ <name>AProcessor</name>
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+ <name>AFpuProcessor</name>
+ <state>1</state>
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+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
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+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
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+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
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+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
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+ <name>AUserIncludes</name>
+ <state />
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+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
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+ <name>AExtraOptionsV2</name>
+ <state />
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+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>../../../rtthread.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions />
+ <cmdline />
+ <hasPrio>0</hasPrio>
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+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild />
+ <postbuild />
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
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+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
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+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>project.out</state>
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+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
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+ <option>
+ <name>IlinkKeepSymbols</name>
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+ <name>IlinkRawBinaryFile</name>
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+ <name>IlinkRawBinarySymbol</name>
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+ <name>IlinkRawBinaryAlign</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
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+ <name>FillerEnd</name>
+ <state>0x0</state>
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+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
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+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
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+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state />
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state />
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state />
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
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+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state />
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+ <option>
+ <name>Output description</name>
+ <state />
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state />
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
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+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
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+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
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+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
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+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state />
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+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>0</state>
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+ <option>
+ <name>OGCMSISPackSelectDevice</name>
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+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
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+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
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+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state />
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state />
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state>STM32L496xx</state>
+ <state>USE_HAL_DRIVER</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
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+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
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+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
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+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
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+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
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+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state />
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+ <option>
+ <name>CCDiagRemark</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state />
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state />
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
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+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>11111110</state>
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+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
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+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state />
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state />
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+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state />
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state />
+ <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+ <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+ <state>$PROJ_DIR$\board\ports</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Include</state>
+ <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include</state>
+ <state>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc</state>
+ <state>$PROJ_DIR$\.</state>
+ <state>$PROJ_DIR$\applications</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers\config</state>
+ <state>$PROJ_DIR$\board</state>
+ <state>$PROJ_DIR$\board\CubeMX_Config\Inc</state>
+ <state>$PROJ_DIR$\..\..\..\include</state>
+ <state>$PROJ_DIR$\..\libraries\HAL_Drivers</state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
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+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
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+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+ <name>CCPosIndRopi</name>
+ <state>0</state>
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+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
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+ <option>
+ <name>IccLang</name>
+ <state>0</state>
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+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
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+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
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+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
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+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state />
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state />
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state />
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state />
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
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+ <option>
+ <name>AListing</name>
+ <state>1</state>
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+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
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+ <option>
+ <name>MacExec</name>
+ <state>0</state>
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+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
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+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
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+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
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+ <option>
+ <name>PageLength</name>
+ <state>80</state>
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+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
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+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
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+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
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+ <file>
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+ <name>finsh</name>
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+ <file>
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+ <name>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</name>
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+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c</name>
+ </file>
+ </group>
+</project>
diff --git a/bsp/stm32/stm32l496-ali-developer/project.eww b/bsp/stm32/stm32l496-ali-developer/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/project.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\project.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/bsp/stm32/stm32l496-ali-developer/project.uvoptx b/bsp/stm32/stm32l496-ali-developer/project.uvoptx new file mode 100644 index 0000000000..2bbb21d2be --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/project.uvoptx @@ -0,0 +1,192 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>18</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ST-LINKIII-KEIL_SWO</Key> + <Name>-U066BFF554952728381123122 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32L475VETx$CMSIS\Flash\STM32L4xx_512.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + <DebugDescription> + <Enable>1</Enable> + <EnableFlashSeq>0</EnableFlashSeq> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> + </TargetOption> + </Target> + + <Group> + <GroupName>Source Group 1</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/stm32/stm32l496-ali-developer/project.uvprojx b/bsp/stm32/stm32l496-ali-developer/project.uvprojx new file mode 100644 index 0000000000..85b3657d98 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/project.uvprojx @@ -0,0 +1,855 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + <SchemaVersion>2.1</SchemaVersion> + <Header>### uVision Project, (C) Keil Software</Header> + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>STM32L496VGTx</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32L4xx_DFP.2.0.0</PackID> + <PackURL>http://www.keil.com/pack</PackURL> + <Cpu>IRAM(0x20000000-0x2004FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu> + <FlashUtilSpec /> + <StartupFile /> + <FlashDriverDll /> + <DeviceId /> + <RegisterFile /> + <MemoryEnv /> + <Cmp /> + <Asm /> + <Linker /> + <OHString /> + <InfinionOptionDll /> + <SLE66CMisc /> + <SLE66AMisc /> + <SLE66LinkerMisc /> + <SFDFile>$$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath /> + <IncludePath /> + <LibPath /> + <RegisterFilePath /> + <DBRegisterFilePath /> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name /> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name /> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name /> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString /> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument /> + <IncludeLibraryModules /> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4107</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2> + <Flash3 /> + <Flash4 /> + <pFcarmOut /> + <pFcarmGrp /> + <pFcArmRoot /> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName /> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <RvdsMve>0</RvdsMve> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x50000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x50000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector /> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls /> + <Define>USE_HAL_DRIVER, STM32L496xx</Define> + <Undefine /> + <IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls /> + <Define /> + <Undefine /> + <IncludePath /> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase /> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs /> + <IncludeLibsPath /> + <Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc> + <LinkerInputFile /> + <DisabledWarnings /> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Kernel</GroupName> + <Files> + <File> + <FileName>clock.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\clock.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>components.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\components.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cpu.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\cpu.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>device.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\device.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>idle.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\idle.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ipc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\ipc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>irq.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\irq.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>kservice.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\kservice.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mem.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>mempool.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\mempool.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>object.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\src\object.c</FilePath> + </File> + </Files> + <Files> + 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<FileName>stm32l4xx_hal_msp.c</FileName> + <FileType>1</FileType> + <FilePath>board\CubeMX_Config\Src\stm32l4xx_hal_msp.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>startup_stm32l496xx.s</FileName> + <FileType>2</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\arm\startup_stm32l496xx.s</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>drv_common.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>cpu</GroupName> + <Files> + <File> + <FileName>backtrace.c</FileName> + <FileType>1</FileType> + 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<FileType>1</FileType> + <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>completion.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\completion.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>dataqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>pipe.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\pipe.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringblk_buf.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>ringbuffer.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>waitqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>workqueue.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>finsh</GroupName> + <Files> + <File> + <FileName>shell.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\shell.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>symbol.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\symbol.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\cmd.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>msh.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>msh_cmd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_cmd.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>msh_file.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\components\finsh\msh_file.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>STM32_HAL</GroupName> + <Files> + <File> + <FileName>system_stm32l4xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_comp.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_cortex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_crc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_crc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_cryp.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_cryp_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_dma_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_exti.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_pwr_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_rcc.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_rcc_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_rng.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_sram.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_gpio.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_uart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_uart_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_usart.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c</FilePath> + </File> + </Files> + <Files> + <File> + <FileName>stm32l4xx_hal_usart_ex.c</FileName> + <FileType>1</FileType> + <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + <RTE> + <apis /> + <components /> + <files /> + </RTE> +</Project> diff --git a/bsp/stm32/stm32l496-ali-developer/rtconfig.h b/bsp/stm32/stm32l496-ali-developer/rtconfig.h new file mode 100644 index 0000000000..d6ce5027bc --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/rtconfig.h @@ -0,0 +1,179 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDEL_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 256 +#define RT_CONSOLE_DEVICE_NAME "lpuart1" +#define RT_VER_NUM 0x40001 +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_USING_DESCRIPTION +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_CMD_SIZE 80 +#define FINSH_USING_MSH +#define FINSH_USING_MSH_DEFAULT +#define FINSH_USING_MSH_ONLY +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using WiFi */ + + +/* Using USB */ + + +/* POSIX layer and C standard library */ + + +/* Network */ + +/* Socket abstraction layer */ + + +/* light weight TCP/IP stack */ + + +/* Modbus master and slave stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* ARM CMSIS */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + + +/* peripheral libraries and drivers */ + +/* sensors drivers */ + + +/* miscellaneous packages */ + + +/* samples: kernel and components samples */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32L4 + +/* Hardware Drivers Config */ + +#define SOC_STM32L496VG + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_STLINK_TO_USART + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_LPUART1 +#define BSP_LPUART1_RX_USING_DMA + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32l496-ali-developer/rtconfig.py b/bsp/stm32/stm32l496-ali-developer/rtconfig.py new file mode 100644 index 0000000000..d632114e2d --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/rtconfig.py @@ -0,0 +1,134 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -std=c99 -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict --scatter "board\linker_scripts\link.sct"' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' diff --git a/bsp/stm32/stm32l496-ali-developer/template.ewp b/bsp/stm32/stm32l496-ali-developer/template.ewp new file mode 100644 index 0000000000..f390ad7bc1 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/template.ewp @@ -0,0 +1,2031 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<project>
+ <fileVersion>3</fileVersion>
+ <configuration>
+ <name>rt-thread</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>ExePath</name>
+ <state>build\iar\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>build\iar\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>build\iar\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>Automatic choice of formatter, without multibyte support.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>STM32L475VE ST STM32L475VE</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>STM32L475VE ST STM32L475VE</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>39</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
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+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
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+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state>Pa050</state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>00000000</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>1</state>
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+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
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+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
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+ <name>CCPosIndRopi</name>
+ <state>0</state>
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+ <name>CCPosIndRwpi</name>
+ <state>0</state>
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+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
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+ <option>
+ <name>IccLang</name>
+ <state>0</state>
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+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
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+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
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+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
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+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.o</state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state>../../../rtthread.bin</state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>project.out</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>$PROJ_DIR$\board\linker_scripts\link.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state>__iar_program_start</state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
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+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Release</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>0</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <version>29</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>ExePath</name>
+ <state>Release\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>Release\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>Release\List</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>6.30.6.53380</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>8.11.3.13977</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGChipSelectEditMenu</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>GenLowLevelInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianModeBE</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGBufferedTerminalOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenStdoutInterface</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralMisraVer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>RTConfigPath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GBECoreSlave</name>
+ <version>25</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGUseCmsis</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGUseCmsisDspLib</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GRuntimeLibThreads</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CoreVariant</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUDeviceSlave</name>
+ <state>Default None</state>
+ </option>
+ <option>
+ <name>FPU2</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NrRegs</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NEON</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GFPUCoreSlave2</name>
+ <version>25</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCMSISPackSelectDevice</name>
+ </option>
+ <option>
+ <name>OgLibHeap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGLibAdditionalLocale</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGPrintfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfVariant</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGScanfMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenLocaleTags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>GenLocaleDisplayOnly</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DSPExtension</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>34</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>CCOptimizationNoSizeConstraints</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>11111110</state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCIncludePath2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCStdIncCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCodeSection</name>
+ <state>.text</state>
+ </option>
+ <option>
+ <name>IProcessorMode2</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptLevel</name>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCOptStrategy</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptLevelSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules98</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraRules04</name>
+ <version>0</version>
+ <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+ </option>
+ <option>
+ <name>CCPosIndRopi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndRwpi</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPosIndNoDynInit</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccLang</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCDialect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccAllowVLA</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccStaticDestr</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccCppInlineSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IccFloatSemantics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptStrategySlave</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCGuardCalls</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccExceptions2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IccRTTI2</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>10</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ALimitErrorsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ALimitErrorsEdit</name>
+ <state>100</state>
+ </option>
+ <option>
+ <name>AIgnoreStdInclude</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AUserIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheckV2</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptionsV2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AsmNoLiteralPool</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>OBJCOPY</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>OOCOutputFormat</name>
+ <version>3</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCOutputOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OOCOutputFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OOCCommandLineProducer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OOCObjCopyEnable</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ <hasPrio>0</hasPrio>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>ILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>20</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IlinkLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkInputFileSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOutputFile</name>
+ <state>###Unitialized###</state>
+ </option>
+ <option>
+ <name>IlinkDebugInfoEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkKeepSymbols</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkRawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkConfigDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkMapFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogInitialization</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogSection</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogVeneer</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile</name>
+ <state>lnk0t.icf</state>
+ </option>
+ <option>
+ <name>IlinkIcfFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkSuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsRem</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkTreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkWarningsAreErrors</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkUseExtraOptions</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkLowLevelInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAutoLibEnable</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkAdditionalLibs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkOverrideProgramEntryLabel</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabelSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkProgramEntryLabel</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>FillerStart</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>FillerEnd</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcInitialValue</name>
+ <state>0x0</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkBE8Slave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkBufferedTerminalOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkStdoutInterfaceSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcFullSize</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIElfToolPostProcess</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogAutoLibSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogRedirSymbols</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkLogUnusedFragments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcReverseByteOrder</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCrcUseAsInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptInline</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsAllow</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptExceptionsForce</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkCmsis</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptMergeDuplSections</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkOptUseVfe</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkOptForceVfe</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackAnalysisEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkStackControlFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkStackCallGraphFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CrcAlgorithm</name>
+ <version>1</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcUnitSize</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkThreadsSlave</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLogCallGraph</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkIcfFile_AltDefault</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IlinkEncInput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IlinkEncOutputBom</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkHeapSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IlinkLocaleSelect</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARCHIVE</name>
+ <archiveVersion>0</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>0</debug>
+ <option>
+ <name>IarchiveInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IarchiveOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IarchiveOutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data />
+ </settings>
+ </configuration>
+</project>
diff --git a/bsp/stm32/stm32l496-ali-developer/template.eww b/bsp/stm32/stm32l496-ali-developer/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/template.eww @@ -0,0 +1,10 @@ +<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\template.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/bsp/stm32/stm32l496-ali-developer/template.uvoptx b/bsp/stm32/stm32l496-ali-developer/template.uvoptx new file mode 100644 index 0000000000..2bbb21d2be --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/template.uvoptx @@ -0,0 +1,192 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj; *.o</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + <nMigrate>0</nMigrate> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>12000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>0</RunSim> + <RunTarget>1</RunTarget> + <RunAbUc>0</RunAbUc> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\build\keil\List\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>18</CpuCode> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <tRtrace>1</tRtrace> + <sRSysVw>1</sRSysVw> + <tRSysVw>1</tRSysVw> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <bEvRecOn>1</bEvRecOn> + <bSchkAxf>0</bSchkAxf> + <bTchkAxf>0</bTchkAxf> + <nTsel>6</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32L4xx_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ST-LINKIII-KEIL_SWO</Key> + <Name>-U066BFF554952728381123122 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32L475VETx$CMSIS\Flash\STM32L4xx_512.FLM)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <Tracepoint> + <THDelay>0</THDelay> + </Tracepoint> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + <bLintAuto>0</bLintAuto> + <bAutoGenD>0</bAutoGenD> + <LntExFlags>0</LntExFlags> + <pMisraName></pMisraName> + <pszMrule></pszMrule> + <pSingCmds></pSingCmds> + <pMultCmds></pMultCmds> + <pMisraNamep></pMisraNamep> + <pszMrulep></pszMrulep> + <pSingCmdsp></pSingCmdsp> + <pMultCmdsp></pMultCmdsp> + <DebugDescription> + <Enable>1</Enable> + <EnableFlashSeq>0</EnableFlashSeq> + <EnableLog>0</EnableLog> + <Protocol>2</Protocol> + <DbgClock>10000000</DbgClock> + </DebugDescription> + </TargetOption> + </Target> + + <Group> + <GroupName>Source Group 1</GroupName> + <tvExp>0</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <cbSel>0</cbSel> + <RteFlg>0</RteFlg> + </Group> + +</ProjectOpt> diff --git a/bsp/stm32/stm32l496-ali-developer/template.uvprojx b/bsp/stm32/stm32l496-ali-developer/template.uvprojx new file mode 100644 index 0000000000..405a18b9c3 --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/template.uvprojx @@ -0,0 +1,394 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> + + <SchemaVersion>2.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>rt-thread</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <uAC6>0</uAC6> + <TargetOption> + <TargetCommonOption> + <Device>STM32L496VGTx</Device> + <Vendor>STMicroelectronics</Vendor> + <PackID>Keil.STM32L4xx_DFP.2.0.0</PackID> + <PackURL>http://www.keil.com/pack</PackURL> + <Cpu>IRAM(0x20000000-0x2004FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile></StartupFile> + <FlashDriverDll></FlashDriverDll> + <DeviceId></DeviceId> + <RegisterFile></RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>$$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd</SFDFile> + <bCustSvd>0</bCustSvd> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath></RegisterFilePath> + <DBRegisterFilePath></DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\build\keil\Obj\</OutputDirectory> + <OutputName>rt-thread</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\build\keil\List\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopB1X>0</nStopB1X> + <nStopB2X>0</nStopB2X> + </BeforeMake> + <AfterMake> + <RunUserProg1>1</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopA1X>0</nStopA1X> + <nStopA2X>0</nStopA2X> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + <ComprImg>1</ComprImg> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-REMAP -MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4107</DriverSelection> + </Flash1> + <bUseTDR>1</bUseTDR> + <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2> + <Flash3></Flash3> + <Flash4></Flash4> + <pFcarmOut></pFcarmOut> + <pFcarmGrp></pFcarmGrp> + <pFcArmRoot></pFcArmRoot> + <FcArmLst>0</FcArmLst> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <RvdsMve>0</RvdsMve> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <nSecure>0</nSecure> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x50000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x50000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>1</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <uSurpInc>0</uSurpInc> + <uC99>1</uC99> + <uGnu>0</uGnu> + <useXO>0</useXO> + <v6Lang>1</v6Lang> + <v6LangP>1</v6LangP> + <vShortEn>1</vShortEn> + <vShortWch>1</vShortWch> + <v6Lto>0</v6Lto> + <v6WtE>0</v6WtE> + <v6Rtti>0</v6Rtti> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <uSurpInc>0</uSurpInc> + <useXO>0</useXO> + <uClangAs>0</uClangAs> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>0</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <pXoBase></pXoBase> + <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>Source Group 1</GroupName> + </Group> + </Groups> + </Target> + </Targets> + + <RTE> + <apis/> + <components/> + <files/> + </RTE> + +</Project> diff --git a/bsp/stm32f0x/rtconfig.h b/bsp/stm32f0x/rtconfig.h index 0a71690b53..6a7aeb1fdf 100644 --- a/bsp/stm32f0x/rtconfig.h +++ b/bsp/stm32f0x/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_DEBUG_INIT 1 #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/stm32f107/.config b/bsp/stm32f107/.config index ec1f16a515..616acba058 100644 --- a/bsp/stm32f107/.config +++ b/bsp/stm32f107/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -20,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -62,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M3=y @@ -188,6 +190,7 @@ CONFIG_RT_USING_LIBC=y # # CONFIG_RT_USING_CMSIS_OS is not set CONFIG_RT_USING_RTT_CMSIS=y +# CONFIG_RT_USING_LWP is not set # # RT-Thread online packages @@ -310,7 +313,6 @@ CONFIG_RT_USING_RTT_CMSIS=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -320,7 +322,6 @@ CONFIG_RT_USING_RTT_CMSIS=y # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set CONFIG_SOC_STM32F1=y # CONFIG_RT_USING_UART1 is not set CONFIG_RT_USING_UART2=y diff --git a/bsp/stm32f107/rtconfig.h b/bsp/stm32f107/rtconfig.h index 3cea36ea71..e7e9c9e5ea 100644 --- a/bsp/stm32f107/rtconfig.h +++ b/bsp/stm32f107/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -39,7 +40,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart2" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 #define ARCH_ARM #define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M3 diff --git a/bsp/stm32f10x-HAL/.config b/bsp/stm32f10x-HAL/.config index 39706cd496..8c6e8d4a8f 100644 --- a/bsp/stm32f10x-HAL/.config +++ b/bsp/stm32f10x-HAL/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/stm32f10x-HAL/rtconfig.h b/bsp/stm32f10x-HAL/rtconfig.h index 84514b603c..1eb6845129 100644 --- a/bsp/stm32f10x-HAL/rtconfig.h +++ b/bsp/stm32f10x-HAL/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32f10x/.config b/bsp/stm32f10x/.config index 7b1a9477ab..35ebac08b4 100644 --- a/bsp/stm32f10x/.config +++ b/bsp/stm32f10x/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/stm32f10x/rtconfig.h b/bsp/stm32f10x/rtconfig.h index e1d38b4667..ea1542aea2 100644 --- a/bsp/stm32f10x/rtconfig.h +++ b/bsp/stm32f10x/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32f20x/.config b/bsp/stm32f20x/.config index d7b8a922cc..3e08e1f717 100644 --- a/bsp/stm32f20x/.config +++ b/bsp/stm32f20x/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/stm32f20x/rtconfig.h b/bsp/stm32f20x/rtconfig.h index 04df5cb236..e976eac230 100644 --- a/bsp/stm32f20x/rtconfig.h +++ b/bsp/stm32f20x/rtconfig.h @@ -12,6 +12,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32f40x/.config b/bsp/stm32f40x/.config index a6a47ac6f3..e6a7bd72cb 100644 --- a/bsp/stm32f40x/.config +++ b/bsp/stm32f40x/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32f40x/rtconfig.h b/bsp/stm32f40x/rtconfig.h index c855f42fad..1c7a4076f6 100644 --- a/bsp/stm32f40x/rtconfig.h +++ b/bsp/stm32f40x/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32f429-apollo/.config b/bsp/stm32f429-apollo/.config index 604b56e5b2..459d9c92a3 100644 --- a/bsp/stm32f429-apollo/.config +++ b/bsp/stm32f429-apollo/.config @@ -20,6 +20,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32f429-apollo/drivers/audio/drv_mic.c b/bsp/stm32f429-apollo/drivers/audio/drv_mic.c index 873f37e9b7..3dab97c60a 100644 --- a/bsp/stm32f429-apollo/drivers/audio/drv_mic.c +++ b/bsp/stm32f429-apollo/drivers/audio/drv_mic.c @@ -18,9 +18,7 @@ #include "drv_wm8978.h" #include <stm32f4xx.h> -#define DBG_ENABLE #define DBG_LEVEL DBG_INFO -#define DBG_COLOR #define DBG_SECTION_NAME "MIC" #include <rtdbg.h> diff --git a/bsp/stm32f429-apollo/drivers/audio/drv_sound.c b/bsp/stm32f429-apollo/drivers/audio/drv_sound.c index 43bbadf412..5bebc01470 100644 --- a/bsp/stm32f429-apollo/drivers/audio/drv_sound.c +++ b/bsp/stm32f429-apollo/drivers/audio/drv_sound.c @@ -19,9 +19,7 @@ #include "drv_wm8978.h" #include <stm32f4xx.h> -#define DBG_ENABLE #define DBG_LEVEL DBG_LOG -#define DBG_COLOR #define DBG_SECTION_NAME "Sound" #include <rtdbg.h> diff --git a/bsp/stm32f429-apollo/rtconfig.h b/bsp/stm32f429-apollo/rtconfig.h index 9c28c2c959..439bf623aa 100644 --- a/bsp/stm32f429-apollo/rtconfig.h +++ b/bsp/stm32f429-apollo/rtconfig.h @@ -18,6 +18,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32f429-disco/.config b/bsp/stm32f429-disco/.config index 1a51abcea1..07c1d6a272 100644 --- a/bsp/stm32f429-disco/.config +++ b/bsp/stm32f429-disco/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32f429-disco/rtconfig.h b/bsp/stm32f429-disco/rtconfig.h index 91dd49c872..9175876eeb 100644 --- a/bsp/stm32f429-disco/rtconfig.h +++ b/bsp/stm32f429-disco/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 1024 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/stm32f4xx-HAL/.config b/bsp/stm32f4xx-HAL/.config index 210efe60dc..50d617be17 100644 --- a/bsp/stm32f4xx-HAL/.config +++ b/bsp/stm32f4xx-HAL/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/stm32f4xx-HAL/rtconfig.h b/bsp/stm32f4xx-HAL/rtconfig.h index e490ee1f31..0c5877724d 100644 --- a/bsp/stm32f4xx-HAL/rtconfig.h +++ b/bsp/stm32f4xx-HAL/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32f7-disco/.config b/bsp/stm32f7-disco/.config index 9cdfcfa368..2d9db8e75d 100644 --- a/bsp/stm32f7-disco/.config +++ b/bsp/stm32f7-disco/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/stm32f7-disco/rtconfig.h b/bsp/stm32f7-disco/rtconfig.h index 5d0a04aad7..98eb060314 100644 --- a/bsp/stm32f7-disco/rtconfig.h +++ b/bsp/stm32f7-disco/rtconfig.h @@ -12,6 +12,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 100 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/stm32h743-nucleo/.config b/bsp/stm32h743-nucleo/.config index 1576a11eff..30867d5aab 100644 --- a/bsp/stm32h743-nucleo/.config +++ b/bsp/stm32h743-nucleo/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32h743-nucleo/rtconfig.h b/bsp/stm32h743-nucleo/rtconfig.h index 7f092e5fa7..4e9e91ff6d 100644 --- a/bsp/stm32h743-nucleo/rtconfig.h +++ b/bsp/stm32h743-nucleo/rtconfig.h @@ -19,6 +19,7 @@ #define IDLE_THREAD_STACK_SIZE 256 /* RT_USING_TIMER_SOFT is not set */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* RT_DEBUG_INIT_CONFIG is not set */ /* RT_DEBUG_THREAD_CONFIG is not set */ /* RT_DEBUG_SCHEDULER_CONFIG is not set */ diff --git a/bsp/stm32l475-iot-disco/rtconfig.h b/bsp/stm32l475-iot-disco/rtconfig.h index f7b00767d2..4cc0d9da9a 100644 --- a/bsp/stm32l475-iot-disco/rtconfig.h +++ b/bsp/stm32l475-iot-disco/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK /* Using Hook */ diff --git a/bsp/stm32l476-nucleo/.config b/bsp/stm32l476-nucleo/.config index 529d8c5fb0..943036d2f2 100644 --- a/bsp/stm32l476-nucleo/.config +++ b/bsp/stm32l476-nucleo/.config @@ -19,6 +19,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/stm32l476-nucleo/rtconfig.h b/bsp/stm32l476-nucleo/rtconfig.h index d1e5fd2e41..a18d036962 100644 --- a/bsp/stm32l476-nucleo/rtconfig.h +++ b/bsp/stm32l476-nucleo/rtconfig.h @@ -16,6 +16,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/swm320-lq100/.config b/bsp/swm320-lq100/.config index 53a718cb81..6e380259b4 100644 --- a/bsp/swm320-lq100/.config +++ b/bsp/swm320-lq100/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -20,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -62,7 +64,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # @@ -301,7 +303,6 @@ CONFIG_RT_USING_PWM=y # CONFIG_PKG_USING_ZLIB is not set # CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # # samples: kernel and components samples @@ -311,7 +312,6 @@ CONFIG_RT_USING_PWM=y # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set CONFIG_SOC_SWM320VET7=y # diff --git a/bsp/swm320-lq100/rtconfig.h b/bsp/swm320-lq100/rtconfig.h index 8543660eab..f62b9f87e9 100644 --- a/bsp/swm320-lq100/rtconfig.h +++ b/bsp/swm320-lq100/rtconfig.h @@ -17,6 +17,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -39,7 +40,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 /* RT-Thread Components */ diff --git a/bsp/tm4c129x/.config b/bsp/tm4c129x/.config index d69bb47aa9..1c373715d4 100644 --- a/bsp/tm4c129x/.config +++ b/bsp/tm4c129x/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -22,6 +23,7 @@ CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -64,7 +66,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x30102 +CONFIG_RT_VER_NUM=0x40000 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # @@ -358,5 +360,28 @@ CONFIG_LWIP_NETIF_LOOPBACK=0 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set + +# +# Privated Packages of RealThread +# +# CONFIG_PKG_USING_CODEC is not set +# CONFIG_PKG_USING_PLAYER is not set +# CONFIG_PKG_USING_PERSIMMON_SRC is not set +# CONFIG_PKG_USING_JS_PERSIMMON is not set +# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set + +# +# Network Utilities +# +# CONFIG_PKG_USING_MDNS is not set +# CONFIG_PKG_USING_UPNP is not set +# CONFIG_PKG_USING_WICED is not set +# CONFIG_PKG_USING_CLOUDSDK is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_POWER_MANAGER is not set +# CONFIG_PKG_USING_RT_OTA is not set +# CONFIG_PKG_USING_RDBD_SRC is not set +# CONFIG_PKG_USING_RTINSIGHT is not set +# CONFIG_PKG_USING_SMARTCONFIG is not set +# CONFIG_PKG_USING_RTX is not set CONFIG_RT_USING_UART0=y diff --git a/bsp/tm4c129x/rtconfig.h b/bsp/tm4c129x/rtconfig.h index 0682cd79f1..6a7a5c804f 100644 --- a/bsp/tm4c129x/rtconfig.h +++ b/bsp/tm4c129x/rtconfig.h @@ -20,6 +20,7 @@ #define RT_TIMER_THREAD_PRIO 4 #define RT_TIMER_THREAD_STACK_SIZE 512 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -42,7 +43,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x30102 +#define RT_VER_NUM 0x40000 /* RT-Thread Components */ @@ -180,6 +181,12 @@ /* samples: kernel and components samples */ + +/* Privated Packages of RealThread */ + + +/* Network Utilities */ + #define RT_USING_UART0 #endif diff --git a/bsp/tms320f28379d/.config b/bsp/tms320f28379d/.config index d62b1e40c8..4d68f71848 100644 --- a/bsp/tms320f28379d/.config +++ b/bsp/tms320f28379d/.config @@ -21,6 +21,7 @@ CONFIG_RT_IDEL_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set diff --git a/bsp/tms320f28379d/rtconfig.h b/bsp/tms320f28379d/rtconfig.h index b037295813..139789a5b2 100644 --- a/bsp/tms320f28379d/rtconfig.h +++ b/bsp/tms320f28379d/rtconfig.h @@ -19,6 +19,7 @@ #define RT_IDEL_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 256 #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ diff --git a/bsp/upd70f3454/rtconfig.h b/bsp/upd70f3454/rtconfig.h index 37188b43c8..894bc5beff 100644 --- a/bsp/upd70f3454/rtconfig.h +++ b/bsp/upd70f3454/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR ///#define SCHEDULER_DEBUG #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/x1000/.config b/bsp/x1000/.config index 9ac579ccd9..9a5600a15e 100644 --- a/bsp/x1000/.config +++ b/bsp/x1000/.config @@ -14,6 +14,7 @@ CONFIG_RT_THREAD_PRIORITY_32=y CONFIG_RT_THREAD_PRIORITY_MAX=32 CONFIG_RT_TICK_PER_SECOND=1000 CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_DEBUG_INIT=0 CONFIG_RT_DEBUG_THREAD=0 diff --git a/bsp/x1000/drivers/mmc/drv_mmc.c b/bsp/x1000/drivers/mmc/drv_mmc.c index c2fa538fbc..d2b0016f4b 100644 --- a/bsp/x1000/drivers/mmc/drv_mmc.c +++ b/bsp/x1000/drivers/mmc/drv_mmc.c @@ -33,12 +33,8 @@ #define DMA_ALIGN (32U) #define PIO_THRESHOLD 64 /* use pio mode if data length < PIO_THRESHOLD */ -#define DEBUG_ENABLE -#define DEBUG_SECTION_NAME "SDIO" -#define DEBUG_LEVEL DBG_INFO -// #define DEBUG_LEVEL DBG_LOG -#define DEBUG_COLOR - +#define DBG_SECTION_NAME "SDIO" +#define DBG_LEVEL DBG_INFO #include <rtdbg.h> /* diff --git a/bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd.c b/bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd.c index 594bba6f6b..51bfb022f5 100644 --- a/bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd.c +++ b/bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd.c @@ -33,14 +33,14 @@ static rt_base_t mtd_gd25_read_id(struct rt_mtd_nor_device *device) return (rt_uint32_t)flash->id; } -static rt_size_t mtd_gd25_read(struct rt_mtd_nor_device *device, rt_off_t position, rt_uint8_t *data, rt_size_t size) +static rt_size_t mtd_gd25_read(struct rt_mtd_nor_device *device, rt_off_t position, rt_uint8_t *data, rt_uint32_t size) { struct sfc_flash *flash = (struct sfc_flash *)device; return sfc_norflash_read(flash,position,data,size); } -static rt_size_t mtd_gd25_write(struct rt_mtd_nor_device *device, rt_off_t position, const rt_uint8_t *data, rt_size_t size) +static rt_size_t mtd_gd25_write(struct rt_mtd_nor_device *device, rt_off_t position, const rt_uint8_t *data, rt_uint32_t size) { struct sfc_flash *flash = (struct sfc_flash *)device; diff --git a/bsp/x1000/drivers/sfc/mtd_nor_partition.c b/bsp/x1000/drivers/sfc/mtd_nor_partition.c index c41201effc..8173979608 100644 --- a/bsp/x1000/drivers/sfc/mtd_nor_partition.c +++ b/bsp/x1000/drivers/sfc/mtd_nor_partition.c @@ -163,7 +163,7 @@ static rt_base_t mtd_part_mtd_read_id(struct rt_mtd_nor_device *dev) return rt_mtd_nor_read_id(mtd_nor); } -static rt_size_t mtd_part_mtd_read(struct rt_mtd_nor_device *dev, rt_off_t offset, rt_uint8_t *buffer, rt_size_t length) +static rt_size_t mtd_part_mtd_read(struct rt_mtd_nor_device *dev, rt_off_t offset, rt_uint8_t *buffer, rt_uint32_t length) { struct rt_mtd_nor_partition *mtd_part; struct rt_mtd_nor_device *mtd_nor; @@ -197,7 +197,7 @@ static rt_size_t mtd_part_mtd_read(struct rt_mtd_nor_device *dev, rt_off_t offse return 0; } -static rt_size_t mtd_part_mtd_write(struct rt_mtd_nor_device *dev, rt_off_t offset, const rt_uint8_t *buffer, rt_size_t length) +static rt_size_t mtd_part_mtd_write(struct rt_mtd_nor_device *dev, rt_off_t offset, const rt_uint8_t *buffer, rt_uint32_t length) { struct rt_mtd_nor_partition *mtd_part; struct rt_mtd_nor_device *mtd_nor; diff --git a/bsp/x1000/rtconfig.h b/bsp/x1000/rtconfig.h index 6babbd0b15..e7c3e5feda 100644 --- a/bsp/x1000/rtconfig.h +++ b/bsp/x1000/rtconfig.h @@ -14,6 +14,7 @@ #define RT_THREAD_PRIORITY_MAX 32 #define RT_TICK_PER_SECOND 1000 #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_USING_OVERFLOW_CHECK #define RT_DEBUG_INIT 0 #define RT_DEBUG_THREAD 0 diff --git a/bsp/x86/rtconfig.h b/bsp/x86/rtconfig.h index 2878f811d0..c4cdac1fdc 100644 --- a/bsp/x86/rtconfig.h +++ b/bsp/x86/rtconfig.h @@ -17,6 +17,7 @@ /* SECTION: RT_DEBUG */ /* Thread Debug */ #define RT_DEBUG +#define RT_DEBUG_COLOR #define RT_DEBUG_MODULE 0 #define RT_USING_OVERFLOW_CHECK diff --git a/bsp/xplorer4330/M0/rtconfig.h b/bsp/xplorer4330/M0/rtconfig.h index ee849028f2..19c70eb642 100644 --- a/bsp/xplorer4330/M0/rtconfig.h +++ b/bsp/xplorer4330/M0/rtconfig.h @@ -22,6 +22,7 @@ //#define RT_USING_MODULE // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_DEBUG_INIT" description="debug init enable" default=0 /> #define RT_DEBUG_INIT 0 // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> diff --git a/bsp/xplorer4330/M4/rtconfig.h b/bsp/xplorer4330/M4/rtconfig.h index ee849028f2..19c70eb642 100644 --- a/bsp/xplorer4330/M4/rtconfig.h +++ b/bsp/xplorer4330/M4/rtconfig.h @@ -22,6 +22,7 @@ //#define RT_USING_MODULE // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_DEBUG_INIT" description="debug init enable" default=0 /> #define RT_DEBUG_INIT 0 // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> diff --git a/bsp/zynq7000/rtconfig.h b/bsp/zynq7000/rtconfig.h index ca304c6ac9..b09fc1ab26 100644 --- a/bsp/zynq7000/rtconfig.h +++ b/bsp/zynq7000/rtconfig.h @@ -20,6 +20,7 @@ #define IDLE_THREAD_STACK_SIZE 512 // <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" > #define RT_DEBUG +#define RT_DEBUG_COLOR // <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" /> // #define RT_THREAD_DEBUG // <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" /> diff --git a/components/cplusplus/crt_init.c b/components/cplusplus/crt_init.c index e67939feeb..3294b51a40 100755 --- a/components/cplusplus/crt_init.c +++ b/components/cplusplus/crt_init.c @@ -13,10 +13,10 @@ #include <rtthread.h> -#ifdef __CC_ARM +#if defined(__CC_ARM) || defined(__CLANG_ARM) extern void $Super$$__cpp_initialize__aeabi_(void); /* we need to change the cpp_initialize order */ -void $Sub$$__cpp_initialize__aeabi_(void) +RT_WEAK void $Sub$$__cpp_initialize__aeabi_(void) { /* empty */ } @@ -34,19 +34,9 @@ RT_WEAK void *__dso_handle = 0; #endif -RT_WEAK -int cplusplus_system_init(void) +RT_WEAK int cplusplus_system_init(void) { -#if defined(__GNUC__) && !defined(__CC_ARM) - typedef void (*pfunc) (); - extern pfunc __ctors_start__[]; - extern pfunc __ctors_end__[]; - pfunc *p; - - for (p = __ctors_start__; p < __ctors_end__; p++) - (*p)(); - -#elif defined(__CC_ARM) +#if defined(__CC_ARM) || defined(__CLANG_ARM) /* If there is no SHT$$INIT_ARRAY, calling * $Super$$__cpp_initialize__aeabi_() will cause fault. At least until Keil5.12 * the problem still exists. So we have to initialize the C++ runtime by ourself. @@ -63,9 +53,16 @@ int cplusplus_system_init(void) PROC *proc = (PROC*)((const char*)base + *base); (*proc)(); } +#elif defined(__GNUC__) + typedef void(*pfunc) (); + extern pfunc __ctors_start__[]; + extern pfunc __ctors_end__[]; + pfunc *p; + + for (p = __ctors_start__; p < __ctors_end__; p++) + (*p)(); #endif return 0; } INIT_COMPONENT_EXPORT(cplusplus_system_init); - diff --git a/components/dfs/include/dfs_private.h b/components/dfs/include/dfs_private.h index e20680d9df..bfc71b3b35 100644 --- a/components/dfs/include/dfs_private.h +++ b/components/dfs/include/dfs_private.h @@ -12,10 +12,8 @@ #include <dfs.h> -// #define DBG_ENABLE #define DBG_SECTION_NAME "DFS" -#define DBG_COLOR -#define DBG_LEVEL DBG_LOG +#define DBG_LEVEL DBG_INFO #include <rtdbg.h> #define NO_WORKING_DIR "system does not support working directory\n" diff --git a/components/dfs/src/dfs_file.c b/components/dfs/src/dfs_file.c index b924b00d3f..b4f115ffc2 100644 --- a/components/dfs/src/dfs_file.c +++ b/components/dfs/src/dfs_file.c @@ -111,7 +111,7 @@ int dfs_file_open(struct dfs_fd *fd, const char *path, int flags) fd->flags |= DFS_F_DIRECTORY; } - LOG_I("open successful"); + LOG_D("open successful"); return 0; } diff --git a/components/drivers/misc/adc.c b/components/drivers/misc/adc.c index 83e789a6e4..b2fd9ba430 100644 --- a/components/drivers/misc/adc.c +++ b/components/drivers/misc/adc.c @@ -15,10 +15,8 @@ #include <string.h> #include <stdlib.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "adc" #define DBG_LEVEL DBG_INFO -#define DBG_COLOR #include <rtdbg.h> static rt_size_t _adc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) diff --git a/components/drivers/sdio/block_dev.c b/components/drivers/sdio/block_dev.c index 23be319fc6..dcfbc0ca7b 100644 --- a/components/drivers/sdio/block_dev.c +++ b/components/drivers/sdio/block_dev.c @@ -13,14 +13,12 @@ #include <drivers/mmcsd_core.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "SDIO" #ifdef RT_SDIO_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif /* RT_SDIO_DEBUG */ -#define DBG_COLOR #include <rtdbg.h> static rt_list_t blk_devices = RT_LIST_OBJECT_INIT(blk_devices); @@ -369,7 +367,7 @@ rt_int32_t rt_mmcsd_blk_probe(struct rt_mmcsd_card *card) return err; } - LOG_I("probe mmcsd block device!"); + LOG_D("probe mmcsd block device!"); /* get the first sector to read partition table */ sector = (rt_uint8_t *)rt_malloc(SECTOR_SIZE); diff --git a/components/drivers/sdio/mmc.c b/components/drivers/sdio/mmc.c index bbf0ff838c..5f9259ef52 100644 --- a/components/drivers/sdio/mmc.c +++ b/components/drivers/sdio/mmc.c @@ -11,14 +11,12 @@ #include <drivers/mmcsd_core.h> #include <drivers/mmc.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "SDIO" #ifdef RT_SDIO_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif /* RT_SDIO_DEBUG */ -#define DBG_COLOR #include <rtdbg.h> static const rt_uint32_t tran_unit[] = diff --git a/components/drivers/sdio/mmcsd_core.c b/components/drivers/sdio/mmcsd_core.c index d1f5978374..1618585f69 100644 --- a/components/drivers/sdio/mmcsd_core.c +++ b/components/drivers/sdio/mmcsd_core.c @@ -14,14 +14,12 @@ #include <drivers/mmc.h> #include <drivers/sdio.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "SDIO" #ifdef RT_SDIO_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif /* RT_SDIO_DEBUG */ -#define DBG_COLOR #include <rtdbg.h> #ifndef RT_MMCSD_STACK_SIZE diff --git a/components/drivers/sdio/sd.c b/components/drivers/sdio/sd.c index 69a4561fb0..f4e925507c 100644 --- a/components/drivers/sdio/sd.c +++ b/components/drivers/sdio/sd.c @@ -11,14 +11,12 @@ #include <drivers/mmcsd_core.h> #include <drivers/sd.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "SDIO" #ifdef RT_SDIO_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif /* RT_SDIO_DEBUG */ -#define DBG_COLOR #include <rtdbg.h> static const rt_uint32_t tran_unit[] = diff --git a/components/drivers/sdio/sdio.c b/components/drivers/sdio/sdio.c index 6045c4ade8..b0516704fd 100644 --- a/components/drivers/sdio/sdio.c +++ b/components/drivers/sdio/sdio.c @@ -12,14 +12,12 @@ #include <drivers/sdio.h> #include <drivers/sd.h> -#define DBG_ENABLE #define DBG_SECTION_NAME "SDIO" #ifdef RT_SDIO_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif /* RT_SDIO_DEBUG */ -#define DBG_COLOR #include <rtdbg.h> #ifndef RT_SDIO_STACK_SIZE diff --git a/components/drivers/sensors/sensor.c b/components/drivers/sensors/sensor.c index 0c21f04b6f..ec1ad98fb6 100644 --- a/components/drivers/sensors/sensor.c +++ b/components/drivers/sensors/sensor.c @@ -10,10 +10,8 @@ #include "sensor.h" -#define DBG_ENABLE #define DBG_LEVEL DBG_INFO #define DBG_SECTION_NAME "sensor" -#define DBG_COLOR #include <rtdbg.h> #include <string.h> @@ -45,6 +43,11 @@ void rt_sensor_cb(rt_sensor_t sen) { return; } + + if (sen->irq_handle != RT_NULL) + { + sen->irq_handle(sen); + } /* The buffer is not empty. Read the data in the buffer first */ if (sen->data_len > 0) diff --git a/components/drivers/sensors/sensor.h b/components/drivers/sensors/sensor.h index fd437e4e09..94650ea886 100644 --- a/components/drivers/sensors/sensor.h +++ b/components/drivers/sensors/sensor.h @@ -68,6 +68,7 @@ extern "C" { #define RT_SENSOR_UNIT_HZ (9) /* Frequency unit: HZ */ #define RT_SENSOR_UNIT_ONE (10) /* Dimensionless quantity unit: 1 */ #define RT_SENSOR_UNIT_BPM (11) /* Heart rate unit: bpm */ +#define RT_SENSOR_UNIT_MM (12) /* Distance unit: mm */ /* Sensor communication interface types */ @@ -131,6 +132,8 @@ struct rt_sensor_config rt_int32_t range; /* sensor range of measurement */ }; +typedef struct rt_sensor_device *rt_sensor_t; + struct rt_sensor_device { struct rt_device parent; /* The standard device */ @@ -144,8 +147,9 @@ struct rt_sensor_device const struct rt_sensor_ops *ops; /* The sensor ops */ struct rt_sensor_module *module; /* The sensor module */ + + rt_err_t (*irq_handle)(rt_sensor_t sensor); /* Called when an interrupt is generated, registered by the driver */ }; -typedef struct rt_sensor_device *rt_sensor_t; struct rt_sensor_module { diff --git a/components/drivers/sensors/sensor_cmd.c b/components/drivers/sensors/sensor_cmd.c index b6dd471988..4658a42722 100644 --- a/components/drivers/sensors/sensor_cmd.c +++ b/components/drivers/sensors/sensor_cmd.c @@ -10,10 +10,8 @@ #include "sensor.h" -#define DBG_ENABLE #define DBG_LEVEL DBG_INFO #define DBG_SECTION_NAME "sensor.cmd" -#define DBG_COLOR #include <rtdbg.h> #include <stdlib.h> @@ -46,6 +44,9 @@ static void sensor_show_data(rt_size_t num, rt_sensor_t sensor, struct rt_sensor case RT_SENSOR_CLASS_STEP: LOG_I("num:%3d, step:%5d, timestamp:%5d", num, sensor_data->data.step, sensor_data->timestamp); break; + case RT_SENSOR_CLASS_PROXIMITY: + LOG_I("num:%3d, distance:%5d, timestamp:%5d", num, sensor_data->data.proximity, sensor_data->timestamp); + break; default: break; } @@ -98,6 +99,12 @@ static void sensor_fifo(int argc, char **argv) return; } sensor = (rt_sensor_t)dev; + + if (rt_device_open(dev, RT_DEVICE_FLAG_FIFO_RX) != RT_EOK) + { + LOG_E("open device failed!"); + return; + } if (sensor_rx_sem == RT_NULL) { @@ -119,11 +126,6 @@ static void sensor_fifo(int argc, char **argv) rt_device_set_rx_indicate(dev, rx_callback); - if (rt_device_open(dev, RT_DEVICE_FLAG_FIFO_RX) != RT_EOK) - { - LOG_E("open device failed!"); - return; - } rt_device_control(dev, RT_SENSOR_CTRL_SET_ODR, (void *)20); } #ifdef FINSH_USING_MSH diff --git a/components/drivers/serial/serial.c b/components/drivers/serial/serial.c index a03e4a719e..13bf54e721 100644 --- a/components/drivers/serial/serial.c +++ b/components/drivers/serial/serial.c @@ -28,10 +28,8 @@ #include <rtthread.h> #include <rtdevice.h> -// #define DEBUG_ENABLE -#define DEBUG_LEVEL DBG_LOG +#define DBG_LEVEL DBG_INFO #define DBG_SECTION_NAME "UART" -#define DEBUG_COLOR #include <rtdbg.h> #ifdef RT_USING_POSIX @@ -882,6 +880,7 @@ static int _get_baudrate(speed_t speed) static void _tc_flush(struct rt_serial_device *serial, int queue) { + rt_base_t level; int ch = -1; struct rt_serial_rx_fifo *rx_fifo = RT_NULL; struct rt_device *device = RT_NULL; @@ -901,10 +900,12 @@ static void _tc_flush(struct rt_serial_device *serial, int queue) if((device->open_flag & RT_DEVICE_FLAG_INT_RX) || (device->open_flag & RT_DEVICE_FLAG_DMA_RX)) { RT_ASSERT(RT_NULL != rx_fifo); + level = rt_hw_interrupt_disable(); rt_memset(rx_fifo->buffer, 0, serial->config.bufsz); rx_fifo->put_index = 0; rx_fifo->get_index = 0; rx_fifo->is_full = RT_FALSE; + rt_hw_interrupt_enable(level); } else { diff --git a/components/drivers/spi/spi_flash_sfud.c b/components/drivers/spi/spi_flash_sfud.c index 4f9b7abd57..7fa7de6ad5 100644 --- a/components/drivers/spi/spi_flash_sfud.c +++ b/components/drivers/spi/spi_flash_sfud.c @@ -46,7 +46,7 @@ static char log_buf[RT_CONSOLEBUF_SIZE]; void sfud_log_debug(const char *file, const long line, const char *format, ...); static rt_err_t rt_sfud_control(rt_device_t dev, int cmd, void *args) { - RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev); switch (cmd) { case RT_DEVICE_CTRL_BLK_GETGEOME: { @@ -93,6 +93,10 @@ static rt_err_t rt_sfud_control(rt_device_t dev, int cmd, void *args) { static rt_size_t rt_sfud_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) { struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (dev->user_data); sfud_flash *sfud_dev = (sfud_flash *) (rtt_dev->user_data); + + RT_ASSERT(dev); + RT_ASSERT(rtt_dev); + RT_ASSERT(sfud_dev); /* change the block device's logic address to physical address */ rt_off_t phy_pos = pos * rtt_dev->geometry.bytes_per_sector; rt_size_t phy_size = size * rtt_dev->geometry.bytes_per_sector; @@ -107,6 +111,10 @@ static rt_size_t rt_sfud_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_si static rt_size_t rt_sfud_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) { struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (dev->user_data); sfud_flash *sfud_dev = (sfud_flash *) (rtt_dev->user_data); + + RT_ASSERT(dev); + RT_ASSERT(rtt_dev); + RT_ASSERT(sfud_dev); /* change the block device's logic address to physical address */ rt_off_t phy_pos = pos * rtt_dev->geometry.bytes_per_sector; rt_size_t phy_size = size * rtt_dev->geometry.bytes_per_sector; @@ -126,6 +134,10 @@ static sfud_err spi_write_read(const sfud_spi *spi, const uint8_t *write_buf, si sfud_err result = SFUD_SUCCESS; sfud_flash *sfud_dev = (sfud_flash *) (spi->user_data); struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (sfud_dev->user_data); + + RT_ASSERT(spi); + RT_ASSERT(sfud_dev); + RT_ASSERT(rtt_dev); #ifdef SFUD_USING_QSPI struct rt_qspi_device *qspi_dev = RT_NULL; #endif @@ -180,7 +192,12 @@ static sfud_err qspi_read(const struct __sfud_spi *spi, uint32_t addr, sfud_qspi sfud_flash *sfud_dev = (sfud_flash *) (spi->user_data); struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (sfud_dev->user_data); struct rt_qspi_device *qspi_dev = (struct rt_qspi_device *) (rtt_dev->rt_spi_device); - + + RT_ASSERT(spi); + RT_ASSERT(sfud_dev); + RT_ASSERT(rtt_dev); + RT_ASSERT(qspi_dev); + /* set message struct */ message.instruction.content = qspi_read_cmd_format->instruction; message.instruction.qspi_lines = qspi_read_cmd_format->instruction_lines; @@ -201,11 +218,11 @@ static sfud_err qspi_read(const struct __sfud_spi *spi, uint32_t addr, sfud_qspi message.parent.cs_release = 1; message.parent.cs_take = 1; message.qspi_data_lines = qspi_read_cmd_format->data_lines; - + if (rt_qspi_transfer_message(qspi_dev, &message) != read_size) { result = SFUD_ERR_TIMEOUT; } - + return result; } #endif @@ -214,6 +231,10 @@ static void spi_lock(const sfud_spi *spi) { sfud_flash *sfud_dev = (sfud_flash *) (spi->user_data); struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (sfud_dev->user_data); + RT_ASSERT(spi); + RT_ASSERT(sfud_dev); + RT_ASSERT(rtt_dev); + rt_mutex_take(&(rtt_dev->lock), RT_WAITING_FOREVER); } @@ -221,6 +242,10 @@ static void spi_unlock(const sfud_spi *spi) { sfud_flash *sfud_dev = (sfud_flash *) (spi->user_data); struct spi_flash_device *rtt_dev = (struct spi_flash_device *) (sfud_dev->user_data); + RT_ASSERT(spi); + RT_ASSERT(sfud_dev); + RT_ASSERT(rtt_dev); + rt_mutex_release(&(rtt_dev->lock)); } @@ -270,6 +295,8 @@ void sfud_log_info(const char *format, ...) { sfud_err sfud_spi_port_init(sfud_flash *flash) { sfud_err result = SFUD_SUCCESS; + RT_ASSERT(flash); + /* port SPI device interface */ flash->spi.wr = spi_write_read; #ifdef SFUD_USING_QSPI @@ -285,7 +312,7 @@ sfud_err sfud_spi_port_init(sfud_flash *flash) { flash->retry.delay = retry_delay_100us; /* 60 seconds timeout */ flash->retry.times = 60 * 10000; - + return result; } @@ -361,7 +388,7 @@ rt_spi_flash_device_t rt_sfud_flash_probe(const char *spi_flash_dev_name, const rt_qspi_configure(qspi_dev, &qspi_cfg); } else -#endif +#endif rt_spi_configure(rtt_dev->rt_spi_device, &cfg); } /* SFUD flash device initialize */ @@ -461,27 +488,46 @@ sfud_flash_t rt_sfud_flash_find(const char *spi_dev_name) rt_spi_flash_device_t rtt_dev = RT_NULL; struct rt_spi_device *rt_spi_device = RT_NULL; sfud_flash_t sfud_dev = RT_NULL; - + rt_spi_device = (struct rt_spi_device *) rt_device_find(spi_dev_name); - if (rt_spi_device == RT_NULL || rt_spi_device->parent.type != RT_Device_Class_SPIDevice) - { + if (rt_spi_device == RT_NULL || rt_spi_device->parent.type != RT_Device_Class_SPIDevice) { rt_kprintf("ERROR: SPI device %s not found!\n", spi_dev_name); - goto error; + goto __error; } - rtt_dev = (rt_spi_flash_device_t)(rt_spi_device->user_data); - if (rtt_dev && rtt_dev->user_data) - { - sfud_dev = (sfud_flash_t)(rtt_dev->user_data); + rtt_dev = (rt_spi_flash_device_t) (rt_spi_device->user_data); + if (rtt_dev && rtt_dev->user_data) { + sfud_dev = (sfud_flash_t) (rtt_dev->user_data); return sfud_dev; + } else { + rt_kprintf("ERROR: SFUD flash device not found!\n"); + goto __error; } - else - { + +__error: + return RT_NULL; +} + +sfud_flash_t rt_sfud_flash_find_by_dev_name(const char *flash_dev_name) +{ + rt_spi_flash_device_t rtt_dev = RT_NULL; + sfud_flash_t sfud_dev = RT_NULL; + + rtt_dev = (rt_spi_flash_device_t) rt_device_find(flash_dev_name); + if (rtt_dev == RT_NULL || rtt_dev->flash_device.type != RT_Device_Class_Block) { + rt_kprintf("ERROR: Flash device %s not found!\n", flash_dev_name); + goto __error; + } + + if (rtt_dev->user_data) { + sfud_dev = (sfud_flash_t) (rtt_dev->user_data); + return sfud_dev; + } else { rt_kprintf("ERROR: SFUD flash device not found!\n"); - goto error; + goto __error; } -error: +__error: return RT_NULL; } @@ -491,6 +537,8 @@ error: static void sf(uint8_t argc, char **argv) { +#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ') +#define HEXDUMP_WIDTH 16 #define CMD_PROBE_INDEX 0 #define CMD_READ_INDEX 1 #define CMD_WRITE_INDEX 2 @@ -501,7 +549,7 @@ static void sf(uint8_t argc, char **argv) { sfud_err result = SFUD_SUCCESS; static const sfud_flash *sfud_dev = NULL; static rt_spi_flash_device_t rtt_dev = NULL, rtt_dev_bak = NULL; - size_t i = 0; + size_t i = 0, j = 0; const char* sf_help_info[] = { [CMD_PROBE_INDEX] = "sf probe [spi_device] - probe and init SPI flash by given 'spi_device'", @@ -528,12 +576,12 @@ static void sf(uint8_t argc, char **argv) { } else { char *spi_dev_name = argv[2]; rtt_dev_bak = rtt_dev; - + /* delete the old SPI flash device */ if(rtt_dev_bak) { rt_sfud_flash_delete(rtt_dev_bak); } - + rtt_dev = rt_sfud_flash_probe("sf_cmd", spi_dev_name); if (!rtt_dev) { return; @@ -557,8 +605,8 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("Usage: %s.\n", sf_help_info[CMD_READ_INDEX]); return; } else { - addr = atol(argv[2]); - size = atol(argv[3]); + addr = strtol(argv[2], NULL, 0); + size = strtol(argv[3], NULL, 0); uint8_t *data = rt_malloc(size); if (data) { result = sfud_read(sfud_dev, addr, size, data); @@ -566,14 +614,24 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("Read the %s flash data success. Start from 0x%08X, size is %ld. The data is:\n", sfud_dev->name, addr, size); rt_kprintf("Offset (h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F\n"); - for (i = 0; i < size; i++) { - if (i % 16 == 0) { - rt_kprintf("[%08X] ", addr + i); + for (i = 0; i < size; i += HEXDUMP_WIDTH) + { + rt_kprintf("[%08X] ", addr + i); + /* dump hex */ + for (j = 0; j < HEXDUMP_WIDTH; j++) { + if (i + j < size) { + rt_kprintf("%02X ", data[i + j]); + } else { + rt_kprintf(" "); + } } - rt_kprintf("%02X ", data[i]); - if (((i + 1) % 16 == 0) || i == size - 1) { - rt_kprintf("\n"); + /* dump char for hex */ + for (j = 0; j < HEXDUMP_WIDTH; j++) { + if (i + j < size) { + rt_kprintf("%c", __is_print(data[i + j]) ? data[i + j] : '.'); + } } + rt_kprintf("\n"); } rt_kprintf("\n"); } @@ -587,12 +645,12 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("Usage: %s.\n", sf_help_info[CMD_WRITE_INDEX]); return; } else { - addr = atol(argv[2]); + addr = strtol(argv[2], NULL, 0); size = argc - 3; uint8_t *data = rt_malloc(size); if (data) { for (i = 0; i < size; i++) { - data[i] = atoi(argv[3 + i]); + data[i] = strtol(argv[3 + i], NULL, 0); } result = sfud_write(sfud_dev, addr, size, data); if (result == SFUD_SUCCESS) { @@ -614,8 +672,8 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("Usage: %s.\n", sf_help_info[CMD_ERASE_INDEX]); return; } else { - addr = atol(argv[2]); - size = atol(argv[3]); + addr = strtol(argv[2], NULL, 0); + size = strtol(argv[3], NULL, 0); result = sfud_erase(sfud_dev, addr, size); if (result == SFUD_SUCCESS) { rt_kprintf("Erase the %s flash data success. Start from 0x%08X, size is %ld.\n", sfud_dev->name, @@ -630,8 +688,8 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("The %s flash status register current value is 0x%02X.\n", sfud_dev->name, status); } } else if (argc == 4) { - bool is_volatile = atoi(argv[2]); - uint8_t status = atoi(argv[3]); + bool is_volatile = strtol(argv[2], NULL, 0); + uint8_t status = strtol(argv[3], NULL, 0); result = sfud_write_status(sfud_dev, is_volatile, status); if (result == SFUD_SUCCESS) { rt_kprintf("Write the %s flash status register to 0x%02X success.\n", sfud_dev->name, status); @@ -696,7 +754,7 @@ static void sf(uint8_t argc, char **argv) { rt_kprintf("Data check ERROR! Please check you flash by other command.\n"); result = SFUD_ERR_READ; } - + if (result != SFUD_SUCCESS) { break; } diff --git a/components/drivers/spi/spi_flash_sfud.h b/components/drivers/spi/spi_flash_sfud.h index af1ed58790..490f2feadb 100644 --- a/components/drivers/spi/spi_flash_sfud.h +++ b/components/drivers/spi/spi_flash_sfud.h @@ -36,7 +36,7 @@ rt_spi_flash_device_t rt_sfud_flash_probe(const char *spi_flash_dev_name, const rt_err_t rt_sfud_flash_delete(rt_spi_flash_device_t spi_flash_dev); /** - * Find sfud flash device + * Find sfud flash device by SPI device name * * @param spi_dev_name using SPI device name * @@ -44,4 +44,13 @@ rt_err_t rt_sfud_flash_delete(rt_spi_flash_device_t spi_flash_dev); */ sfud_flash_t rt_sfud_flash_find(const char *spi_dev_name); +/** + * Find sfud flash device by flash device name + * + * @param flash_dev_name using flash device name + * + * @return sfud flash device if success, otherwise return RT_NULL + */ +sfud_flash_t rt_sfud_flash_find_by_dev_name(const char *flash_dev_name); + #endif /* _SPI_FLASH_SFUD_H_ */ diff --git a/components/drivers/wlan/wlan_cfg.c b/components/drivers/wlan/wlan_cfg.c index 27da9bc24e..00e9dbc83e 100644 --- a/components/drivers/wlan/wlan_cfg.c +++ b/components/drivers/wlan/wlan_cfg.c @@ -11,14 +11,12 @@ #include <rtthread.h> #include <wlan_cfg.h> -#define DBG_ENABLE #ifdef RT_WLAN_CFG_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif #define DBG_SECTION_NAME "WLAN.cfg" -#define DBG_COLOR #include <rtdbg.h> #define WLAN_CFG_LOCK() (rt_mutex_take(&cfg_mutex, RT_WAITING_FOREVER)) diff --git a/components/drivers/wlan/wlan_dev.c b/components/drivers/wlan/wlan_dev.c index eac1d0f975..3f4adf35ad 100644 --- a/components/drivers/wlan/wlan_dev.c +++ b/components/drivers/wlan/wlan_dev.c @@ -13,14 +13,12 @@ #include <wlan_dev.h> #include <wlan_prot.h> -#define DBG_ENABLE #ifdef RT_WLAN_DEV_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif #define DBG_SECTION_NAME "WLAN.dev" -#define DBG_COLOR #include <rtdbg.h> #ifndef RT_DEVICE diff --git a/components/drivers/wlan/wlan_lwip.c b/components/drivers/wlan/wlan_lwip.c index 2f8bcefd0d..052c2afd2e 100644 --- a/components/drivers/wlan/wlan_lwip.c +++ b/components/drivers/wlan/wlan_lwip.c @@ -21,14 +21,12 @@ #include <dhcp_server.h> #endif -#define DBG_ENABLE #ifdef RT_WLAN_LWIP_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif #define DBG_SECTION_NAME "WLAN.lwip" -#define DBG_COLOR #include <rtdbg.h> #ifndef IPADDR_STRLEN_MAX diff --git a/components/drivers/wlan/wlan_mgnt.c b/components/drivers/wlan/wlan_mgnt.c index bdddac1fa2..ced5bfa1c2 100644 --- a/components/drivers/wlan/wlan_mgnt.c +++ b/components/drivers/wlan/wlan_mgnt.c @@ -16,14 +16,13 @@ #include <wlan_prot.h> #include <wlan_workqueue.h> -#define DBG_ENABLE + #ifdef RT_WLAN_MGNT_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif #define DBG_SECTION_NAME "WLAN.mgnt" -#define DBG_COLOR #include <rtdbg.h> #ifndef RT_WLAN_DEVICE @@ -1800,7 +1799,7 @@ rt_err_t rt_wlan_register_event_handler(rt_wlan_event_t event, rt_wlan_event_han } RT_WLAN_LOG_D("%s is run event:%d", __FUNCTION__, event); - MGNT_UNLOCK(); + MGNT_LOCK(); /* Registering Callbacks */ level = rt_hw_interrupt_disable(); event_tab[event].handler = handler; diff --git a/components/drivers/wlan/wlan_prot.c b/components/drivers/wlan/wlan_prot.c index ec5e419bc4..48adbc48f3 100644 --- a/components/drivers/wlan/wlan_prot.c +++ b/components/drivers/wlan/wlan_prot.c @@ -13,14 +13,12 @@ #include <wlan_dev.h> #include <wlan_prot.h> -#define DBG_ENABLE #ifdef RT_WLAN_PROT_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif #define DBG_SECTION_NAME "WLAN.prot" -#define DBG_COLOR #include <rtdbg.h> #if RT_WLAN_PROT_NAME_LEN < 4 diff --git a/components/drivers/wlan/wlan_workqueue.c b/components/drivers/wlan/wlan_workqueue.c index f65ac95d08..23823afae0 100644 --- a/components/drivers/wlan/wlan_workqueue.c +++ b/components/drivers/wlan/wlan_workqueue.c @@ -13,10 +13,8 @@ #include <wlan_workqueue.h> #include <ipc/workqueue.h> -#define DBG_ENABLE #define DBG_LEVEL DBG_INFO #define DBG_SECTION_NAME "WLAN.work" -#define DBG_COLOR #include <rtdbg.h> struct rt_wlan_work diff --git a/components/finsh/SConscript b/components/finsh/SConscript index 639cbebd4a..e1e2b3bbdb 100644 --- a/components/finsh/SConscript +++ b/components/finsh/SConscript @@ -28,19 +28,12 @@ msh_file.c ''') CPPPATH = [cwd] -if rtconfig.CROSS_TOOL == 'keil': - LINKFLAGS = ' --keep *.o(FSymTab)' - - if not GetDepend('FINSH_USING_MSH_ONLY'): - LINKFLAGS = LINKFLAGS + ' --keep *.o(VSymTab) ' -else: - LINKFLAGS = '' if GetDepend('FINSH_USING_MSH'): src = src + msh_src if not GetDepend('FINSH_USING_MSH_ONLY'): src = src + fsh_src -group = DefineGroup('finsh', src, depend = ['RT_USING_FINSH'], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS) +group = DefineGroup('finsh', src, depend = ['RT_USING_FINSH'], CPPPATH = CPPPATH) Return('group') diff --git a/components/libc/compilers/armlibc/SConscript b/components/libc/compilers/armlibc/SConscript index 081efa7358..52f7a6d93a 100644 --- a/components/libc/compilers/armlibc/SConscript +++ b/components/libc/compilers/armlibc/SConscript @@ -14,7 +14,7 @@ if GetDepend('RT_USING_DFS') == False: if GetDepend('RT_USING_MODULE') == False: SrcRemove(src, ['libc_syms.c']) -if rtconfig.PLATFORM == 'armcc': +if rtconfig.PLATFORM == 'armcc' or rtconfig.PLATFORM == 'armclang': group = DefineGroup('libc', src, depend = ['RT_USING_LIBC'], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) diff --git a/components/libc/compilers/armlibc/stubs.c b/components/libc/compilers/armlibc/stubs.c index 555108f712..b6ffb37b0f 100644 --- a/components/libc/compilers/armlibc/stubs.c +++ b/components/libc/compilers/armlibc/stubs.c @@ -251,7 +251,7 @@ void _ttywrch(int ch) #endif } -void _sys_exit(int return_code) +RT_WEAK void _sys_exit(int return_code) { /* TODO: perhaps exit the thread which is invoking this function */ while (1); diff --git a/components/libc/libdl/dlelf.c b/components/libc/libdl/dlelf.c index 6d83424b80..4557ee3458 100644 --- a/components/libc/libdl/dlelf.c +++ b/components/libc/libdl/dlelf.c @@ -12,9 +12,7 @@ #include "dlelf.h" #define DBG_SECTION_NAME "DLMD" -#define DBG_ENABLE // enable debug macro #define DBG_LEVEL DBG_INFO -#define DBG_COLOR #include <rtdbg.h> // must after of DEBUG_ENABLE or some other options rt_err_t dlmodule_load_shared_object(struct rt_dlmodule* module, void *module_ptr) diff --git a/components/libc/libdl/dlmodule.c b/components/libc/libdl/dlmodule.c index 61ffbfc772..0029c01728 100644 --- a/components/libc/libdl/dlmodule.c +++ b/components/libc/libdl/dlmodule.c @@ -17,9 +17,7 @@ #include <dfs_posix.h> #define DBG_SECTION_NAME "DLMD" -#define DBG_ENABLE // enable debug macro #define DBG_LEVEL DBG_INFO -#define DBG_COLOR #include <rtdbg.h> // must after of DEBUG_ENABLE or some other options static struct rt_module_symtab *_rt_module_symtab_begin = RT_NULL; diff --git a/components/net/at/Kconfig b/components/net/at/Kconfig index a1f1b8199d..b1909f86bf 100644 --- a/components/net/at/Kconfig +++ b/components/net/at/Kconfig @@ -74,6 +74,10 @@ if RT_USING_AT config AT_PRINT_RAW_CMD bool "Enable print RAW format AT command communication data" default n + + config AT_CMD_MAX_LEN + int "The maximum lenght of AT Commonds buffer" + default 128 endif diff --git a/components/net/at/include/at_log.h b/components/net/at/include/at_log.h index 278763d30e..fe8766ba95 100644 --- a/components/net/at/include/at_log.h +++ b/components/net/at/include/at_log.h @@ -12,9 +12,6 @@ * NOTE: DO NOT include this file on the header file. */ -#define DBG_ENABLE -#define DBG_COLOR - #ifndef LOG_TAG #define DBG_SECTION_NAME "at" #else diff --git a/components/net/lwip-1.4.1/src/arch/sys_arch.c b/components/net/lwip-1.4.1/src/arch/sys_arch.c index 45c09e6137..dc20ee97a1 100644 --- a/components/net/lwip-1.4.1/src/arch/sys_arch.c +++ b/components/net/lwip-1.4.1/src/arch/sys_arch.c @@ -500,7 +500,9 @@ u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout) ret = rt_mb_recv(*mbox, (rt_uint32_t *)msg, t); if(ret == -RT_ETIMEOUT) + { return SYS_ARCH_TIMEOUT; + } else { LWIP_ASSERT("rt_mb_recv returned with error!", ret == RT_EOK); @@ -531,7 +533,9 @@ u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg) ret = rt_mb_recv(*mbox, (rt_uint32_t *)msg, 0); if(ret == -RT_ETIMEOUT) + { return SYS_ARCH_TIMEOUT; + } else { if (ret == RT_EOK) diff --git a/components/net/lwip-1.4.1/src/include/netif/ethernetif.h b/components/net/lwip-1.4.1/src/include/netif/ethernetif.h index bdad32ec20..1c969e6e25 100644 --- a/components/net/lwip-1.4.1/src/include/netif/ethernetif.h +++ b/components/net/lwip-1.4.1/src/include/netif/ethernetif.h @@ -17,27 +17,35 @@ struct eth_device { - /* inherit from rt_device */ - struct rt_device parent; + /* inherit from rt_device */ + struct rt_device parent; - /* network interface for lwip */ - struct netif *netif; - struct rt_semaphore tx_ack; + /* network interface for lwip */ + struct netif *netif; + struct rt_semaphore tx_ack; - rt_uint16_t flags; - rt_uint8_t link_changed; - rt_uint8_t link_status; + rt_uint16_t flags; + rt_uint8_t link_changed; + rt_uint8_t link_status; - /* eth device interface */ - struct pbuf* (*eth_rx)(rt_device_t dev); - rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); + /* eth device interface */ + struct pbuf* (*eth_rx)(rt_device_t dev); + rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); }; -rt_err_t eth_device_ready(struct eth_device* dev); -rt_err_t eth_device_init(struct eth_device * dev, char *name); -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flag); -rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); +#ifdef __cplusplus +extern "C" { +#endif + + rt_err_t eth_device_ready(struct eth_device* dev); + rt_err_t eth_device_init(struct eth_device * dev, const char *name); + rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flag); + rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); -int eth_system_device_init(void); + int eth_system_device_init(void); + +#ifdef __cplusplus +} +#endif #endif /* __NETIF_ETHERNETIF_H__ */ diff --git a/components/net/lwip-1.4.1/src/netif/ethernetif.c b/components/net/lwip-1.4.1/src/netif/ethernetif.c index 943d95f9ed..506f15b44c 100644 --- a/components/net/lwip-1.4.1/src/netif/ethernetif.c +++ b/components/net/lwip-1.4.1/src/netif/ethernetif.c @@ -177,7 +177,7 @@ static err_t eth_netif_device_init(struct netif *netif) } /* Keep old drivers compatible in RT-Thread */ -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flags) +rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flags) { struct netif* netif; @@ -242,7 +242,7 @@ rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16 return RT_EOK; } -rt_err_t eth_device_init(struct eth_device * dev, char *name) +rt_err_t eth_device_init(struct eth_device * dev, const char *name) { rt_uint16_t flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; diff --git a/components/net/lwip-2.0.2/src/include/netif/ethernetif.h b/components/net/lwip-2.0.2/src/include/netif/ethernetif.h index bdad32ec20..1c969e6e25 100644 --- a/components/net/lwip-2.0.2/src/include/netif/ethernetif.h +++ b/components/net/lwip-2.0.2/src/include/netif/ethernetif.h @@ -17,27 +17,35 @@ struct eth_device { - /* inherit from rt_device */ - struct rt_device parent; + /* inherit from rt_device */ + struct rt_device parent; - /* network interface for lwip */ - struct netif *netif; - struct rt_semaphore tx_ack; + /* network interface for lwip */ + struct netif *netif; + struct rt_semaphore tx_ack; - rt_uint16_t flags; - rt_uint8_t link_changed; - rt_uint8_t link_status; + rt_uint16_t flags; + rt_uint8_t link_changed; + rt_uint8_t link_status; - /* eth device interface */ - struct pbuf* (*eth_rx)(rt_device_t dev); - rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); + /* eth device interface */ + struct pbuf* (*eth_rx)(rt_device_t dev); + rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); }; -rt_err_t eth_device_ready(struct eth_device* dev); -rt_err_t eth_device_init(struct eth_device * dev, char *name); -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flag); -rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); +#ifdef __cplusplus +extern "C" { +#endif + + rt_err_t eth_device_ready(struct eth_device* dev); + rt_err_t eth_device_init(struct eth_device * dev, const char *name); + rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flag); + rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); -int eth_system_device_init(void); + int eth_system_device_init(void); + +#ifdef __cplusplus +} +#endif #endif /* __NETIF_ETHERNETIF_H__ */ diff --git a/components/net/lwip-2.0.2/src/netif/ethernetif.c b/components/net/lwip-2.0.2/src/netif/ethernetif.c index 8b05e592d4..c22951186a 100644 --- a/components/net/lwip-2.0.2/src/netif/ethernetif.c +++ b/components/net/lwip-2.0.2/src/netif/ethernetif.c @@ -205,7 +205,7 @@ static err_t eth_netif_device_init(struct netif *netif) } /* Keep old drivers compatible in RT-Thread */ -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flags) +rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flags) { struct netif* netif; @@ -269,7 +269,7 @@ rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16 return RT_EOK; } -rt_err_t eth_device_init(struct eth_device * dev, char *name) +rt_err_t eth_device_init(struct eth_device * dev, const char *name) { rt_uint16_t flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; diff --git a/components/net/lwip-2.1.0/src/arch/sys_arch.c b/components/net/lwip-2.1.0/src/arch/sys_arch.c index ee96249bec..17ebdfbacf 100644 --- a/components/net/lwip-2.1.0/src/arch/sys_arch.c +++ b/components/net/lwip-2.1.0/src/arch/sys_arch.c @@ -49,6 +49,8 @@ #include "lwip/dhcp.h" #include "lwip/inet.h" +#include "netif/etharp.h" + #include <string.h> #include <stdio.h> @@ -75,6 +77,10 @@ static err_t netif_device_init(struct netif *netif) /* copy device flags to netif flags */ netif->flags = ethif->flags; + netif->mtu = ETHERNET_MTU; + + /* set output */ + netif->output = etharp_output; return ERR_OK; } diff --git a/components/net/lwip-2.1.0/src/include/netif/ethernetif.h b/components/net/lwip-2.1.0/src/include/netif/ethernetif.h index bdad32ec20..1c969e6e25 100644 --- a/components/net/lwip-2.1.0/src/include/netif/ethernetif.h +++ b/components/net/lwip-2.1.0/src/include/netif/ethernetif.h @@ -17,27 +17,35 @@ struct eth_device { - /* inherit from rt_device */ - struct rt_device parent; + /* inherit from rt_device */ + struct rt_device parent; - /* network interface for lwip */ - struct netif *netif; - struct rt_semaphore tx_ack; + /* network interface for lwip */ + struct netif *netif; + struct rt_semaphore tx_ack; - rt_uint16_t flags; - rt_uint8_t link_changed; - rt_uint8_t link_status; + rt_uint16_t flags; + rt_uint8_t link_changed; + rt_uint8_t link_status; - /* eth device interface */ - struct pbuf* (*eth_rx)(rt_device_t dev); - rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); + /* eth device interface */ + struct pbuf* (*eth_rx)(rt_device_t dev); + rt_err_t (*eth_tx)(rt_device_t dev, struct pbuf* p); }; -rt_err_t eth_device_ready(struct eth_device* dev); -rt_err_t eth_device_init(struct eth_device * dev, char *name); -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flag); -rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); +#ifdef __cplusplus +extern "C" { +#endif + + rt_err_t eth_device_ready(struct eth_device* dev); + rt_err_t eth_device_init(struct eth_device * dev, const char *name); + rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flag); + rt_err_t eth_device_linkchange(struct eth_device* dev, rt_bool_t up); -int eth_system_device_init(void); + int eth_system_device_init(void); + +#ifdef __cplusplus +} +#endif #endif /* __NETIF_ETHERNETIF_H__ */ diff --git a/components/net/lwip-2.1.0/src/netif/ethernetif.c b/components/net/lwip-2.1.0/src/netif/ethernetif.c index 910d7c3470..5a8e9d6149 100644 --- a/components/net/lwip-2.1.0/src/netif/ethernetif.c +++ b/components/net/lwip-2.1.0/src/netif/ethernetif.c @@ -156,6 +156,9 @@ static err_t eth_netif_device_init(struct netif *netif) /* copy device flags to netif flags */ netif->flags = (ethif->flags & 0xff); netif->mtu = ETHERNET_MTU; + + /* set output */ + netif->output = etharp_output; #if LWIP_IPV6 netif->output_ip6 = ethip6_output; @@ -207,7 +210,7 @@ static err_t eth_netif_device_init(struct netif *netif) } /* Keep old drivers compatible in RT-Thread */ -rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16_t flags) +rt_err_t eth_device_init_with_flag(struct eth_device *dev, const char *name, rt_uint16_t flags) { struct netif* netif; @@ -239,6 +242,9 @@ rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16 /* maximum transfer unit */ netif->mtu = ETHERNET_MTU; + /* set linkoutput */ + netif->linkoutput = ethernetif_linkoutput; + /* get hardware MAC address */ rt_device_control(&(dev->parent), NIOCTL_GADDR, netif->hwaddr); @@ -262,16 +268,12 @@ rt_err_t eth_device_init_with_flag(struct eth_device *dev, char *name, rt_uint16 IP4_ADDR(&netmask, 0, 0, 0, 0); #endif netifapi_netif_add(netif, &ipaddr, &netmask, &gw, dev, eth_netif_device_init, tcpip_input); - - /* set output */ - netif->output = etharp_output; - netif->linkoutput = ethernetif_linkoutput; } return RT_EOK; } -rt_err_t eth_device_init(struct eth_device * dev, char *name) +rt_err_t eth_device_init(struct eth_device * dev, const char *name) { rt_uint16_t flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; diff --git a/components/net/sal_socket/socket/net_sockets.c b/components/net/sal_socket/socket/net_sockets.c index 232b87ba1e..12024c8173 100644 --- a/components/net/sal_socket/socket/net_sockets.c +++ b/components/net/sal_socket/socket/net_sockets.c @@ -78,29 +78,39 @@ RTM_EXPORT(bind); int shutdown(int s, int how) { - int socket; + int error = 0; + int socket = -1; struct dfs_fd *d; + socket = dfs_net_getsocket(s); + if (socket < 0) + { + rt_set_errno(-ENOTSOCK); + return -1; + } + d = fd_get(s); if (d == NULL) { rt_set_errno(-EBADF); - return -1; } - - socket = dfs_net_getsocket(s); + if (sal_shutdown(socket, how) == 0) { - /* socket has been closed, delete it from file system fd */ - fd_put(d); - fd_put(d); - - return 0; + error = 0; + } + else + { + rt_set_errno(-ENOTSOCK); + error = -1; } - return -1; + /* socket has been closed, delete it from file system fd */ + fd_put(d); + fd_put(d); + return error; } RTM_EXPORT(shutdown); @@ -228,7 +238,7 @@ int socket(int domain, int type, int protocol) rt_set_errno(-ENOMEM); - return -1; + return -1; } /* release the ref-count of fd */ @@ -240,25 +250,39 @@ RTM_EXPORT(socket); int closesocket(int s) { - int socket = dfs_net_getsocket(s); + int error = 0; + int socket = -1; struct dfs_fd *d; + socket = dfs_net_getsocket(s); + if (socket < 0) + { + rt_set_errno(-ENOTSOCK); + return -1; + } + d = fd_get(s); - if(!d) + if (d == RT_NULL) { + rt_set_errno(-EBADF); return -1; } if (sal_closesocket(socket) == 0) { - /* socket has been closed, delete it from file system fd */ - fd_put(d); - fd_put(d); - - return 0; + error = 0; + } + else + { + rt_set_errno(-ENOTSOCK); + error = -1; } - return -1; + /* socket has been closed, delete it from file system fd */ + fd_put(d); + fd_put(d); + + return error; } RTM_EXPORT(closesocket); diff --git a/components/net/sal_socket/src/sal_socket.c b/components/net/sal_socket/src/sal_socket.c index dba8e66254..771a56f061 100644 --- a/components/net/sal_socket/src/sal_socket.c +++ b/components/net/sal_socket/src/sal_socket.c @@ -19,10 +19,8 @@ #endif #include <sal.h> -#define DBG_ENABLE -#define DBG_SECTION_NAME "SAL_SOC" +#define DBG_SECTION_NAME "SAL_SKT" #define DBG_LEVEL DBG_INFO -#define DBG_COLOR #include <rtdbg.h> #define SOCKET_TABLE_STEP_LEN 4 diff --git a/components/utilities/Kconfig b/components/utilities/Kconfig index 1175006a58..504a56691d 100644 --- a/components/utilities/Kconfig +++ b/components/utilities/Kconfig @@ -222,12 +222,6 @@ config RT_USING_ULOG select ULOG_OUTPUT_TIME select ULOG_USING_FILTER default n - - config ULOG_SW_VERSION_NUM - hex - default 0x00101 - help - sfotware module version number endif config RT_USING_UTEST diff --git a/components/utilities/ulog/ulog.c b/components/utilities/ulog/ulog.c index b813678ecd..87d0932506 100644 --- a/components/utilities/ulog/ulog.c +++ b/components/utilities/ulog/ulog.c @@ -315,7 +315,10 @@ RT_WEAK rt_size_t ulog_formater(char *log_buf, rt_uint32_t level, const char *ta /* is not in interrupt context */ if (rt_interrupt_get_nest() == 0) { - log_len += ulog_strcpy(log_len, log_buf + log_len, rt_thread_self()->name); + rt_size_t name_len = rt_strnlen(rt_thread_self()->name, RT_NAME_MAX); + + rt_strncpy(log_buf + log_len, rt_thread_self()->name, name_len); + log_len += name_len; } else { diff --git a/components/utilities/ulog/ulog_def.h b/components/utilities/ulog/ulog_def.h index e7c033f71c..40b39de972 100644 --- a/components/utilities/ulog/ulog_def.h +++ b/components/utilities/ulog/ulog_def.h @@ -47,7 +47,7 @@ extern "C" { #define DBG_INFO LOG_LVL_INFO #define DBG_LOG LOG_LVL_DBG #define dbg_log(level, ...) \ - if ((level) <= DBG_LEVEL) \ + if ((level) <= LOG_LVL) \ { \ ulog_output(level, LOG_TAG, RT_FALSE, __VA_ARGS__);\ } diff --git a/components/utilities/utest/utest.c b/components/utilities/utest/utest.c index f7348b3be4..7bc2c93656 100644 --- a/components/utilities/utest/utest.c +++ b/components/utilities/utest/utest.c @@ -17,17 +17,13 @@ #undef DBG_SECTION_NAME #undef DBG_LEVEL -#undef DBG_COLOR -#undef DBG_ENABLE -#define DBG_ENABLE #define DBG_SECTION_NAME "utest" #ifdef UTEST_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif -#define DBG_COLOR #include <rtdbg.h> #if RT_CONSOLEBUF_SIZE < 256 diff --git a/components/utilities/utest/utest_log.h b/components/utilities/utest/utest_log.h index 9f38d3f9c8..c4bd25a80b 100644 --- a/components/utilities/utest/utest_log.h +++ b/components/utilities/utest/utest_log.h @@ -17,17 +17,13 @@ #undef DBG_SECTION_NAME #undef DBG_LEVEL -#undef DBG_COLOR -#undef DBG_ENABLE -#define DBG_ENABLE #define DBG_SECTION_NAME "testcase" #ifdef UTEST_DEBUG #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO #endif -#define DBG_COLOR #include <rtdbg.h> #define UTEST_LOG_ALL (1u) diff --git a/components/utilities/ymodem/ymodem.c b/components/utilities/ymodem/ymodem.c index c98c7f6cb6..716c702328 100644 --- a/components/utilities/ymodem/ymodem.c +++ b/components/utilities/ymodem/ymodem.c @@ -125,6 +125,7 @@ static rt_err_t _rym_do_handshake( rt_size_t i; rt_uint16_t recv_crc, cal_crc; rt_size_t data_sz; + rt_tick_t tick; ctx->stage = RYM_STAGE_ESTABLISHING; /* send C every second, so the sender could know we are waiting for it. */ @@ -149,8 +150,17 @@ static rt_err_t _rym_do_handshake( return -RYM_ERR_TMO; } - i = _rym_read_data(ctx, data_sz-1); - if (i != (data_sz-1)) + /* receive all data */ + i = 0; + /* automatic exit after receiving specified length data, timeout: 100ms */ + tick = rt_tick_get(); + while (rt_tick_get() <= (tick + rt_tick_from_millisecond(100)) && i < (data_sz-1)) + { + i += _rym_read_data(ctx, data_sz - 1); + rt_thread_mdelay(5); + } + + if (i != (data_sz - 1)) return -RYM_ERR_DSZ; /* sanity check */ diff --git a/examples/network/tcpclient.c b/examples/network/tcpclient.c index d4c96f893a..be50711e94 100644 --- a/examples/network/tcpclient.c +++ b/examples/network/tcpclient.c @@ -12,14 +12,12 @@ #define DEBUG_TCP_CLIENT -#define DBG_ENABLE #define DBG_SECTION_NAME "TCP" #ifdef DEBUG_TCP_CLIENT #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO /* DBG_ERROR */ #endif -#define DBG_COLOR #include <rtdbg.h> #define BUFSZ 1024 diff --git a/examples/network/tcpserver.c b/examples/network/tcpserver.c index 264b6f7c83..0837495366 100644 --- a/examples/network/tcpserver.c +++ b/examples/network/tcpserver.c @@ -12,14 +12,12 @@ #define DEBUG_TCP_SERVER -#define DBG_ENABLE #define DBG_SECTION_NAME "TCP" #ifdef DEBUG_TCP_SERVER #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO /* DBG_ERROR */ #endif -#define DBG_COLOR #include <rtdbg.h> #define BUFSZ (1024) diff --git a/examples/network/udpclient.c b/examples/network/udpclient.c index 40542b9fa1..d43b46a446 100644 --- a/examples/network/udpclient.c +++ b/examples/network/udpclient.c @@ -5,14 +5,12 @@ #define DEBUG_UDP_CLIENT -#define DBG_ENABLE #define DBG_SECTION_NAME "UDP" #ifdef DEBUG_UDP_CLIENT #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO /* DBG_ERROR */ #endif -#define DBG_COLOR #include <rtdbg.h> static int started = 0; diff --git a/examples/network/udpserver.c b/examples/network/udpserver.c index c40a1972b4..40dd754673 100644 --- a/examples/network/udpserver.c +++ b/examples/network/udpserver.c @@ -12,14 +12,12 @@ #define DEBUG_UDP_SERVER -#define DBG_ENABLE #define DBG_SECTION_NAME "UDP" #ifdef DEBUG_UDP_SERVER #define DBG_LEVEL DBG_LOG #else #define DBG_LEVEL DBG_INFO /* DBG_ERROR */ #endif -#define DBG_COLOR #include <rtdbg.h> #define BUFSZ 1024 diff --git a/include/libc/libc_errno.h b/include/libc/libc_errno.h index d693c01fd6..bb9a4dea2a 100644 --- a/include/libc/libc_errno.h +++ b/include/libc/libc_errno.h @@ -161,7 +161,7 @@ defined in armcc/errno.h #define EPROTONOSUPPORT (ERROR_BASE_NO + 93) #define ESOCKTNOSUPPORT (ERROR_BASE_NO + 94) #define EOPNOTSUPP (ERROR_BASE_NO + 95) -#define ENOTSUP EOPNOTSUPP +#define ENOTSUP EOPNOTSUPP #define EPFNOSUPPORT (ERROR_BASE_NO + 96) #define EAFNOSUPPORT (ERROR_BASE_NO + 97) #define EADDRINUSE (ERROR_BASE_NO + 98) diff --git a/include/rtdbg.h b/include/rtdbg.h index 9036a0cd66..77382c656b 100644 --- a/include/rtdbg.h +++ b/include/rtdbg.h @@ -19,16 +19,12 @@ * header file. * * #define DBG_SECTION_NAME "MOD" - * #define DBG_ENABLE // enable debug macro * #define DBG_LEVEL DBG_INFO - * #include <rtdbg.h> // must after of DEBUG_ENABLE or some other options + * #include <rtdbg.h> // must after of DBG_LEVEL, DBG_SECTION_NAME or other options * * Then in your C/C++ file, you can use LOG_X macro to print out logs: * LOG_D("this is a debug log!"); * LOG_E("this is a error log!"); - * - * If you want to use different color for different kinds log, you can - * #define DBG_COLOR */ #ifndef RT_DBG_H__ @@ -36,7 +32,17 @@ #include <rtconfig.h> -#if defined(RT_USING_ULOG) && defined(DBG_ENABLE) +/* the debug log will force enable when RT_DEBUG macro is defined */ +#if defined(RT_DEBUG) && !defined(DBG_ENABLE) +#define DBG_ENABLE +#endif + +/* it will force output color log when RT_DEBUG_COLOR macro is defined */ +#if defined(RT_DEBUG_COLOR) && !defined(DBG_COLOR) +#define DBG_COLOR +#endif + +#if defined(RT_USING_ULOG) /* using ulog compatible with rtdbg */ #include <ulog.h> #else @@ -108,23 +114,6 @@ __FUNCTION__, __LINE__); \ } -#define dbg_enter \ - if ((DBG_LEVEL) <= DBG_LOG){ \ - _DBG_COLOR(32); \ - rt_kprintf(DBG_SECTION_NAME " Enter %s\n", \ - __FUNCTION__); \ - _DBG_COLOR(0); \ - } - -#define dbg_exit \ - if ((DBG_LEVEL) <= DBG_LOG){ \ - _DBG_COLOR(32); \ - rt_kprintf(DBG_SECTION_NAME " Exit %s:%d\n", \ - __FUNCTION__); \ - _DBG_COLOR(0); \ - } - - #define dbg_log_line(lvl, color_n, fmt, ...) \ do \ { \ diff --git a/include/rtthread.h b/include/rtthread.h index 96ebe1940a..5d3fd3def6 100644 --- a/include/rtthread.h +++ b/include/rtthread.h @@ -497,6 +497,7 @@ void *rt_memcpy(void *dest, const void *src, rt_ubase_t n); rt_int32_t rt_strncmp(const char *cs, const char *ct, rt_ubase_t count); rt_int32_t rt_strcmp(const char *cs, const char *ct); rt_size_t rt_strlen(const char *src); +rt_size_t rt_strnlen(const char *s, rt_ubase_t maxlen); char *rt_strdup(const char *s); #if defined(__CC_ARM) || defined(__CLANG_ARM) /* leak strdup interface */ diff --git a/src/Kconfig b/src/Kconfig index 6b6e856a82..babbc83a01 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -97,6 +97,10 @@ menuconfig RT_DEBUG if RT_DEBUG +config RT_DEBUG_COLOR + bool "Enable color debugging log" + default y + config RT_DEBUG_INIT_CONFIG bool "Enable debugging of components initialization" default n diff --git a/src/SConscript b/src/SConscript index bb38baa6bd..7f448725a2 100644 --- a/src/SConscript +++ b/src/SConscript @@ -5,15 +5,6 @@ from building import * src = Glob('*.c') CPPPATH = [RTT_ROOT + '/include'] -if rtconfig.CROSS_TOOL == 'keil': - # add more link flags for module and components_init. - LINKFLAGS = '' - if GetDepend('RT_USING_MODULE'): - LINKFLAGS += ' --keep *.o(RTMSymTab) ' - if GetDepend('RT_USING_COMPONENTS_INIT'): - LINKFLAGS += ' --keep *.o(.rti_fn.*) ' -else: - LINKFLAGS = '' if GetDepend('RT_USING_COMPONENTS_INIT') == False: SrcRemove(src, ['components.c']) @@ -38,6 +29,6 @@ if GetDepend('RT_USING_MEMHEAP') == False: if GetDepend('RT_USING_DEVICE') == False: SrcRemove(src, ['device.c']) -group = DefineGroup('Kernel', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS) +group = DefineGroup('Kernel', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/src/clock.c b/src/clock.c index 651465e0a8..36ff398376 100644 --- a/src/clock.c +++ b/src/clock.c @@ -19,8 +19,6 @@ static rt_tick_t rt_tick = 0; -extern void rt_timer_check(void); - /** * This function will init system tick and set it to zero. * @ingroup SystemInit diff --git a/src/kservice.c b/src/kservice.c index be70a0431e..7a3772473f 100644 --- a/src/kservice.c +++ b/src/kservice.c @@ -461,6 +461,7 @@ rt_int32_t rt_strcmp(const char *cs, const char *ct) return (*cs - *ct); } RTM_EXPORT(rt_strcmp); + /** * The strnlen() function returns the number of characters in the * string pointed to by s, excluding the terminating null byte ('\0'), @@ -476,11 +477,13 @@ rt_size_t rt_strnlen(const char *s, rt_ubase_t maxlen) { const char *sc; - for (sc = s; *sc != '\0' && sc - s < maxlen; ++sc) /* nothing */ + for (sc = s; *sc != '\0' && (rt_ubase_t)(sc - s) < maxlen; ++sc) /* nothing */ ; return sc - s; } +RTM_EXPORT(rt_strnlen); + /** * This function will return the length of a string, which terminate will * null character. diff --git a/src/signal.c b/src/signal.c index 3d2abcb890..8ffcf13ece 100644 --- a/src/signal.c +++ b/src/signal.c @@ -21,10 +21,8 @@ #define RT_SIG_INFO_MAX 32 #endif -// #define DBG_ENABLE #define DBG_SECTION_NAME "SIGN" -#define DBG_COLOR -#define DBG_LEVEL DBG_LOG +#define DBG_LEVEL DBG_INFO #include <rtdbg.h> #define sig_mask(sig_no) (1u << sig_no) @@ -51,8 +49,6 @@ static void _signal_entry(void *parameter) register rt_base_t level; rt_thread_t tid = rt_thread_self(); - dbg_enter; - while (1) { level = rt_hw_interrupt_disable(); diff --git a/src/slab.c b/src/slab.c index bf26c84cca..f4806ddb60 100644 --- a/src/slab.c +++ b/src/slab.c @@ -398,10 +398,10 @@ void rt_system_heap_init(void *begin_addr, void *end_addr) * Calculate the zone index for the allocation request size and set the * allocation request size to that particular zone's chunk size. */ -rt_inline int zoneindex(rt_uint32_t *bytes) +rt_inline int zoneindex(rt_size_t *bytes) { /* unsigned for shift opt */ - rt_uint32_t n = (rt_uint32_t) * bytes; + rt_uint32_t n = (rt_uint32_t)(*bytes); if (n < 128) { |
