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authorGuEe-GUI <[email protected]>2026-10-20 15:58:44 +0800
committerRbb666 <[email protected]>2026-10-22 17:59:29 +0800
commite7c293802a3eaef0761a2fea6244382ae42ed00f (patch)
tree53c95c7d68914ab0ed8ae4e76d7034421a3e3ba3
parent2a4e78d2321cff9bc2ad2d41f5c18cfe5e82595b (diff)
[bsp][spacemit/k1] Enable eight CPUs and add BSP support overview
Increase RT_CPUS_NR from 4 to 8 in the K1 default configuration and regenerate rtconfig.h. Add the SpacemiT K1 entry and peripheral support matrix to the BSP overview. Verified eight-core boot and root filesystem mounting with the RISC-V ticket spinlock fix. Signed-off-by: GuEe-GUI <[email protected]>
-rw-r--r--bsp/README.md6
-rw-r--r--bsp/spacemit/k1/.config2
-rw-r--r--bsp/spacemit/k1/README.md6
-rw-r--r--bsp/spacemit/k1/README_en.md6
-rw-r--r--bsp/spacemit/k1/rtconfig.h2
5 files changed, 14 insertions, 8 deletions
diff --git a/bsp/README.md b/bsp/README.md
index 62c88b1c2e..221ac20468 100644
--- a/bsp/README.md
+++ b/bsp/README.md
@@ -809,6 +809,12 @@ This document is based on the RT-Thread mainline repository and categorizes the
| [ch569w-evt](wch/risc-v/ch569w-evt) | ✅ | ✅ | - | - | - | - | - | ✅ | - | ✅ | - | - | - | - | - |
| [yd-ch32v307vct6](wch/risc-v/yd-ch32v307vct6) | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - | - |
+#### 🟢 Spacemit
+
+| BSP Name | GPIO | UART | ADC | I2C | SPI | WDT | HWTimer | PWM | RTC | SDIO | CAN | PCI | DMA | Ethernet | Audio | Display | Crypto |
+|----------|------|------|-----|-----|-----|-----|---------|-----|-----|------|-----|-----|-----|----------|-------|---------|--------|
+| [k1](spacemit/k1) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
+
#### 🟡 Ultrarisc (RT-Smart) (SMP)
| BSP Name | GPIO | UART | ADC | I2C | SPI | WDT |
|----------|------|------|-----|-----|-----|-----|
diff --git a/bsp/spacemit/k1/.config b/bsp/spacemit/k1/.config
index 42c46524dd..2123741f4c 100644
--- a/bsp/spacemit/k1/.config
+++ b/bsp/spacemit/k1/.config
@@ -112,7 +112,7 @@ CONFIG_RT_NAME_MAX=24
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y
-CONFIG_RT_CPUS_NR=4
+CONFIG_RT_CPUS_NR=8
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
diff --git a/bsp/spacemit/k1/README.md b/bsp/spacemit/k1/README.md
index 72d6970241..94a32a92d6 100644
--- a/bsp/spacemit/k1/README.md
+++ b/bsp/spacemit/k1/README.md
@@ -8,7 +8,7 @@ SpacemiT K1(进迭时空 K1)是一款 64 位 RISC-V SoC,集成 8 个 X60 C
支持浮点和向量扩展,并提供 SD/eMMC、PCIe、以太网、显示及音频等外设接口。
本 BSP 基于 RT-Thread 标准版和设备模型,通过 Device Tree 描述板级硬件,
-由 U-Boot/OpenSBI 引导,在 S-mode 下运行。默认启用 MMU 和 4 核 SMP,
+由 U-Boot/OpenSBI 引导,在 S-mode 下运行。默认启用 MMU 和 8 核 SMP,
支持存储、网络、多媒体及电源管理等功能。
验证平台为 **Banana Pi BPI-F3 SBC**。早期控制台使用 SBI,正常控制台为
@@ -18,11 +18,11 @@ UART0,串口参数为 115200 8N1。下文启动命令仅适用于该板原厂�
| 功能 | 状态 | 说明 |
| --- | --- | --- |
-| MMU / SMP | 支持 | 默认启用 4 个 CPU 核心 |
+| MMU / SMP | 支持 | 默认启用 8 个 CPU 核心 |
| UART / early console | 支持 | UART0、SBI 早期输出 |
| Clock / reset / power domain | 支持 | 时钟、复位及电源域控制 |
| GPIO / pinctrl / I2C / PWM | 支持 | 引脚配置及基础外设 |
-| SPI / QSPI | 已移植,验证中 | SPI NOR 读 ID 问题排查中 |
+| SPI / QSPI | 支持 | SPI NOR |
| SD / eMMC | 支持 | SDHCI、eMMC HS400 |
| RTC / ADC / 电源键 | 支持 | SpacemiT PMIC 子设备 |
| PCIe / NVMe | 支持 | PCIe host、NVMe 块设备 |
diff --git a/bsp/spacemit/k1/README_en.md b/bsp/spacemit/k1/README_en.md
index 03ff2b96cc..d0109582fe 100644
--- a/bsp/spacemit/k1/README_en.md
+++ b/bsp/spacemit/k1/README_en.md
@@ -10,7 +10,7 @@ display, and audio.
This BSP uses the RT-Thread standard edition and device model, with board
hardware described by a Device Tree. U-Boot/OpenSBI boots RT-Thread in S-mode.
-The default configuration enables the MMU and four-core SMP, with support for
+The default configuration enables the MMU and eight-core SMP, with support for
storage, networking, multimedia, and power management.
The validation platform is the **Banana Pi BPI-F3 SBC**. SBI provides early
@@ -21,11 +21,11 @@ only to this board's vendor firmware environment.
| Feature | Status | Notes |
| --- | --- | --- |
-| MMU / SMP | Supported | Four CPU cores enabled by default |
+| MMU / SMP | Supported | Eight CPU cores enabled by default |
| UART / early console | Supported | UART0 and SBI early output |
| Clock / reset / power domain | Supported | Clock, reset, and power domain control |
| GPIO / pinctrl / I2C / PWM | Supported | Pin configuration and basic peripherals |
-| SPI / QSPI | Ported, validation in progress | SPI NOR ID read issue under investigation |
+| SPI / QSPI | Supported | SPI NOR |
| SD / eMMC | Supported | SDHCI and eMMC HS400 |
| RTC / ADC / power key | Supported | SpacemiT PMIC child devices |
| PCIe / NVMe | Supported | PCIe host and NVMe block devices |
diff --git a/bsp/spacemit/k1/rtconfig.h b/bsp/spacemit/k1/rtconfig.h
index 2d89477f74..2affa997ca 100644
--- a/bsp/spacemit/k1/rtconfig.h
+++ b/bsp/spacemit/k1/rtconfig.h
@@ -63,7 +63,7 @@
/* end of klibc options */
#define RT_NAME_MAX 24
#define RT_USING_SMP
-#define RT_CPUS_NR 4
+#define RT_CPUS_NR 8
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32