diff options
| author | CYFS <[email protected]> | 2026-04-17 11:43:20 +0800 |
|---|---|---|
| committer | Bernard Xiong <[email protected]> | 2026-04-20 20:47:09 +0800 |
| commit | fa0a61c45bbdc8d7a0173069d74fbfab4631c908 (patch) | |
| tree | b4034df3f826319d1f2b80acfc4d3aaebd0103f7 | |
| parent | ae5b5ed1821b7a9ddcafa024856252fd724634f4 (diff) | |
[bsp][cvitek] fix timer clock frequency for 25MHz crystal
Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.
The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
| -rwxr-xr-x | bsp/cvitek/c906_little/board/board.c | 2 | ||||
| -rwxr-xr-x | bsp/cvitek/cv18xx_risc-v/board/board.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/bsp/cvitek/c906_little/board/board.c b/bsp/cvitek/c906_little/board/board.c index 31790dcc44..21418d9dce 100755 --- a/bsp/cvitek/c906_little/board/board.c +++ b/bsp/cvitek/c906_little/board/board.c @@ -16,7 +16,7 @@ rt_uint64_t rt_hw_get_clock_timer_freq(void) { - return 245000000ULL; + return 25000000ULL; } void rt_hw_board_init(void) diff --git a/bsp/cvitek/cv18xx_risc-v/board/board.c b/bsp/cvitek/cv18xx_risc-v/board/board.c index b0c8f0b55d..6eb309af32 100755 --- a/bsp/cvitek/cv18xx_risc-v/board/board.c +++ b/bsp/cvitek/cv18xx_risc-v/board/board.c @@ -48,7 +48,7 @@ struct mem_desc platform_mem_desc[] = { rt_uint64_t rt_hw_get_clock_timer_freq(void) { - return 245000000ULL; + return 25000000ULL; } void init_bss(void) |