diff options
| author | bernard.xiong <[email protected]> | 2010-03-29 13:57:12 +0000 |
|---|---|---|
| committer | bernard.xiong <[email protected]> | 2010-03-29 13:57:12 +0000 |
| commit | fcbc7aa742dac045c2d5a45ab9f0c15a62b618ef (patch) | |
| tree | 7ae919cc297d3f4d984ac1e685843d32ad571a96 | |
| parent | 67faf9224512b9fd56a46de5e78dc537fc58eb07 (diff) | |
remove interrupt Tx and DMA Rx mode in USART.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@549 bbd45198-f89e-11dd-88c7-29a3b14d5316
| -rw-r--r-- | bsp/stm3210/board.c | 5 | ||||
| -rw-r--r-- | bsp/stm3210/usart.c | 18 |
2 files changed, 15 insertions, 8 deletions
diff --git a/bsp/stm3210/board.c b/bsp/stm3210/board.c index 9581d7668e..015b992153 100644 --- a/bsp/stm3210/board.c +++ b/bsp/stm3210/board.c @@ -66,7 +66,6 @@ void SysTick_Configuration(void) }
#if STM32_EXT_SRAM
-#define Bank1_SRAM3_ADDR ((u32)0x68000000)
void EXT_SRAM_Configuration(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
@@ -204,9 +203,9 @@ void rt_hw_board_init() #endif
#define CONSOLE_USART USART2
-#elif STM32_CONSOLE_USART == 2
-#define CONSOLE_RX_PIN GPIO_Pin_11
+#elif STM32_CONSOLE_USART == 3
#define CONSOLE_TX_PIN GPIO_Pin_10
+#define CONSOLE_RX_PIN GPIO_Pin_11
#define CONSOLE_GPIO GPIOB
#define CONSOLE_USART USART3
#define CONSOLE_RCC RCC_APB1Periph_USART3
diff --git a/bsp/stm3210/usart.c b/bsp/stm3210/usart.c index 0876708d83..ac859a58af 100644 --- a/bsp/stm3210/usart.c +++ b/bsp/stm3210/usart.c @@ -10,6 +10,7 @@ * Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
+ * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
*/
#include "usart.h"
@@ -20,7 +21,7 @@ * Use UART1 as console output and finsh input
* interrupt Rx and poll Tx (stream mode)
*
- * Use UART2 with DMA Rx and poll Tx -- DMA channel 6
+ * Use UART2 with interrupt Rx and poll Tx
* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
*
* USART DMA setting on STM32
@@ -78,13 +79,19 @@ struct rt_device uart3_device; #define USART3_DR_Base 0x40004804
/* USART1_REMAP = 0 */
-#define UART1_GPIO_TX GPIO_Pin_9
-#define UART1_GPIO_RX GPIO_Pin_10
-#define UART1_GPIO GPIOA
+#define UART1_GPIO_TX GPIO_Pin_9
+#define UART1_GPIO_RX GPIO_Pin_10
+#define UART1_GPIO GPIOA
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART1_TX_DMA DMA1_Channel4
#define UART1_RX_DMA DMA1_Channel5
+#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
+#define UART2_GPIO_TX GPIO_Pin_5
+#define UART2_GPIO_RX GPIO_Pin_6
+#define UART2_GPIO GPIOD
+#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
+#else /* for STM32F10X_HD */
/* USART2_REMAP = 0 */
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_GPIO_RX GPIO_Pin_3
@@ -92,6 +99,7 @@ struct rt_device uart3_device; #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART2_TX_DMA DMA1_Channel7
#define UART2_RX_DMA DMA1_Channel6
+#endif
/* USART3_REMAP[1:0] = 00 */
#define UART3_GPIO_RX GPIO_Pin_11
@@ -123,7 +131,7 @@ static void RCC_Configuration(void) RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
#endif
-#if defined (RT_USING_UART2) || defined (RT_USING_UART3)
+#if defined (RT_USING_UART3)
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
#endif
|
