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| author | Bernard Xiong <[email protected]> | 2021-05-28 16:20:08 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2021-05-28 16:20:08 +0800 |
| commit | 92beddf3bccf6346e26aa097f82464456fb8e6bd (patch) | |
| tree | 197e4a108118dda016ea02274172f0c40e7ee8ed /bsp/gd32303e-eval/drivers/drv_spi.c | |
| parent | b18a99b44240ec3152011e159cc24a5af8dff0ce (diff) | |
| parent | 03f4d40e30f3c94e1db0b3a65b3610dee695694a (diff) | |
Merge pull request #4737 from mysterywolf/3,1,xformatv3.1.5
[lts 3.1.x] format codes
Diffstat (limited to 'bsp/gd32303e-eval/drivers/drv_spi.c')
| -rw-r--r-- | bsp/gd32303e-eval/drivers/drv_spi.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/bsp/gd32303e-eval/drivers/drv_spi.c b/bsp/gd32303e-eval/drivers/drv_spi.c index 89d1964e17..96f53b5019 100644 --- a/bsp/gd32303e-eval/drivers/drv_spi.c +++ b/bsp/gd32303e-eval/drivers/drv_spi.c @@ -115,7 +115,7 @@ static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configurat spi_init_struct.prescale = SPI_PSC_256; } } /* baudrate */ - + switch(configuration->mode & RT_SPI_MODE_3) { case RT_SPI_MODE_0: @@ -131,7 +131,7 @@ static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configurat spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE; break; } - + /* MSB or LSB */ if(configuration->mode & RT_SPI_MSB) { @@ -141,7 +141,7 @@ static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configurat { spi_init_struct.endian = SPI_ENDIAN_LSB; } - + spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX; spi_init_struct.device_mode = SPI_MASTER; spi_init_struct.nss = SPI_NSS_SOFT; @@ -177,7 +177,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes const rt_uint8_t * send_ptr = message->send_buf; rt_uint8_t * recv_ptr = message->recv_buf; rt_uint32_t size = message->length; - + DEBUG_PRINTF("spi poll transfer start: %d\n", size); while(size--) @@ -188,7 +188,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes { data = *send_ptr++; } - + // Todo: replace register read/write by gd32f3 lib //Wait until the transmit buffer is empty while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE)); @@ -263,8 +263,8 @@ int gd32_hw_spi_init(void) rcu_periph_clock_enable(RCU_SPI0); /* SPI0_SCK(PA5), SPI0_MISO(PA6) and SPI0_MOSI(PA7) GPIO pin configuration */ gpio_init(GPIOA, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_5 | GPIO_PIN_7); - gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_6); - + gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_6); + #endif #ifdef RT_USING_SPI1 static struct rt_spi_bus spi_bus1; @@ -283,7 +283,7 @@ int gd32_hw_spi_init(void) static struct rt_spi_bus spi_bus2; spi_bus2.parent.user_data = (void *)SPI2; - result = rt_spi_bus_register(&spi_bus2, "spi2", &gd32_spi_ops); + result = rt_spi_bus_register(&spi_bus2, "spi2", &gd32_spi_ops); rcu_periph_clock_enable(RCU_SPI2); rcu_periph_clock_enable(RCU_GPIOB); |